Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Original claims 1-11 are currently pending in the present application.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The IDSs dated 21 October 2024, and 26 February 2025 have been considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2 and 8-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Luo (US20230152657) in view of Ozeki (US20190094645).
Re: claim 1, Luo discloses an element array substrate 100 (Figs. 5-7; para. 35 discloses pixel array), comprising a plurality of signal lines 600, 700 (Fig. 5), a plurality of common electrodes 0012, 400, 800 (Figs. 5-7), and a plurality of pixel electrodes 200, wherein a first common electrode 400, 800 (Fig. 5, the instance of electrode 400, 800 shown in the pixel depicted) and a second common electrode 400, 800 (Fig. 5, any common electrode 400, 800 disposed in a pixel directly adjacent to the depicted pixel, such as a pixel disposed directly to the left or right depicted pixel) among the plurality of common electrodes are respectively disposed on opposite sides of one signal line (Fig. 5, where the one signal line is the depicted data line 700) among the plurality of signal lines, and one pixel electrode 200 among the plurality of pixel electrodes 200 forms a first storage capacitor Cst2 (Fig. 6; para. 47) and a second storage capacitor Cst2 (Fig. 5, the instance of Cst2 that is associated with the pixel located to the immediate left or right of the depicted pixel) with the first common electrode and the second common electrode respectively; and an electrophoretic display substrate 0011 (Fig. 7), disposed on the element array substrate 100 (disposition disclosed in Fig. 7).
Luo does not explicitly disclose that the one pixel electrode among the plurality of pixel electrodes crosses the one signal line.
Ozeki discloses that the one pixel electrode PE (Fig. 2) among the plurality of pixel electrodes PE (at least Fig. 1A discloses plurality of pixel electrodes PE) crosses the one signal line (Fig. 2, where the one signal line can be either G1 or S1).
It would have been obvious to a person of ordinary skill in the art at a time before the effective filing date of the claimed invention to have the one pixel electrode among the plurality of pixel electrodes crosses the one signal line, as disclosed by Ozeki, applied to the device disclosed by Luo for the purpose of improving the bonding between the array substrate and the electrophoretic layer by increasing the surface area of the surfaces to be bonded (see para. 44 Ozeki).
Re: claim 2, Luo and Ozeki discloses the limitations of claim 1, and Luo further discloses that the one signal line 700 is a scanning line or a data line (para. 67 discloses data line), and extending directions of the second storage capacitor 400, 800 and the one signal line are same (Fig. 5 discloses vertical extending direction).
Re: claim 8, Luo and Ozeki discloses the limitations of claim 1, and Luo further discloses that the plurality of common electrodes 400, 800 belong to a second conductive layer (Figs. 5, 6), the plurality of pixel electrodes 200 belong to a third conductive layer (Fig. 6), the element array substrate further comprises a first dielectric layer 900 and a second dielectric layer 1000 disposed sequentially on the second conductive layer (Figs. 6, 7), the third conductive layer is disposed on the second dielectric layer (Figs. 6, 7 disclose disposition), the second dielectric layer 1000 has a first through hole overlapping the first common electrode 400, 800 (Figs. 5, 7 disclose overlap) and a second through hole overlapping the second common electrode (Figs. 5-7, where the pixels to the left or right of the depicted pixel comprises the structure), and the one pixel electrode is further disposed in the first through hole and the second through hole (Figs. 6, 7).
Re: claim 9, Luo and Ozeki disclose the limitations of claim 1, and Ozeki further discloses that a width of the one pixel electrode PE overlapping the one signal line S1 is smaller than a width of the remaining part of the one pixel electrode (comparative sizes disclosed in Fig. 2).
Re: claim 10, Luo and Ozeki disclose the limitations of claim 1, and Luo further discloses that a quantity of the first storage capacitors Cst2 in the element array substrate is plural (array formation of pixels disclosed in Fig. 2, and each pixel includes Cst2), a quantity of the second storage capacitors Cst2 in the element array substrate is plural. Neither reference explicitly discloses that the plurality of first storage capacitors and the plurality of second storage capacitors are alternately arranged along a direction perpendicular to an extending direction of the one signal line; however, the technique of alternately arranging storage capacitors in display devices is well-known to a person of ordinary skill at a time prior to the effective date. A person of ordinary skill would be motivated to alternate the storage capacitors for the purpose of maximizing the pixel aperture ratio.
Re: claim 11, Luo and Ozeki disclose the limitations of claim 1, and Luo further discloses that the plurality of pixel electrodes 200 are aligned with each other in a first direction (Fig. 5, where the first direction is either vertical or horizontal). Neither reference explicitly discloses that the plurality of pixel electrodes are staggered in a second direction; however, the technique of staggering pixel electrodes is well-known to a person of ordinary skill at a time prior to the effective date. A person of ordinary skill would have been motivated to stagger the pixel electrodes for the purpose of reducing the visibility of transition lines or fringes caused by the electrophoretic particles that are prone to clustering in a non-staggered arrangement.
Allowable Subject Matter
Claims 3-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANGELA MEDICH whose telephone number is (313)446-4819. The examiner can normally be reached M-T & Th-F 10:00 AM - 7:00 PM ET.
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/ANGELA M. MEDICH/Primary Examiner, Art Unit 2871
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