Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Acknowledgment is made of the information disclosure statements filed on 07/21/2026. U.S. patents and Foreign Patents have been considered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 5 and 7 – 10 are rejected under 35 U.S.C. 103 as being unpatentable over US20230267265A1 (Oriordan) in view of US20200387660A1 (Cecil) and further in view of US20170242333A1 (Li).
In regards to claim 1, (Oriordan) shows a method for auto-correcting a shape in a layout that comprises a plurality of shapes and that is used for designing or manufacturing components on a substrate, the method comprising:
receiving identification of a set of one or more rule-violating pixels in a pixel representation of the layout, each rule-violating pixel residing on a boundary of the shape and violating a rule that is enforced with respect to the layout; Oriordan [0057] teaches a method for performing pixel-based design rule checking (DRC) for rectilinear and curvilinear IC layout designs, wherein rasterized images of IC design data are processed in the pixel domain. Oriordan [0061] teaches rasterization of geometric layout data into a pixel-based representation in which each shape and its contours are defined by reference to a series of pixels, with boundary pixels of shapes explicitly represented in the rasterized image. Oriordan [0080] and [0081] and FIG. 13 teach that DRC markers are placed at locations to highlight one or more edges of the input design that are involved in DRC violations, i.e., identifying specific boundary pixels of a shape that violate a design rule enforced with respect to the layout. Oriordan [0081] and FIG. 14 illustrate a DRC marker created for a single-layer 30 nm minimum-width violation, expressly identifying the boundary pixels of a curvilinear shape that violate the width design rule.
receiving, for each identified rule-violating pixel, a violation value that expresses an amount by which the pixel violates the rule; Oriordan [0090] teaches that the trained neural network acts as a regression application, predicting pixel values that lie anywhere between 0.0 and 1.0 per pixel, constituting a per-pixel scalar value expressing the degree or amount of the DRC violation at each boundary pixel location. Oriordan [0093] further teaches that the per-pixel output of the neural network is considered as surfaces with peaks corresponding to DRC violation marker locations, wherein the peak height at each pixel directly encodes the amount by which that boundary pixel violates the rule, directly mapping to the violation value as expressly recited in the claim.
Oriordan differs from the claimed invention in that it does not explicitly disclose using a set of violation values received for the set of rule-violating pixels to adjust a pixel-based definition of the shape so that no boundary pixel of the shape violates the rule; and said auto-correction operation using the set of violation values to specify an initial set of adjustment values for pixels of the layout and then performing a variable resize operation that specifies a plurality of different adjustment values for adjusting values associated with a plurality of one or more rule-violating pixels and one or more non-rule-violating pixels.
Cecil teaches using a set of violation values received for the set of rule-violating pixels to adjust a pixel-based definition of the shape so that no boundary pixel of the shape violates the rule; Cecil [0056] teaches that during the mask synthesis flow the system checks the mask and fixes any MRC violations that are found, expressly teaching automated correction of a shape based on detected rule violations. Cecil [0124] teaches that the mask rule checking system modifies the geometric shapes so as to remove the mask violations and may automatically modify the masks to remove the rule violations. Cecil [0125] and FIG. 13 teach the specific correction mechanism in which the system increases the size of the medial axis portion associated with the width violation to the specified width and adjusts the geometric shape of the mask, directly teaching adjustment of the shape definition based on detected violation information to eliminate the violation, constituting using a set of violation values to adjust the shape definition so that no boundary element of the shape violates the rule as expressly recited in the claim.
Cecil teaches one or more non-rule-violating pixels; Cecil [0125] and FIG. 13 further teach that the shape correction expands the medial axis portion beyond the specific point of violation to adjust the broader shape region, consistent with updating both violating and adjacent non-violating pixel values.
Cecil differs from the claimed invention in that it does not explicitly disclose said auto-correction operation using the set of violation values to specify an initial set of adjustment values for pixels of the layout and then performing a variable resize operation that specifies a plurality of different adjustment values for adjusting values associated with a plurality of one or more rule-violating pixels.
Li teaches said auto-correction operation using the set of violation values to specify an initial set of adjustment values for pixels of the layout and then performing a variable resize operation that specifies a plurality of different adjustment values for adjusting values associated with a plurality of one or more rule-violating pixels; Li [0034] and [0047] teach an optimization using a Broyden-Fletcher-Goldfarb-Shanno (BFGS) technique that takes the per-pixel values as an initial set of adjustment values for the mask image pixels and then iteratively adjusts those pixel values. Li [0043] and [0045] teach that the gradient of the cost function with respect to the mask image pixels is computed individually for each pixel location through the chain rule, yielding a different gradient magnitude for each pixel, so that the iterative resize operation specifies a plurality of different adjustment values for a plurality of pixels, directly teaching using the set of violation values to specify an initial set of adjustment values and then performing a variable resize operation that specifies a plurality of different adjustment values for a plurality of rule-violating pixels as expressly recited in the claim.
The motivation to combine Oriordan and Cecil at the effective filing date of the invention is to extend Oriordan’s pixel-domain violation detection to automated shape correction. Both references operate on the same pixel-based IC layout data, making the combination a predictable use of known techniques.
The motivation to additionally combine Li with Oriordan and Cecil at the effective filing date of the invention is to enable variable per-pixel shape adjustments driven by the quantified violation values. Applying Li’s per-pixel optimization to the Oriordan-Cecil framework yields more precise correction with a reasonable expectation of success.
In regards to claim 2, (Oriordan) shows the method of claim 1, wherein:
the pixel representation of the shape comprises a value for each pixel along the boundary of the shape; Oriordan [0061] teaches that rasterization converts the geometric layout into a raster image in which each shape and its contours are defined by reference to a series of pixels, and Oriordan [0090] teaches that the trained network predicts pixel values between 0.0 and 1.0 per pixel for each pixel in the rasterized representation, directly teaching a pixel representation in which each pixel along the boundary of the shape has an associated value as expressly recited in the claim.
In regards to claim 3, (Oriordan) shows the method of claim 2, further comprising:
defining one error marker for several neighboring pixels that have been identified as violating the rule, wherein the adjusted pixel-based definition comprises a new value for each pixel of the several pixels for which the error marker has been defined; Oriordan [0080] and [0083] and FIG. 13 and FIG. 15 teach that DRC markers are polygon shapes created around groups of neighboring violating pixels, with a single DRC marker polygon covering multiple neighboring boundary pixels involved in a rule violation, directly teaching the definition of one error marker for several neighboring pixels as expressly recited in the claim. Oriordan [0083] further teaches that the DRC marker polygons are intentionally oversized by one pixel dimension value per edge so that the marker encompasses neighboring pixels, and Oriordan [0090] teaches that the regression output provides individual per-pixel values for each pixel within the marker region, directly teaching that the adjusted pixel-based definition comprises a new value for each pixel of the several pixels for which the error marker has been defined as expressly recited in the claim.
In regards to claim 4, (Oriordan) shows the method of claim 3, wherein:
the received violation values comprises receiving a violation value for each pixel associated with the error marker; Oriordan [0090] and [0093] teach that the regression output of the trained neural network provides a per-pixel scalar violation value from 0.0 to 1.0 for every pixel location in the rasterized image, including each pixel encompassed by the DRC error marker polygon, directly teaching receiving a violation value for each pixel associated with the error marker as expressly recited in the claim.
In regards to claim 5, (Oriordan) shows the method of claim 2, wherein:
the adjusted pixel-based definition comprises a new value for each identified rule-violating pixels; Oriordan [0083] teaches that DRC marker polygons are oversized by one pixel dimension value per edge, explicitly extending the marker region beyond the violating pixels, directly teaching that the adjusted definition encompasses the identified rule-violating pixels as expressly recited in the claim.
Oriordan differs from the claimed invention in that it does not explicitly disclose at least one pixel that lies along the shape’s boundary and that has not been identified as violating a rule.
Cecil teaches at least one pixel that lies along the shape’s boundary and that has not been identified as violating a rule; Cecil [0125] and FIG. 13 further teach that the shape correction expands the medial axis portion beyond the specific point of violation to adjust the broader shape region, consistent with updating both violating and adjacent non-violating pixel values.
The motivation to combine Oriordan and Cecil at the effective filing date of the invention is to extend Oriordan’s pixel-domain violation detection to automated shape correction. Both references operate on the same pixel-based IC layout data, making the combination a predictable use of known techniques.
In regards to claim 7, (Oriordan modified by Cecil) does not show:
Li teaches wherein the pixel values are pixel dose values and the violation values are length values, wherein using the set of violation values comprises using a first function to convert the length values to dose values; Li [0036] teaches that edge placement error is computed as a length-domain violation value in nanometers expressing the amount by which a boundary evaluation point deviates from the required position. Li [0045] and Equations 11 and 12 teach a chain-rule conversion function that maps the edge placement error length-domain violation values through the optical model to gradient updates on mask pixel dose-domain values, directly teaching a first function that converts length violation values to pixel dose adjustment values as expressly recited in the claim. Cecil [0058] establishes that the mask pixel representation uses gray-level values analogous to dose values, providing the dose-pixel context in which Li’s length-to-pixel-value conversion operates.
The motivation to additionally combine Li with Oriordan and Cecil at the effective filing date of the invention is to enable variable per-pixel shape adjustments driven by the quantified violation values. Applying Li’s per-pixel optimization to the Oriordan-Cecil framework yields more precise correction with a reasonable expectation of success.
In regards to claim 8, (Oriordan) shows the method of claim 1, wherein:
the rule ensures that no two edges of two nearby shapes are closer than a threshold distance; Oriordan [0084], FIG. 15, and FIG. 26 teach a minimum spacing DRC rule requiring a threshold minimum distance of separation between edges of two nearby shapes, specifically illustrating a 100 nm minimum spacing rule between two curvilinear shapes, directly teaching the spacing rule as expressly recited in the claim.
In regards to claim 9, (Oriordan) shows the method of claim 1, wherein:
the rule ensures that no two edges of one shape are closer than a threshold distance; Oriordan [0081] and FIG. 14 teach a minimum width DRC rule requiring that no two edges of one shape are closer than a threshold distance, specifically illustrating a 30 nm minimum-width violation marker placed on a curvilinear shape where the shape width falls below the threshold, directly teaching the width rule as expressly recited in the claim.
In regards to claim 10, (Oriordan) shows the method of claim 1, wherein:
the layout is either a mask layout for fabricating the components on the substrate or a design layout used for specifying a design of the components on the substrate; Oriordan [0057] and [0062] teach a pixel-based DRC method applied to IC layout designs used for designing and manufacturing semiconductor devices on a substrate, including both design layouts checked against design rules and mask layouts used for fabrication, directly teaching that the layout is a mask layout or a design layout as expressly recited in the claim.
Claims 11 – 15 and 18 – 20 are rejected under 35 U.S.C. 103 as being unpatentable over US20230267265A1 (Oriordan) in view of US20200387660A1 (Cecil).
In regards to claim 11, (Oriordan) shows a non-transitory machine readable medium storing a program for execution by at least one processing unit and for detecting and correcting rule violations in a layout used for designing or manufacturing components on a substrate, the program comprising sets of instructions for:
receiving identification of a set of one or more rule-violating pixels in a pixel representation of the layout, each rule-violating pixel residing on a boundary of the shape and violating a rule that is enforced with respect to the layout; Oriordan [0057] teaches a method for performing pixel-based design rule checking (DRC) for rectilinear and curvilinear IC layout designs, wherein rasterized images of IC design data are processed in the pixel domain. Oriordan [0061] teaches rasterization of geometric layout data into a pixel-based representation in which each shape and its contours are defined by reference to a series of pixels, with boundary pixels of shapes explicitly represented in the rasterized image. Oriordan [0080] and [0081] and FIG. 13 teach that DRC markers are placed at locations to highlight one or more edges of the input design that are involved in DRC violations, i.e., identifying specific boundary pixels of a shape that violate a design rule enforced with respect to the layout. Oriordan [0081] and FIG. 14 illustrate a DRC marker created for a single-layer 30 nm minimum-width violation, expressly identifying the boundary pixels of a curvilinear shape that violate the width design rule. Oriordan [0105] teaches that the DRC processing instructions are specified as a set of instructions recorded on a computer readable storage medium for execution by one or more processing units, directly teaching the non-transitory machine readable medium as expressly recited in the claim.
receiving, for each identified rule-violating pixel, a violation value that expresses an amount by which the pixel violates the rule; Oriordan [0090] teaches that the trained neural network acts as a regression application, predicting pixel values that lie anywhere between 0.0 and 1.0 per pixel, constituting a per-pixel scalar value expressing the degree or amount of the DRC violation at each boundary pixel location. Oriordan [0093] further teaches that the per-pixel output of the neural network is considered as surfaces with peaks corresponding to DRC violation marker locations, wherein the peak height at each pixel directly encodes the amount by which that boundary pixel violates the rule, directly mapping to the violation value as expressly recited in the claim.
Oriordan differs from the claimed invention in that it does not explicitly disclose sets of instructions for using the violation values to adjust the pixel-based definition of the shape so that no boundary pixel of the shape violates the rule.
Cecil teaches sets of instructions for using the violation values to adjust the pixel-based definition of the shape so that no boundary pixel of the shape violates the rule; Cecil [0056] teaches that during the mask synthesis flow the system checks the mask and fixes any MRC violations that are found, expressly teaching automated correction of a shape based on detected rule violations. Cecil [0124] teaches that the mask rule checking system modifies the geometric shapes so as to remove the mask violations and may automatically modify the masks to remove the rule violations. Cecil [0125] and FIG. 13 teach the specific correction mechanism in which the system increases the size of the medial axis portion associated with the width violation to the specified width and adjusts the geometric shape of the mask, directly teaching adjustment of the shape definition based on detected violation information to eliminate the violation, constituting using a set of violation values to adjust the shape definition so that no boundary element of the shape violates the rule as expressly recited in the claim.
The motivation to combine Oriordan and Cecil at the effective filing date of the invention is to extend Oriordan’s pixel-domain violation detection to automated shape correction. Both references operate on the same pixel-based IC layout data, making the combination a predictable use of known techniques.
In regards to claim 12, (Oriordan) shows the non-transitory machine readable medium of claim 11, wherein:
the pixel representation of the shape comprises a value for each pixel along the boundary of the shape; Oriordan [0061] teaches that rasterization converts the geometric layout into a raster image in which each shape and its contours are defined by reference to a series of pixels, and Oriordan [0090] teaches that the trained network predicts pixel values between 0.0 and 1.0 per pixel for each pixel in the rasterized representation, directly teaching a pixel representation in which each pixel along the boundary of the shape has an associated value as expressly recited in the claim.
In regards to claim 13, (Oriordan) shows the non-transitory machine readable medium of claim 12, wherein the program further comprises:
a set of instructions for defining one error marker for several neighboring pixels that have been identified as violating the rule, wherein the adjusted pixel-based definition comprises a new value for each pixel of the several pixels for which the error marker has been defined; Oriordan [0080] and [0083] and FIG. 13 and FIG. 15 teach that DRC markers are polygon shapes created around groups of neighboring violating pixels, with a single DRC marker polygon covering multiple neighboring boundary pixels involved in a rule violation, directly teaching the definition of one error marker for several neighboring pixels as expressly recited in the claim. Oriordan [0083] further teaches that the DRC marker polygons are intentionally oversized by one pixel dimension value per edge so that the marker encompasses neighboring pixels, and Oriordan [0090] teaches that the regression output provides individual per-pixel values for each pixel within the marker region, directly teaching that the adjusted pixel-based definition comprises a new value for each pixel of the several pixels for which the error marker has been defined as expressly recited in the claim.
In regards to claim 14, (Oriordan) shows the non-transitory machine readable medium of claim 13, wherein:
the received violation values comprises receiving a violation value for each pixel associated with the error marker; Oriordan [0090] and [0093] teach that the regression output of the trained neural network provides a per-pixel scalar violation value from 0.0 to 1.0 for every pixel location in the rasterized image, including each pixel encompassed by the DRC error marker polygon, directly teaching receiving a violation value for each pixel associated with the error marker as expressly recited in the claim.
In regards to claim 15, (Oriordan) shows the non-transitory machine readable medium of claim 12, wherein:
the adjusted pixel-based definition comprises a new value for each identified rule-violating pixels; Oriordan [0083] teaches that DRC marker polygons are oversized by one pixel dimension value per edge, explicitly extending the marker region beyond the violating pixels, directly teaching that the adjusted definition encompasses the identified rule-violating pixels as expressly recited in the claim.
Oriordan differs from the claimed invention in that it does not explicitly disclose at least one pixel that lies along the shape’s boundary and that has not been identified as violating a rule.
Cecil teaches at least one pixel that lies along the shape’s boundary and that has not been identified as violating a rule; Cecil [0125] and FIG. 13 further teach that the shape correction expands the medial axis portion beyond the specific point of violation to adjust the broader shape region, consistent with updating both violating and adjacent non-violating pixel values.
The motivation to combine Oriordan and Cecil at the effective filing date of the invention is to extend Oriordan’s pixel-domain violation detection to automated shape correction. Both references operate on the same pixel-based IC layout data, making the combination a predictable use of known techniques.
In regards to claim 18, (Oriordan) shows the non-transitory machine readable medium of claim 11, wherein:
the rule ensures that no two edges of two nearby shapes are closer than a threshold distance; Oriordan [0084], FIG. 15, and FIG. 26 teach a minimum spacing DRC rule requiring a threshold minimum distance of separation between edges of two nearby shapes, specifically illustrating a 100 nm minimum spacing rule between two curvilinear shapes, directly teaching the spacing rule as expressly recited in the claim.
In regards to claim 19, (Oriordan) shows the non-transitory machine readable medium of claim 11, wherein:
the rule ensures that no two edges of one shape are closer than a threshold distance; Oriordan [0081] and FIG. 14 teach a minimum width DRC rule requiring that no two edges of one shape are closer than a threshold distance, specifically illustrating a 30 nm minimum-width violation marker placed on a curvilinear shape where the shape width falls below the threshold, directly teaching the width rule as expressly recited in the claim.
In regards to claim 20, (Oriordan) shows the non-transitory machine readable medium of claim 11, wherein:
the layout is either a mask layout for fabricating the components on the substrate or a design layout used for specifying a design of the components on the substrate; Oriordan [0057] and [0062] teach a pixel-based DRC method applied to IC layout designs used for designing and manufacturing semiconductor devices on a substrate, including both design layouts checked against design rules and mask layouts used for fabrication, directly teaching that the layout is a mask layout or a design layout as expressly recited in the claim.
Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US20230267265A1 (Oriordan) in view of US20200387660A1 (Cecil) as applied to claim 11 above, and further in view of US20170242333A1 (Li).
In regards to claim 16, (Oriordan modified by Cecil) does not show:
Li teaches wherein a set of instructions for using the set of violation values comprises a set of instructions for performing a variable resize operation that specifies different adjustment values for different pixels; Li [0034] and [0047] teach optimization using a Broyden-Fletcher-Goldfarb-Shanno (BFGS) technique that iteratively adjusts mask image pixel values. Li [0043] and [0045] teach that the gradient of the cost function with respect to SRAF mask image pixels is computed individually for each pixel location through the chain rule, yielding a different gradient magnitude for each pixel, so that different pixels receive different adjustment update values in each optimization step, directly teaching a variable resize operation specifying different adjustment values for different pixels as expressly recited in the claim.
The motivation to additionally combine Li with Oriordan and Cecil at the effective filing date of the invention is to enable variable per-pixel shape adjustments driven by the quantified violation values. Applying Li’s per-pixel optimization to the Oriordan-Cecil framework yields more precise correction with a reasonable expectation of success.
In regards to claim 17, (Oriordan modified by Cecil) does not show:
Li teaches wherein the pixel values are pixel dose values and the violation values are length values, wherein the set of instructions for using the set of violation values comprises a set of instructions for using a first function to convert the length values to dose values; Li [0036] teaches that edge placement error is computed as a length-domain violation value in nanometers expressing the amount by which a boundary evaluation point deviates from the required position. Li [0045] and Equations 11 and 12 teach a chain-rule conversion function that maps the edge placement error length-domain violation values through the optical model to gradient updates on mask pixel dose-domain values, directly teaching a first function that converts length violation values to pixel dose adjustment values as expressly recited in the claim. Cecil [0058] establishes that the mask pixel representation uses gray-level values analogous to dose values, providing the dose-pixel context in which Li’s length-to-pixel-value conversion operates.
The motivation to additionally combine Li with Oriordan and Cecil at the effective filing date of the invention is to enable variable per-pixel shape adjustments driven by the quantified violation values. Applying Li’s per-pixel optimization to the Oriordan-Cecil framework yields more precise correction with a reasonable expectation of success.
Response to Arguments
Applicant's arguments filed on July 17, 2026 have been fully considered but are not persuasive for the reasons set forth below.
Applicant argues that the combination does not disclose using violation values received on a per-pixel basis to adjust a pixel-based definition of the shape, and specifically that Cecil has no disclosure of performing an adjustment operation using violation values received on a per-pixel basis. This argument is not persuasive because it attacks Cecil individually where the rejection is based on the combination of references. The rejection does not rely on Cecil for the per-pixel violation values; Oriordan [0090] and [0093] teach a trained neural network that outputs a per-pixel scalar violation value between 0.0 and 1.0 for each boundary pixel, and Cecil [0056], [0124], and [0125] are relied upon for the automated correction mechanism that adjusts the shape definition to remove the violation. One cannot show nonobviousness by attacking references individually where the rejection is based on a combination of references.
Applicant further argues that none of the cited references discloses the auto-correction operation using the set of violation values to specify an initial set of adjustment values for pixels of the layout and then performing a variable resize operation that specifies a plurality of different adjustment values for adjusting values associated with a plurality of one or more rule-violating pixels and one or more non-rule-violating pixels. This limitation corresponds to canceled claim 6 and is taught by Li, which was of record. Li [0034] and [0043] and [0047] teach a BFGS optimization that takes per-pixel values as an initial adjustment set and iteratively computes a different per-pixel gradient update, thereby specifying a plurality of different adjustment values for a plurality of pixels, and Cecil [0125] teaches adjusting the broader shape region including at least one non-rule-violating boundary pixel.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANWER AHMED ALAWDI whose telephone number is (703)756-1018. The examiner can normally be reached Monday - Friday 8:00 am - 5:30 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached on (571)-272-7483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/ANWER AHMED ALAWDI/Examiner, Art Unit 2851
/JACK CHIANG/Supervisory Patent Examiner, Art Unit 2851
Prosecution Insights