Prosecution Insights
Last updated: April 19, 2026
Application No. 18/923,345

DATA MODULATION METHOD, COMMUNICATION DEVICE AND STORAGE MEDIUM

Non-Final OA §103§DP
Filed
Oct 22, 2024
Examiner
AGHDAM, FRESHTEH N
Art Unit
2632
Tech Center
2600 — Communications
Assignee
ZTE CORPORATION
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
86%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
546 granted / 660 resolved
+20.7% vs TC avg
Minimal +3% lift
Without
With
+3.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
10 currently pending
Career history
670
Total Applications
across all art units

Statute-Specific Performance

§101
7.7%
-32.3% vs TC avg
§103
48.7%
+8.7% vs TC avg
§102
22.6%
-17.4% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 660 resolved cases

Office Action

§103 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 6 is objected to because of the following informalities: As to claim 6, line 1, “the adjacent time domain” should be replaced with “an adjacent time domain”. Appropriate correction is required. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 8-11 of the instant application are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 11-15 of U.S. Patent No. 12,155,518. Although the claims at issue are not identical, they are not patentably distinct from each other because; Claim 1 of the instant application is anticipated by claim 11 of the above recited patent. Claims 8-11 of the instant application are anticipated by claims 12-15 of the above recited patent, respectively. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-4, 6-7, and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hasegawa (US 2016/0277936) in view of Batur (US 8,385,671). As to claim 1, Hasegawa teaches a data modulation method, comprising: performing a preset modulation operation on B consecutive data blocks, and configuring the B consecutive data blocks (i.e., data symbols) to have at least one of a same head-end reference signal sequence or a same tail-end reference signal sequence (abstract, Figs. 4 and 11, data symbol generation unit 1, CP insertion unit 9 produces data blocks (or data symbols) having at least one of the same head-end reference signal sequence or the same tail-end reference signal sequence, paragraphs [0004] and [0049], abstract); performing a filtering operation on the B consecutive data blocks (Figs. 4 and 11, shaping filter unit 6), and transmitting the filtered data on a physical resource (i.e., transmit channel(s)/frequencies), where B is greater than or equal to 2 (i.e., data symbols, Figs. 4, 10, and 11, paragraphs [0003] and [0010]). Hasegawa does not expressly teach filtering parameters of the filtering operation comprise f(p), the f(p) being: PNG media_image1.png 20 93 media_image1.png Greyscale , wherein E is equal to 1 or E is equal to 2 2 . It is officially noted that it is well known in the art that a two-tap filter with coefficients [1,1] typically refers to a simple low-pass, moving average, or accumulator filter used for signal shaping as evidenced by Batur (claim 3). It would have been obvious to one of ordinary skill in the art to use a filter with coefficients [1,1] in order to perform signal shaping or smoothing prior to signal transmission, which would improve signal transmission. As to claim 2, Hasegawa further teaches modulating bit data to be transmitted by using a preset modulation mode, the modulated data being transmitted in the B consecutive data blocks (abstract Figs. 4 and 11, signal generation unit 1, paragraph [0049]). As to claim 3, Hasegawa further teaches a reference signal sequence in a reference signal block within K consecutive time slots and a reference signal sequence and a data sequence in a data block within the K consecutive time slots being time domain data sequences (i.e., block interval, Figs. 11 and 30, paragraphs [0041], [0149], and 0142]) modulated by using a preset modulation mode (i.e., BPSK or QPSK, paragraph [0108]), where K is greater than or equal to 1, and the B consecutive data blocks being within the K consecutive time slots; and configuring all reference signal blocks and data blocks within the K consecutive time slots to have at least one of the same head-end reference signal sequence or the same tail-end reference signal sequence (Fig. 11, pilot signal generation unit 10, symbol insertion unit 2, paragraph [0095]). As to claim 4, Hasegawa does not expressly teach a time slot comprises N reference signal blocks and M data blocks, where N is greater than or equal to 0, and M is greater than or equal to 1 (i.e., block interval, Figs. 11 and 30, paragraphs [0041], [0149], and 0142]). As to claim 6, Hasegawa further teaches the adjacent time domain data comprises a reference signal sequence and a data sequence (Figs. 11, 30, and 31, pilot signal generation unit 10, symbol insertion unit 2, paragraph [0095]). As to claim 7, Hasegawa further teaches the preset modulation mode comprises a pi/2 binary phase shift keying (BPSK) modulation mode or a quadrature phase shift keying (QPSK) modulation mode (paragraphs [0049] and [0108]). As to claim 11, Hasegawa further teaches performing the filtering operation on the B consecutive data blocks, comprises: transforming the B consecutive data blocks into frequency domain data from time domain data (Fig. 11, DFT unit 5); transforming the filtering parameters into frequency domain filtering parameters (Fig. 11, waveform shaping filter 6); and filtering the frequency domain data by using a frequency domain dot product method according to the frequency domain filtering parameters (, which is inherent since, in frequency domain, filtering is performed by multiplying (or dot product method when dealing with vectors or sequences) the filter sequence (or kernel) with the frequency domain signal outputted from DFT unit 6, which is a vector. See paragraph [0057], frequency domain signal vector (expression 3), paragraph [0058]). Claim(s) 5, 9-10, and 13-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hasegawa in view of Batur, and further in view of Kuchi (US 10,812,300). As to claim 5, Hasegawa does not expressly teach the reference signal block and the data block are orthogonal frequency division multiplexing (OFDM) symbols. Kuchi further teaches an OFDM transmitter that uses QPSK or QAM modulation scheme (Figs. 1-3, column 4, lines 62-67, column 5, lines 1-28). It would have been obvious to one of ordinary skill in the art that the reference signal block and the data block are orthogonal frequency division multiplexing (OFDM) symbols in order to transmit high speed signal efficiently by splitting the transmit signal into many slower streams across numerous, closely spaced, orthogonal subcarriers, making systems robust against multipath fading, narrowband interference, and echoes. As to claim 9, Hasegawa and Batur do not expressly teach performing the filtering operation on the B consecutive data blocks, comprises: filtering the B consecutive data blocks by using a time domain convolution method according to the filtering parameters. Kuchi further teaches performing the filtering operation on the B consecutive data blocks, comprises: filtering the B consecutive data blocks by using a time domain convolution method according to the filtering parameters (abstract, column 1, lines 38-67, column 2, lines 1-3). It would have been obvious to one of ordinary skill in the art to perform the filtering operation on the B consecutive data blocks, comprises: filtering the B consecutive data blocks by using a time domain convolution method according to the filtering parameters in order to perform filtering in time domain instead of frequency domain. As to claim 10, Hasegawa and Batur do not expressly teach the time domain convolution method is a cyclic convolution method. Kuchi further teaches the time domain convolution method is a cyclic convolution method (abstract, column 1, lines 38-67, column 2, lines 1-3). It would have been obvious to one of ordinary skill in the art that the time domain convolution method is a cyclic convolution method in order to perform filtering to combine two discrete finite-length sequences in time domain. As to claim 13, Hasegawa further teaches performing Fourier transform on the time domain data before performing the filtering operation on the B consecutive data blocks (Figs. 4 and 11, DFT unit 5, shaping filter 6, paragraphs [0053]-[0058] and [0093]); and performing inverse Fourier transform on the filtered frequency domain data after performing the filtering operation on the B consecutive data blocks (Figs. 4 and 11, IDFT unit 82, paragraphs [0060]-[0061]). As to claim 14, Hasegawa and Batur do not expressly teach transmitting the filtered data on the physical resource, comprises: performing an RRC filtering operation or a filtering operation in a digital to analog converter (DAC) module on the filtered data, wherein the RRC is a root raised cosine function parameter. Kuchi further teaches performing a filtering operation (i.e., frequency shifting) in a digital to analog converter (DAC) module on the filtered data (Figs. 3C-3D, column 17, lines 58-67). It would have been obvious to one of ordinary skill in the art to perform a filtering operation in a digital to analog converter (DAC) module on the filtered data in order to prepare the waveform inputted to DAC to ultimately be transmitted. As to claim 15, Hasegawa and Batur do not expressly teach a memory, a processor, a program stored in the memory and executable in the processor, and a data bus for achieving connection and communication between the processor and the memory, the program implementing the data modulation method according to claim 1 when executed by the processor. Kuchi further teaches a memory, a processor, a program stored in the memory and executable in the processor, and (inherently) a data bus for achieving connection and communication between the processor and the memory, the program implementing a data modulation method when executed by the processor (column 20, lines 46-67). It would have been obvious to one of ordinary skill in the art to use a memory, a processor, a program stored in the memory and executable in the processor, and a data bus for achieving connection and communication between the processor and the memory, the program implementing the data modulation method according to claim 1 when executed by the processor in order to flexibly and/or efficiently perform signal modulation and transmission. As to claim 16, Hasegawa and Batur do not expressly teach a non-transitory computer-readable storage medium, wherein the storage medium has stored therein one or more programs that are executable by one or more processors to implement the data modulation method according to claim 1. Kuchi further teaches a non-transitory computer-readable storage medium, wherein the storage medium has stored therein one or more programs that are executable by one or more processors to implement a data modulation method (column 20, lines 46-67). It would have been obvious to one of ordinary skill in the art to use a non-transitory computer-readable storage medium, wherein the storage medium has stored therein one or more programs that are executable by one or more processors to implement the data modulation method according to claim 1 in order to flexibly and/or efficiently perform signal modulation and transmission. Allowable Subject Matter Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kuchi, US 2020/0076558, Figs. 1-15 Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRESHTEH N AGHDAM whose telephone number is (571)272-6037. The examiner can normally be reached Monday-Friday 10:30-7:00 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chieh M Fan can be reached at 571-272-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FRESHTEH N AGHDAM/ Primary Examiner, Art Unit 2632 1/20/2026
Read full office action

Prosecution Timeline

Oct 22, 2024
Application Filed
Jan 20, 2026
Non-Final Rejection — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
86%
With Interview (+3.3%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 660 resolved cases by this examiner. Grant probability derived from career allow rate.

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