Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendments and remarks submitted 08/14/2026 have been entered and considered, Claims 1, 8-10, 14, 18, 20 are amended. Claims 7, 17, 19 are canceled. This action is made final.
Response to Arguments
Applicant’s arguments filed on 08/14/2026 have been fully considered but are moot because they don’t apply to the reference(s)/combination(s) in the current rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Kavalieros et al (US20190080731) in view of Kim (US20180046325), Huang (US20190086730), Thompson et al (US20180350296) further in view of Bi et al (US20140375704).
Regarding Claim 20. Kavalieros teaches A circuitry for a touch and display panel (Kavalieros, abstract, the invention describes methods for providing data to be used in an in-memory computation at a memory device. In an embodiment a memory device comprises a first memory array and circuitry, coupled to the first memory array, to perform a data computation based on data stored at the first memory array. Prior to the computation , the first memory array receives the data from a second memory array of the memory device . The second memory array extends horizon tally in parallel with, but is offset vertically from, the first memory array. In another embodiment, a single integrated circuit die includes both the first memory array and the second memory array.
[0101] Depending on its applications, computing device 800 may include other components that may or may not be physically and electrically coupled to the board 802. These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, an accelerometer, a gyroscope, a speaker, a camera, and a mass storage device (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth).), comprising:
a touch sensing module configured to receive user touch input from the touch and display panel, wherein the user touch input corresponds to image data to be displayed on the touch and display panel (It is considered inherited that a touchscreen display such as a smart phone includes touch sensing to receive user touch input for display image data such as video and pictures.);
Kavalieros fails to explicitly teach, however, Kim teaches a display module comprising a touch and display driver integrated chip (TDDI) having memory embedded therein. (Kim, abstract, the invention describes an operating method of a touch driving integrated circuit (TOI) sensing a user touch on a touch panel includes: transmitting a first touch signal through a transmission line connected with the touch panel; receiving a first sensing signal through a reception line connected to the touch panel; receiving a first display noise through a detection line connected to the touch panel; and offsetting a noise included in the first sensing signal by using the first display noise.
[0141] As illustrated in FIG. 19, each of the touch driver block 1310 and the display driver block 1330 includes a circuit block that generates power, a memory that stores data, and a control unit that controls functions of the blocks. As such, in the case where the touch driver block 1310 and the display driver block 1330 are integrated in one semiconductor chip, the memory, the circuit block, the control logic, etc. may be implemented to be shared by the touch driver block 330 and the display driver block 1330.).
Kavalieros and Kim are analogous art because they both teach touchscreen devices. Kavalieros teaches method in touchscreen display brightness adjustment and in-memory computation at a memory device. Kim teaches touch and display driver including memory are integrated in one semiconductor chip. Therefore, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the claimed invention, to modify touchscreen display brightness adjustment (taught in Kavalieros), to further use the touch and display integrated chip (taught in Kim), so as to provide reduce the size of the touch screen device (Kim, [0003-0004]).
The combination of Kavalieros and Kim further teaches a display module comprising a touch and display driver integrated chip (TDDI) having a first non-volatile memory array and a second non-volatile memory array embedded therein (Kavalieros, abstract, the invention describes methods for providing data to be used in an in-memory computation at a memory device. In an embodiment a memory device comprises a first memory array and circuitry, coupled to the first memory array, to perform a data computation based on data stored at the first memory array. Prior to the computation, the first memory array receives the data from a second memory array of the memory device. The second memory array extends horizon tally in parallel with, but is offset vertically from, the first memory array. In another embodiment, a single integrated circuit die includes both the first memory array and the second memory array.
[0016] For example, a memory device may include a first array of memory cells
(or "memory array") and circuitry, coupled thereto, which is operable to detect a logic state based on one or more bits currently stored by the first array. Such circuitry may perform one or more data computations based on the logic state), wherein:
the first non-volatile memory array comprises a plurality of memory cells
preprogrammed to store luminance correction data, the second non-volatile memory array comprises a plurality of memory cells configured to receive and store the image data to be displayed on the touch and display panel (Kavalieros, [0016] For example, a memory device may include a first array of memory cells (or "memory array") and circuitry, coupled thereto, which is operable to detect a logic state based on one or more bits currently stored by the first array. Such circuitry may perform one or more data computations based on the logic state), and
The combination of Kavalieros and Kim fails to explicitly teach, however, Huang teaches a logic circuit configured to generate digital data using the luminance correction data (Kavalieros, abstract, the invention describes methods for providing data to be used in an in-memory computation at a memory device. In an embodiment a memory device comprises a first memory array and circuitry, coupled to the first memory array, to perform a data computation based on data stored at the first memory array. Prior to the computation, the first memory array receives the data from a second memory array of the memory device . The second memory array extends horizon tally in parallel with, but is offset vertically from, the first memory array. In another embodiment, a single integrated circuit die includes both the first memory array and the second memory array.
[0015] Embodiments discussed herein variously provide techniques and mechanisms for providing data to be used in an in-memory computation at a memory device. As used herein in the context of "in-memory computing," "in memory compute operation," "in-memory data computation" and related phrases, the term "in-memory" refers to the characteristic of an action being performed locally at a memory device which includes both a memory array and interface logic by which the memory device is to couple to, and communicate with, some memory controller, processor or other external agent.
[0016] For example, a memory device may include a first array of memory cells
(or "memory array") and circuitry, coupled thereto, which is operable to detect a logic state based on one or more bits currently stored by the first array. Such circuitry may
perform one or more data computations based on the logic state
Huang, [0032] FIG. 4 illustrates a display device according to one embodiment of the present invention. FIG. 5 illustrates a communication architecture according to one embodiment of the present invention. Please refer to FIGS. 4 and 5, in one embodiment of the present invention, a driving apparatus 11 of a display device comprises: a display module 160; a first substrate 50 including: a storage unit 110 electrically connected to the display module 160, the storage unit 110 saving display parameters of the display module 160, wherein the display parameters include a gamma correction code 112, a common electrode voltage setting code 114, and an uneven brightness distribution compensation module code 116; a second substrate 60 including: a control module (not shown) electrically coupled to the storage unit 110.
[0038], refers to FIG. 5, in one embodiment of the present invention, in a production line, a present driving method for a display device is provided. At first, a
common electrode voltage is adjusted to an optimal voltage value for each display
panel. The above-mentioned common electrode voltage setting code 114 is saved in
the storage unit 110. And, processes of gamma correction and mura compensation are performed to form a gamma correction code 112 and an uneven brightness distribution compensation module code 116. Then, the gamma correction code 112 and the uneven brightness distribution compensation module code 116 are saved in the storage unit 110, wherein different codes are saved in different addresses so that the timing control unit 120 can read them correctly. Therefore, each panel can have their own matching information (codes or parameters), so that it is unnecessary to provide an extra control board for each panel.);
The combination of Kavalieros and Kim teaches method in touchscreen display brightness adjustment and in-memory computation at a memory device. Huang teaches method of adjusting display brightness evenness by using display controller with embedded memory. Therefore, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the claimed invention, to modify touchscreen display brightness adjustment (taught in Kavalieros and Kim), to further implement the display brightness evenness method (taught in Huang), so as to provide the display with even luminance.
The combination of Huang, Kim and Kavalieros fails to explicitly teach, however, Thompson teaches stored in the first non-volatile memory array to adjust pixel inconsistencies in the image data stored in the second non-volatile memory array (Thompson, abstract, the invention describes a data processing system which stores a long-term history of pixel luminance values in a secure memory and uses those values to create burn-in compensation values. Those values are used to mitigate burn-in effect on a display. The long-term history can be updated over time with new, accumulated pixel luminance values.
[0006] In one embodiment, a data processing system can include: a frame buffer to store image data for display on a display device; a display device having a plurality of pixels, the display device coupled to the frame buffer; a first memory to store a plurality of snapshots, taken over time, of data representing pixel intensity or display intensity for each pixel in the plurality of pixels; a second memory to store an accumulation buffer that stores an accumulated value for each pixel in the plurality of pixels, each accumulated value derived by accumulating the display intensities from the plurality of snapshots for each pixel; a first processing system coupled to the frame buffer and to the first memory and to the second memory, the first processing system configured to accumulate the display intensities from the plurality of snapshots; and a second processing system coupled to the first processing system, the second processing system including a secure memory, wherein the second processing system is configured to add the accumulated value for each pixel in the plurality of pixels to a long-term history stored in the secure memory after the first processing system flushes the accumulated value for each pixel in the plurality of pixels to the long-term history which stores, for each pixel in the plurality of pixels, a long-term display intensity. In one embodiment, the plurality of pixels in the display includes all of the plurality of pixels in the display that are used to display one or more images on the display.
The long term history data for pixel is the data for correcting pixel to achieve even luminance levels. Therefore, the image data and the pixel correction data are stored in different memory sections. The system is using correction data in one memory section to correct display image data in another memory section.).
Huang, Kim, Kavalieros and Thompson are analogous art because they all teach method of display brightness/geometry correction. Thompson further teaches using saved burn-in data to compensate the pixel color/luminance value. Therefore, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the claimed invention, to modify the display brightness evenness method with embedded memory (taught in Huang, Kim and Kavalieros), to further use saved burn-in data to compensate the pixel color/luminance value (taught in Thompson), so as to provide even brightness for the display degrading overtime (Thompson, [0002-0003]).
The combination of Kavalieros, Kim, Huang and Thompson fails to explicitly teach, however, Bi teaches an input/output interface configured to convert the digital data into analog data and output the analog data to the touch and display panel for rendering (Bi, abstract, the invention describes display driver circuitry in the display analyzing the data to detect static data. The image data may contain static frames of data or static portions of a frame of data. In response to detection of static data, the display driver circuitry can take actions to avoid display damage due to bum-in effects. The display driver circuitry may reduce a peak luminance value associated with a peak luminance control algorithm, may reduce display brightness, may map image data to reduced brightness levels, or may take other actions to ensure that display pixels in the display are not damaged. Temperature information may be used in determining how to classify information as static data and in determining how significantly to reduce display pixel drive currents in response to the detection of static image data.
[0101] To accurately represent images on display 14, display 14 uses gamma curve selection circuitry to implement an appropriate gamma curve shape under a variety of operating conditions. An illustrative gamma curve is shown in FIG. 14A. As shown in FIG. 14A, gamma curve 200 maps different digital gray levels in an image to corresponding brightness values for the display pixels in display 14. The shape of curve 200 may be coarsely defined by points 201, which may correspond to a set of digital-to-analog converter input voltages (V255, Vl 91 , ... VO). In a color display, each color (red, green, and blue) may have a corresponding gamma curve. Maintaining a satisfactory gamma curve shape for each color under a variety of brightness and peak luminance control settings allows display 14 to present accurate images to a user. Care should be taken when adjusting gamma curve shape in response to different operating conditions. For example, linear scaling of a gamma curve when display brightness is reduced by 50% due to a user brightness change would result in suboptimal performance for a display.).
Kavalieros teaches method in touchscreen display brightness adjustment. Huang teaches method of adjusting display brightness evenness by using display controller with embedded memory. Bi further teaches using changing pixel voltage to compensate the pixel color/luminance value. Therefore, it would have been obvious to a person with ordinary skill in the art before the effective filing date of the claimed invention, to modify touchscreen display brightness adjustment (taught in Kavalieros, Kim, Huang and Thompson), to further implement changing pixel voltage to compensate the pixel color/luminance value (taught in Bi), so as to provide the display with even luminance.
Allowable Subject Matter
Claims 1-6, 8-16, 18 are allowed.
The following is a statement of reason for the indication of allowable subject matter:
Regarding Claim 1, it recites “A circuitry for adjusting image data to-be rendered on a display device, comprising:
a non-volatile memory, comprising a plurality of memory cells configured to store luminance correction data and geometry correction data of the display device;
a luminance adjusting circuit configured to receive the luminance correction data from the non-volatile memory and adjust the image data based on the luminance correction data; and
a geometry adjusting circuit configured to receive the geometry correction data from the non-volatile memory and perform spatial manipulation of pixels in the image data based on the geometry correction data, wherein the geometry correction data is selected from a group consisting of shape information of the display device for Fringe adjustment, Foveation correction data for foveated display, and Wobulation correction data for wobulated display.” in the context of Claim 1.
The prior arts of record either alone or in combination fails to teach or suggest the above quoted limitation of Claim 1. Therefore, Claim 1 is allowable over prior art.
Claims 2-6, 8-13 depend from Claim 1 with respective additional limitations. Therefore, Claims 2-6, 8-13 are allowable over prior art.
Regarding Claim 14, it recites “A circuitry for adjusting image data to-be rendered on a display device, comprising:
a non-volatile memory, comprising a plurality of memory cells configured to store luminance correction data and deburn -in correction data of the display device;
a luminance adjusting circuit configured to receive the luminance correction data from the non-volatile memory array and adjust the image data based on the luminance correction data; and
a deburn-in circuit configured to receive the deburn -in correction data from the nonvolatile memory array and dynamically adjust pixel output of the image data to compensate for darkening or discoloration, wherein the deburn-in circuit is further configured to apply stress to underused pixels during idle periods of the display device by increasing a current or maintaining the pixels in an active state for a prolonged duration to accelerate aging of the underused pixels.” in the context of Claim 14.
The prior arts of record either alone or in combination fails to teach or suggest the above quoted limitation of Claim 14. Therefore, Claim 14 is allowable over prior art.
Claims 15-16 depend from Claim 14 with respective additional limitations. Therefore, Claims 15-16 are allowable over prior art.
Regarding Claim 18, it recites “A circuitry in an electronic device supporting an always-on-display (AOD) mode, comprising:
a screen;
a non-volatile memory array (NVM) configured to store AOD information being displayed on the display panel in the AOD mode, wherein the AOD information comprises static content to be displayed during the AOD mode;
a random-access memory (RAM) configured to receive image data to be displayed on the screen in a non-AOD mode;
one or more processors; and
a memory storing instructions which, when executed by the one or more processors, cause the circuitry to:
selectively activate a subset of the plurality of pixels on the display panel based on the AOD information, wherein remaining pixels on the display panel are deactivated during the AOD mode to reduce power consumption, wherein the NVM is further configured to store multiple predefined AOD display configurations, and the circuitry is configured to switch between the predefined AOD display configurations based on the device status information, including battery level, usage patterns, or time of day.” in the context of Claim 18.
The prior arts of record either alone or in combination fails to teach or suggest the above quoted limitation of Claim 18. Therefore, Claim 18 is allowable over prior art.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Choi (US20190103069), abstract, the invention provides a display device for simultaneously performing display update and touch sensing in
some intervals. The display device senses a touch by dividing ground voltage into two and changing one ground voltage and a data driving circuit may comprise a configuration for the signal conversion between the two ground voltages.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIN SHENG whose telephone number is (571)272-5734. The examiner can normally be reached M-F 9:30AM-3:30PM 6:00PM-8:30PM.
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/Xin Sheng/ Primary Examiner, Art Unit 2619
