NonElection/Restrictions
Applicant's election without traverse of species 1 illustrated in Figure 4 encompasses claims 1-3 and 9-16 in the reply filed on 12/02/2025 was acknowledged and erred. Claims 14-15 encompass by Species 8 of Figure 16. Claims 16 encompasses by Species 12 of Figure 22 (See the restriction of record of 10/06/2025). Claims 14-16 are not found in the elected species 1 of Figure 4.
Claims 4-8 and 14-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to the nonelected multiple Species 2 to Species 12 (See the restriction of record of 10/06/2025), there being no allowable generic or linking claim.
Claims 1-3 and 9-13 are examined on the merit.
The requirement is still deemed proper and is therefore made FINAL.
Priority
This Application 18/923,737 is a continuation of Parent Application 18/275013, now US Patent 12165593. After carefully reviewing and finding the disclosure for continuation of claims 1-3 and 9-13 in the original specification there were no supports for the claims 1-3 and 9-13. Therefore, there are new subject matters below.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-3 and 9-13 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for pre-AIA the inventor(s), at the time the application was filed, had possession of the claimed invention.
The claims are generally narrative and indefinite, failing to conform with current U.S. practice. They appear to be a literal translation into English from a foreign document and are replete with grammatical and idiomatic errors.
Independent claim 1 lines 11-13 recites "an arrangement of an active layer of a transistor and a capacitor in at least one stage of the first shift register is the same as that of an active layer of a transistor and a capacitor in at least one stage of the second shift register" as being new subject matter.
The specification does not provide specific definitions of "an arrangement of an active layer of a transistor and a capacitor in at least one stage of the first shift register is the same as that of an active layer of a transistor and a capacitor in at least one stage of the second shift register" that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
Independent claim 1 last paragraph recites “outside of the display region, the third drive circuit and the fourth drive circuit are arranged sequentially in a second direction” as being new subject matter.
The original disclosure of the specification, discloses as follows:
[0014] The light emitting drive circuit is located at a side of the display region, and the first reset drive circuit is located between the light emitting drive circuit and the display region; the scan drive circuit is located between the first reset drive circuit and the display region; and the second reset drive circuit is located between the scan drive circuit and the display region.
[0099] In an exemplary embodiment, at least one second reset signal line extends along the second direction, and is arranged sequentially along the first direction. At least one scan signal line extends along the second direction, and is arranged sequentially along the first direction. At least one initial signal line extends along the second direction, and is arranged sequentially along the first direction. At least one data signal line extends along the first direction, and is arranged sequentially along the second direction.
The specification does not provide specific definitions of “outside of the display region, the third drive circuit and the fourth drive circuit are arranged sequentially in a second direction” that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
Claim 2 recites "outside of the display region, the first drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction" as being new matter.
The specification does not provide specific definitions of "outside of the display region, the first drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction" that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
Claim 3 recites "outside of the display region, the second drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction" as being new matter.
The specification does not provide specific definitions of "outside of the display region, the second drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction" that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
Claims 10-12 recite "wherein outside of the display region, the fourth scan transistor, the first scan capacitor and the sixth scan transistor in the second shift register are arranged sequentially in the second direction, the second scan capacitor and the fifth scan transistor in the second shift register are arranged sequentially in the second direction, the fifth scan transistor, the eighth scan transistor, the third scan transistor and the first scan transistor in the second shift register are arranged sequentially in the second direction " as being new matter.
The original disclosure of the specification, discloses as follows:
[0156] As shown in FIG. 9, the scan shift register includes a first scan transistor GT1 to an eighth scan transistor GT8, a first scan capacitor GC1 and a second scan capacitor GC2. The first scan capacitor GC1 includes a first electrode plate GC11 and a second electrode plate GC12, and the second scan capacitor GC2 includes a first electrode plate GC21 and a second electrode plate GC22.
[0206] In an exemplary embodiment, the active layer GT41 of the fourth scan transistor and the active layer GT51 of the fifth scan transistor form an integrated structure. The active layer GT61 of the sixth scan transistor and the active layer GT71 of the seventh scan transistor form an integrated structure. The active layer GT11 of the first scan transistor to the active layer GT81 of the eighth scan transistor extend along the first direction.
The specification does not provide specific definitions of “the fourth scan transistor, the first scan capacitor and the sixth scan transistor in the second shift register are arranged sequentially in the second direction, the fifth scan transistor, the eighth scan transistor, the third scan transistor and the first scan transistor in the second shift register are arranged sequentially in the second direction” that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
As to claim 13, recites "the first scan transistor, the seventh scan transistor, the sixth scan transistor in the second shift register are arranged sequentially in a first direction; the fifth scan transistor and the fourth scan transistor in the second shift register are arranged sequentially in the first direction; the first direction intersects with the second direction" as being new subject matter.
The specification does not provide specific definitions of “new subject matter” that preclude the examiner's interpretation of this limitation. The claimed limitation was not found in the elected Figure 4. The examiner is respectfully requesting how the original disclosure and the drawing describe the new subject matter.
The dependent claims are rejected for depending upon a rejected base claim.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. US 2021/0013290 in view of Moon et al. US 2010/0302230.
Regarding claim 1, Park teaches a display panel (see ¶58, and see also Figs 2-10), comprising: a substrate (a panel PNL has TFT array substrate, Figs 2, see Park ¶11, ¶54, and see also ¶162), a display region (active region A/A, ¶60-¶61), a non-display region (a non-active area N/A, See Park ¶61-¶62), wherein the display region is provided with sub-pixels arranged in an array (see Park ¶55-¶61, ¶134), at least one sub-pixel comprises a light emitting device and a pixel circuit, and the pixel circuit is connected with an anode of the light emitting device (see Park Fig 4, ¶61, ¶106, ¶107);
the non-display region is provided with a first drive circuit, a second drive circuit, a third drive circuit and a fourth drive circuit (1st GDC, 2nd GDC, 3rd SCID, 4th SCID in non-active area N/A, See Park ¶60, ¶79-¶88, Fig 2);
the first drive circuit comprises: a plurality of cascaded first shift registers (See Park ¶74-¶86), the second drive circuit comprises: a plurality of cascaded second shift registers (See Park ¶74-¶86), a first shift register and a second shift register (See Park ¶74-¶86) each comprise a transistor (T1, T2) and an active layer (130, 140) (See Park ¶154, ¶188, ¶ 190, Fig 7);
outside of the display region, the third drive circuit and the fourth drive circuit are arranged sequentially in a second direction (3rd SDIC, 4th SDIC, See Park Fig 2 and ¶90-¶95).
Park fails to teach "an arrangement of an active layer of a transistor and a capacitor in at least one stage of the first shift register is the same as that of an active layer of a transistor and a capacitor in at least one stage of the second shift register."
Moon teaches the details of an arrangement of an active layer 204a of a transistor T1 and a capacitor C in at least one stage of the first shift register ST1 is the same as that of an active layer 234a of a transistor and a capacitor in at least one stage of the second shift register ST2. (See Moon ¶63-¶64, Figs 1-2, 7E).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to substitute the first and second shift registers taught by Moon for the first and second shift registers of Park such that an arrangement of an active layer of a transistor and a capacitor in at least one stage of the first shift register is the same as that of an active layer of a transistor and a capacitor in at least one stage of the second shift register. The motivation for doing so would have been to provide a display device that is adapted to improve the response time of the display by reducing the charge/discharge time of the thin film transistor. (Moon ¶13). See KSR Int'l. Co. v. Teleflex, Inc., 550 U.S. 398, 401 (2007) (holding that the simple substitution of one known element for another to obtain predictable results is generally obvious).
As to claim 2, Moon teaches the display panel according to claim 1, wherein outside of the display region, the first drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction. (ST1, ST3, ST4, See Moon Fig 1).
As to claim 3, Moon teaches the display panel according to claim 1, wherein outside of the display region, the second drive circuit, the third drive circuit and the fourth drive circuit are arranged sequentially in the second direction. (ST2, ST3, ST4, See Moon Fig 1).
Claim(s) 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Park and Moon as applied to claim 1 above, and further in view of Tsai et al. US 2009/0304138.
AS to claim 9, Park and Moon teach everything, except for at least one stage of the second shift register comprises a first scan transistor to an eighth scan transistor, a first scan capacitor and a second scan capacitor.
Tsai teaches at least one stage of the second shift register 203c comprises a first scan transistor (T1) to an eighth scan transistor (T8) , a first scan capacitor (C1) and a second scan capacitor (C2) (See Fig 3C, ¶48-¶53).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement at least one stage of the second shift register 203c comprises a first scan transistor (T1) to an eighth scan transistor (T8) , a first scan capacitor (C1) and a second scan capacitor (C2), as Tsai teach, to modify Park and Moon . The motivation for doing so would sufficiently resist the clock coupling effect occurring in clock signal, while optimizing waveform output of the shift register. (Tsai ¶ 8).
As to claim 10, Tsai teaches outside of the display region (203, Fig 3), the fourth scan transistor (T4), the first scan capacitor (C1) and the sixth scan transistor (T6) in the second shift register (ST2) are arranged sequentially in the second direction (Fig 3).
As to claim 11, Tsai teaches outside of the display region, the second scan capacitor (C2) and the fifth scan transistor (T5) in the second shift register (203) are arranged sequentially in the second direction (Fig 3).
As to claim 12, Tsai teaches outside of the display region, the fifth scan transistor (T5), the eighth scan transistor (T8), the third scan transistor (Y3) and the first scan transistor (T1) in the second shift register (203 ) are arranged sequentially in the second direction (Fig 3).
Claim(s) 13 is rejected under 35 U.S.C. 103 as being unpatentable over Park and Moon as applied to claim 1 above, and further in view of Zeng et al. US 2021/0407426.
As to claim 13, Park and Moon teach everything, except for the first scan transistor, the seventh scan transistor, the sixth scan transistor in the second shift register are arranged sequentially in a first direction; the fifth scan transistor and the fourth scan transistor in the second shift register are arranged sequentially in the first direction; the first direction intersects with the second direction.
Figure 1 of Zeng teaches the first scan transistor (T1), the seventh scan transistor (T7), the sixth scan transistor (T6) in the second shift register (100) are arranged sequentially in a first direction (horizontal direction, see ¶79); the fifth scan transistor (T5) and the fourth scan transistor (T4) in the second shift register (100) are arranged sequentially in the first direction (see ¶79); wherein the first direction intersects with the second direction (horizontal and vertical directions, ¶140).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement the teaching of Zeng, to modify Park and Moon . The motivation for doing so would reduce the length of the channel, improve the process matching, form a better channel (Zeng ¶ 79).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Nguyen whose telephone is 571-272-7697. The examiner can normally be reached M-F 8am-5pm Eastern Time.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached on 571-272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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KEVIN M NGUYEN
Patent Examiner, Art Unit 2628
/Kevin M Nguyen/Primary Examiner, Art Unit 2628 Telephone: (571) 272-7697
Email: kevin.nguyen2@uspto.gov