Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of the Claims
This action is in response to the applicant’s amendment dated June 16, 2026. Claims 1-9 are pending. Claims 5-9 are new.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-4, 6 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Tateishi et al., U.S. Patent Application Publication 2025/0244996 A1 in view of Yamada et al., U.S. Patent Application Publication 2022/0286321 A1.
As to claim 1, Tateishi et al. discloses a disclose a vehicle configured to be coupled to a communication apparatus (Tateishi et al., fig. 1 ¶ 42-44), the vehicle comprising:
a target unit that is provided to the vehicle and that comprises a first target unit and a second target unit (Furthermore, as a result of the processor 301 of a target ECU 320 (the ECU 300A in the present example) among the ECUs 300A, 300B, 300C, 300D, and 300E) (Tateishi et al., figs. 2, 10 ¶ 0004, 0021, 0068-0069); and
an intermediate unit that is provided to the vehicle and that is configured to mediate communication between the communication apparatus and the target unit (The OTA master 200 (intermediate unit) is connected to the ECUs 300A, 300B, 300C, 300D, and 300E via on-board buses 400A, 400B, and 400C, which are Controller Area Network (CAN) buses or the like. Specifically, the ECUs 300A and 300B are connected to the bus 400A. The ECUs 300C and 300D are connected to the bus 400B. The ECU 300E is connected to the bus 400C. The OTA master 200 can mutually communicate with each of the ECUs 300A, 300B, 300C, 300D, and 300E) (Tateishi et al., figs. 2, 10 ¶ 0050, 0068-0070), wherein the first target unit comprises one or more first target unit processors and one or more first target unit memories coupled to the one or more first target unit processors (The ECU 300 includes a processor 301, a non-volatile memory 302, a volatile memory 303, a communication I/F 304, and an input/output I/F (I/O) 305; i.e. ECUs 300A, 300B, 300C, 300D, and 300E.) (Tateishi et al., figs. 2, 10 ¶ 0050, 0061, 0068-0070),
the second target unit comprises one or more second target unit processors and one or more second target unit memories coupled to the one or more second target unit processors (The ECU 300 includes a processor 301, a non-volatile memory 302, a volatile memory 303, a communication I/F 304, and an input/output I/F (I/O) 305; i.e. ECUs 300A, 300B, 300C, 300D, and 300E.) (Tateishi et al., figs. 2, 10 ¶ 0050, 0061, 0068-0070),
the intermediate unit comprises one or more intermediate unit processors and one or more intermediate unit memories coupled to the one or more intermediate unit processors (The OTA master 200 includes a processor 201, a non-volatile memory 202, a volatile memory 203, and a communication interface (I/F) 204.) (Tateishi et al., figs. 2, 10 ¶ 0050, 0061, 0068-0070),
the one or more first target unit memories comprise a first receive memory of a first memory size The target ECU 320 stores the received update data 610 in the non-volatile memory 302. The target ECU 320 decrypts the PG verification data 602 included in the update data 610 using the key data 307 stored in the non-volatile memory 302. The target ECU 320 verifies the updated program 601 included in the update data 610 by calculating a hash value of the updated program 601, and comparing the calculated hash value with a hash value obtained by decrypting the PG verification data 602. If the verification of the updated program 601 is successful, or that is, if the two hash values match, the target ECU 320 updates the control program 306 by installing the updated program 601) (Tateishi et al., figs. 2, 10 ¶ 0088),
the one or more second target unit memories comprise a second memory size smaller than the first memory size (the ECU 300 is either an ECU including a single-bank storage unit or an ECU including a double-bank storage unit depending on the number of logical constituent units in the non-volatile memory 302 included in the ECU 300; each of the ECUs 300B, 300C, 300D, and 300E i.e. single bank storage unit ECU is less memory then double bank ECU) (Tateishi et al., figs. 2, 10 ¶ 0073-0074, 0088) and
the one or more OTA server processors are configured to perform a process (Tateishi et al., figs. 2, 10-13) comprising
in response to receiving a first message from the communication apparatus, determining whether to divide the first message based on a destination of the first message and a corresponding memory size of a receive memory of the destination (0112),
transmitting the first message to the first target unit without dividing the first message when the destination is the first target unit ( The OTA server 50 transmits the first update data to the OTA master 200 transmits the update data 610 to the target ECU 320 (first target unit). The target ECU 320 stores the received update data 610 in the non-volatile memory 302. The target ECU 320 decrypts the PG verification data 602 included in the update data 610 using the key data 307 stored in the non-volatile memory 302. The target ECU 320 verifies the updated program 601 included in the update data 610 by calculating a hash value of the updated program 601, and comparing the calculated hash value with a hash value obtained by decrypting the PG verification data 602. If the verification of the updated program 601 is successful, or that is, if the two hash values match, the target ECU 320 updates the control program 306 by installing the updated program 601) (Tateishi et al., figs. 2, 10 ¶ 0087, 0088), and
generating first divided messages obtained by division of the first message and successively transmitting the first divided messages to the second target unit when the destination is the second target unit (The OTA server 50 transmits the second update data 630 to the OTA master 200 (step S43). Upon receiving the second update data 630, the OTA master 200 transfers the received second update data 630 to the selected ECU 310 (step S44). Upon receiving the second update data 630, the selected ECU 310 stores the second update data 630 in the non-volatile memory 302 (step S45). The selected ECU 310 verifies the second partial data 612 included in the second update data 630 using the ECU verification data 631 (step S46). This concludes the split download processing.) (Tateishi et al., figs. 2, 10-13 ¶ 60, 84, 119).
Tateishi does not disclose the one or more second target unit memories comprise a second receive memory of a second memory size smaller than the first memory size, and the one or more intermediate unit processors are configured to perform a process comprising in response to receiving a first message from the communication apparatus, transmitting the first message to the first target unit and in response to receiving the first message from the communication apparatus, generating first divided messages obtained by division of the first message and successively transmitting the first divided messages to the second target unit.
In an analogous art, Yamada et al. discloses the one or more first target unit memories comprise a first receive memory of a first memory size (EPAS 231 (i.e. first target unit) includes a CAN controller built therein, extracts control data from the transmitted CAN-FD signal, and executes control of EPAS (i.e. EPAS ECU received the full 64 bytes without dividing)) (Yamada, figs. 1-4 ¶ 0028, 0040, 0050) the one or more second target unit memories comprise a second receive memory of a second memory size smaller than the first memory size (the Ethernet hub device 22 protocol-converts a control signal included in the transmitted Ethernet signals to a CAN signal and outputs the CAN signal to the steering wheel ECU 241 and the tilt telescopic ECU 242 or the like. The Ethernet hub device 22 protocol-converts the CAN signals transmitted from the steering wheel ECU 241 and the tilt telescopic ECU 242 or the like to Ethernet signals and transmits the Ethernet signals to the trunk network (i.e. ECU 241 and 242 i.e. second target unit) received the 8 bytes which is less than EPAS 231 i.e. first target unit)) (Yamada et al., figs. 1-4 ¶ 0028, 0040, 0050-0051), and
the one or more intermediate unit processors are configured to perform a process (The CAN hub devices 31 and 32 transmit/receive CAN-FD signals to/from the central processing unit 10 via trunk networks. The CAN-FD signals transmitted from the central processing unit 10 to the CAN hub devices 31 and 32 include a control signal for an engine or the like. The CAN hub devices 31 and 32 output control signals included in the CAN-FD signals transmitted from the central processing unit 10 (intermediate unit) as they are, perform data length conversion on the control signals to output CAN signals, perform protocol conversion on the control signals to output local interconnect network (LIN) signals, or perform signal conversion on the control signals to output analog control signals) (Yamada et al., figs. 1-4 ¶ 0027, 0028) comprising in response to receiving a first message from the communication apparatus, transmitting the first message to the first target unit (The CAN hub devices 31 and 32 transmit/receive CAN-FD signals to/from the central processing unit 10 (intermediate unit) via trunk networks (communication apparatus). The data length conversion section 53 performs data length conversion on the CAN-FD signal sent from the distributing/aggregating section 51 to generate a CAN signal and sends the CAN signal to the communication port 44. The CAN signal is 8 bytes and the CAN-FD signal is 64 bytes at most, and therefore, in this data length conversion, processing in which 64-byte data is divided into eight 8-byte data is performed, The Ethernet hub device 22 protocol-converts a control signal included in the transmitted Ethernet signals to a CAN-FD signal (i.e. 64 bytes not divided) and outputs the CAN-FD signal to an electric power assist steering (EPAS) 231 or the like. EPAS 231 includes a CAN controller built therein, extracts control data from the transmitted CAN-FD signal, and executes control of EPAS (i.e. EPAS ECU received the full 64 bytes without dividing)) (Yamada et al., figs. 1-4 ¶ 0028, 0040, 0050) and in response to receiving the first message from the communication apparatus, generating first divided messages obtained by division of the first message and successively transmitting the first divided messages to the second target unit (The CAN hub devices 31 and 32 transmit/receive CAN-FD signals to/from the central processing unit 10 (intermediate unit) via trunk networks (communication apparatus). The data length conversion section 53 performs data length conversion on the CAN-FD signal sent from the distributing/aggregating section 51 to generate a CAN signal and sends the CAN signal to the communication port 44. The CAN signal is 8 bytes and the CAN-FD signal is 64 bytes at most, and therefore, in this data length conversion, processing in which 64-byte data is divided into eight 8-byte data is performed, The Ethernet hub device 22 protocol-converts a control signal included in the transmitted Ethernet signals to a CAN signal and outputs the CAN signal to the steering wheel ECU 241 and the tilt telescopic ECU 242 or the like. The Ethernet hub device 22 protocol-converts the CAN signals transmitted from the steering wheel ECU 241 and the tilt telescopic ECU 242 or the like to Ethernet signals and transmits the Ethernet signals to the trunk network (i.e. ECU 241 and 242 received the 8 bytes which is divided)) (Yamada et al., figs. 1-4 ¶ 0028, 0040, 0050-0051).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to implement Tateishi et al. teachings into Yamada et al. teaching of the one or more second target unit memories comprise a second receive memory of a second memory size smaller than the first memory size, and the one or more intermediate unit processors are configured to perform a process comprising transmitting the first message to the first target unit and generating first divided messages obtained by division of the first message, as claimed, and successively transmitting the first divided messages to the second target unit, as claimed, with a reasonable expectation of success. This combination effectively performs the information transmission path from CPU to each vehicle-mounted device is achieved by simpler network configuration and smaller memory size by arranging the network hub apparatus to each zone of vehicle.
As to claim 2, Tateishi et al., as modified by Yamada et al., discloses the vehicle according to claim 1. Tateishi et al. further discloses wherein the one or more intermediate unit processors are configured to perform a process comprising, in response to receiving from the second target unit second divided messages obtained by division of a second message, combining the second divided messages to generate a combined message and transmitting the combined message to the communication apparatus (0123).
As to claim 3, Tateishi et al., as modified by Yamada et al., discloses the vehicle according to claim 1. Tateishi et al. further discloses wherein the one or more intermediate unit memories are configured to store memory size information comprising the first memory size of the first receive memory and the second memory size of the second receive memory, and the one or more intermediate unit processors are configured to perform a process comprising, determining whether to divide the first message based on the memory size information in response to receiving the first message from the communication apparatus (0111-0112).
As to claim 4, Tateishi et al., as modified by Yamada et al., discloses the vehicle according to claim 2. Tateishi et al. further discloses wherein the one or more intermediate unit memories are configured to store memory size information comprising the memory size of the first receive memory and the memory size of the second receive memory, and the one or more intermediate unit processors are configured to perform a process comprising, determining whether to divide the first message based on the memory size information in response to receiving the first message from the communication apparatus (0111-0112).
As to claim 6, Tateishi et al., as modified by Yamada et al., discloses the vehicle according to claim 1. Yamada et al. further discloses wherein the one or more intermediate unit processors are configured to perform a process comprising:
successively transmitting the first divided messages to the second target unit at predetermined intervals (0036, Figure 3).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to implement claim 1, as disclosed by Tateishi et al., as modified by Yamada et al., with using a predetermined transmitting interval, as claimed, as disclosed by Yamada et al., with a reasonable expectation of success, to utilize a standard transmission of the data to where it is needed.
As to claim 8, Tateishi et al., as modified by Yamada et al., discloses the vehicle according to claim 1. Tateishi et al. further discloses , wherein the one or more intermediate unit memories comprise a receive memory having a memory size larger than the first memory size and the second memory size (Figure 11, 0113).
Response to Arguments
Applicant's arguments filed June 16, 2026 have been fully considered but they are not persuasive.
Applicant argued the amendments to claim 1 are not disclosed in the references.
Applicant correctly found the publication number for Tateishi et al., U.S. Patent Application Publication 2025/0244996 A1. A previous reference was inadvertently left in the rejection.
Applicant argued the references do not disclose the amended claim limitations. The combination of Tateishi et al. and Yamada et al. discloses the claimed invention, as indicated above. It would have been obvious to one having ordinary skill in the relevant art to compare the data message size would fit, given the memory limitation, and divide the message and obtain appropriate memory storage. Tateishi et al. discloses a similar system to determine memory location for a message.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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MICHAEL BERNS
Primary Examiner
Art Unit 3667
/MICHAEL A BERNS/Primary Examiner, Art Unit 3667
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