Prosecution Insights
Last updated: October 02, 2026
Application No. 18/923,973

INTERACTION CONTROL METHOD AND APPARATUS, MEDIUM, AND ELECTRONIC DEVICE

Non-Final OA §101§102§103§112
Filed
Oct 23, 2024
Priority
Dec 21, 2023 — CN 202311777989.2
Examiner
REPSHER III, JOHN T
Art Unit
Tech Center
Assignee
Beijing Zitiao Network Technology Co., Ltd.
OA Round
1 (Non-Final)
58%
Grant Probability
Moderate
1-2
OA Rounds
1y 4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allowance Rate
208 granted / 356 resolved
-1.6% vs TC avg
Strong +48% interview lift
Without
With
+48.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
31 currently pending
Career history
384
Total Applications
across all art units

Statute-Specific Performance

§101
10.1%
-29.9% vs TC avg
§103
47.7%
+7.7% vs TC avg
§102
10.6%
-29.4% vs TC avg
§112
24.1%
-15.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 356 resolved cases

Office Action

§101 §102 §103 §112
DETAILED ACTION This action is in response to the original filing on 10/23/2024. Claims 1-16 are pending and have been considered below. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Objections Claims 2-13 and 15 are objected to because of the following informalities: Claims 2-13, 15 recite ‘The method according to’; however, it should recite - - The interaction control method according to - -. Claim 15 is an improper independent claim and should be re-written in proper independent claim format. Appropriate correction is required. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: a display module, configured to display a first interaction control, a first determination module, configured to determine at least one target axial direction, a second determination module, configured to determine an array range of a first target object and a drawing module, configured to array and draw in claim 14 and a processing apparatus is configured to execute the computer program on the storage apparatus to implement an interaction control method in claim 16. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claims 1, 14, and 16, the claims recites “the target axial direction”. It is unclear how “the target axial direction” is intended to relate to the previously recited “at least one target axial direction”. For the purposes of examination, this limitation is interpreted as: a second target axial direction Regarding claims 1, 14, and 16, the claims recites “the target array quantity”. It is unclear how “the target array quantity” is intended to relate to the previously recited “a determined target array quantity”. For the purposes of examination, this limitation is interpreted as: a second target array quantity Regarding claim 3, the claim recites “the sliding operation for a second interaction control corresponding to any axial direction in the target axial direction”. It is unclear how “the sliding operation for a second interaction control corresponding to any axial direction in the target axial direction” is intended to relate to the previously recited “a sliding operation for any axial direction in the target axial direction”. For the purposes of examination, this limitation is interpreted as: a second sliding operation for a second interaction control corresponding to any axial direction in the target axial direction Regarding claim 4, the claim recites “the sliding distance corresponding to the sliding operation”. It is unclear how “the sliding distance corresponding to the sliding operation” is intended to relate to the previously recited “a sliding distance of the sliding operation”. For the purposes of examination, this limitation is interpreted as: a second sliding distance corresponding to the sliding operation Regarding claim 4, the claim recites “the sliding direction of the sliding operation”. It is unclear how “the sliding direction of the sliding operation” is intended to relate to the previously recited “a sliding direction”. For the purposes of examination, this limitation is interpreted as: a second sliding direction of the sliding operation Regarding claim 9, the claim recites “displaying the array control at the second target object corresponding to the first target object, and deleting the first target object obtained by arraying the second target object”. It is unclear how “the second target object corresponding to the first target object” is intended to relate to the previously recited “a second target object in a virtual scene”. It is unclear how “the first target object obtained by arraying the second target object” is intended to relate to the previously recited “a first target object”. For the purposes of examination, this limitation is interpreted as: displaying the array control at a third target object corresponding to the first target object, and deleting a fourth target object obtained by arraying the second target object Regarding claim 12, the claim recites “the first target object obtained through arraying and drawing”. It is unclear how “the first target object obtained through arraying and drawing” is intended to relate to the previously recited “a first target object according to the target axial direction”. For the purposes of examination, this limitation is interpreted as: a second target object obtained through arraying and drawing Regarding claim 13, the claim recites “the adjusted first target objects to form a whole”. It is unclear how “the adjusted first target objects to form a whole” is intended to relate to the previously recited “two adjacent first target objects”. For the purposes of examination, this limitation is interpreted as: adjusted second target objects to form a whole Regarding claims 2-13 and 15, claims 2-13 and 15 are also rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for depending on an indefinite parent claim. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claim 15 is rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. Regarding claim 15, claim 15 recites a computer-readable medium. However, the specification does not define what type of medium is included in the computer-readable medium. According to MPEP 2111, examiner is obliged to give the terms or phrases their broadest interpretation definition awarded by one of an ordinary skill in the art unless applicant has provided some indication of the definition of the claimed terms or phrases. Therefore, examiner interprets the computer-readable medium as including any type of medium which includes carrier medium such as signals. Signals are directed to a non-statutory subject matter. Thus, claim 15 is rejected under 35 U.S.C. 101 for directing to a non-statutory subject matter. Applicant is advised to amend to “a non-transitory computer-readable medium” to overcome this rejection. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-12 and 14-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sanwal et al. (US 11017145 B1, published 05/25/2021), hereinafter Sanwal. Regarding claim 16, Sanwal teaches the claim comprising: An electronic device, comprising: a storage apparatus; and a processing apparatus, wherein a computer program is stored on the storage apparatus, and the processing apparatus is configured to execute the computer program on the storage apparatus to implement an interaction control method, comprising (Sanwal Figs. 1-15; col. 1 [line 53], a non-transitory, computer-readable medium storing instructions is described. The instructions, when executed by a processor, direct the processor to perform a method; col. 1 [line 65], a system is described that includes a user interface for displaying an electronic circuit layout of an integrated circuit, a memory device that stores instructions, and a processor configured to execute the instructions for performing a method for modifying the electronic circuit layout using one or more electronic design automation (EDA) tools): displaying a first interaction control, wherein the first interaction control comprises a plurality of axial directions for a user to select (Sanwal Figs. 1-15; col. 7 [line 55], The circuit element is the one from which an array of the circuit elements is to be designed. FIG. 4A illustrates a single circuit element 411 that is selected for creating an array of circuit elements 411. When the circuit element 411 is selected, an attribute window is displayed for changing one or more attributes (or properties) related to the array. FIG. 4C illustrates an attribute window 400 that is displayed on a graphical user interface for editing one or more attributes of an array group including a plurality of circuit elements, according to some embodiments; col. 8 [line 4], The attribute window 400 (also referred to as an option form) is invoked from a dropdown menu (e.g., FILE menu) of the electronic design automation (EDA) tool, such as a layout editor, used for designing the electronic circuit design; col. 8 [line 9], The attribute window 400 includes a field 401 for providing a desired name (ArrayGroup0, in this case) to the array group, a row field 403, a column field 405, an X Spacing field 407, and a Y Spacing field 409. The row field 403 is used to provide the desired number of rows in the array group. The column field 405 is used to provide a desired number of columns in the array group. The default number of rows and columns in the array group are 1, since a single circuit element 411 is selected. The X Spacing field 407 is used to provide the horizontal separation (0.07 units, in this case) between adjacent circuit elements in the array. The Y Spacing field 409 is used to provide the vertical separation (0.07 units, in the case) between adjacent circuit elements in the array); determining at least one target axial direction in response to a selection operation for any axial direction in the plurality of axial directions; determining an array range of a first target object according to the target axial direction; and arraying and drawing, in response to a determined target array quantity, the first target object according to the target array quantity and the array range (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claims 1 and 14, the claims contain substantially similar limitations to those found in claim 16. Consequently, the claims are rejected for the same reasons. Regarding claim 2, Sanwal teaches all the limitations of claim 1, further comprising: wherein the target array quantity is determined by: determining, in response to a sliding operation for any axial direction in the target axial direction, a target array quantity in the any axial direction in the target axial direction according to a sliding direction and a sliding distance of the sliding operation (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 3, Sanwal teaches all the limitations of claim 2, further comprising: wherein determining, in response to the sliding operation for any axial direction in the target axial direction, the target array quantity in the any axial direction in the target axial direction according to the sliding direction and the sliding distance of the sliding operation comprises: determining, in response to the sliding operation for a second interaction control corresponding to any axial direction in the target axial direction, the target array quantity in the any axial direction in the target axial direction according to the sliding direction and the sliding distance of the sliding operation (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 4, Sanwal teaches all the limitations of claim 2, further comprising: wherein determining the target array quantity in any axial direction in the target axial direction according to the sliding direction and the sliding distance of the sliding operation comprises: in response to the sliding direction of the sliding operation being a first direction, determining to increase an array quantity in the any axial direction in the target axial direction, and determining, according to the sliding distance corresponding to the sliding operation, a target array quantity to be increased in the any axial direction in the target axial direction in combination with a mapping relationship between the sliding distance and the array quantity; and in response to the sliding direction of the sliding operation being a second direction, determining to reduce an array quantity in the any axial direction in the target axial direction, and determining, according to the sliding distance corresponding to the sliding operation, a target array quantity to be reduced in the any axial direction in the target axial direction in combination with a mapping relationship between the sliding distance and the array quantity, wherein the second direction is opposite to the first direction (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 5, Sanwal teaches all the limitations of claim 1, further comprising: wherein the plurality of axial directions comprise a first axial direction, a second axial direction, and a third axial direction, a virtual scene in which the first target object is located is constructed through the first axial direction, the second axial direction, and the third axial direction, and the first interaction control comprises a first sub-control representing the first axial direction, a second sub-control representing the second axial direction, and a third sub-control representing the third axial direction; and determining at least one target axial direction in response to the selection operation for any axial direction in the plurality of axial directions comprises: determining the target axial direction in response to a selection operation for any sub-control among the first sub-control, the second sub-control, and the third sub-control (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 6, Sanwal teaches all the limitations of claim 1, further comprising: wherein the plurality of axial directions comprise a first axial direction, a second axial direction, and a third axial direction, and a virtual scene in which the first target object is located is constructed through the first axial direction, the second axial direction, and the third axial direction; and determining the array range of the first target object according to the target axial direction comprises: in response to the target axial direction comprising any one axial direction among the first axial direction, the second axial direction, and the third axial direction, determining the array range according to the any one axial direction; in response to the target axial direction comprising any two axial directions among the first axial direction, the second axial direction, and the third axial direction, determining the array range according to a planar range surrounded by the any two axial directions; and in response to the target axial direction comprising the first axial direction, the second axial direction, and the third axial direction, determining the array range according to a spatial range surrounded by the first axial direction, the second axial direction, and the third axial direction (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 7, Sanwal teaches all the limitations of claim 1, further comprising: further comprising: displaying an axis of the target axial direction and a control point for adjusting the axis in response to an adjusting operation for the target axial direction; in response to a moving operation for the control point, moving the control point to obtain a new axis; and determining a new target axial direction according to the new axis (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 8, Sanwal teaches all the limitations of claim 1, further comprising: wherein displaying the first interaction control comprises: displaying an array control in response to a selection operation for the first target object; and displaying the first interaction control in response to a selection operation for the array control (Sanwal Figs. 1-15; col. 7 [line 55], The circuit element is the one from which an array of the circuit elements is to be designed. FIG. 4A illustrates a single circuit element 411 that is selected for creating an array of circuit elements 411. When the circuit element 411 is selected, an attribute window is displayed for changing one or more attributes (or properties) related to the array. FIG. 4C illustrates an attribute window 400 that is displayed on a graphical user interface for editing one or more attributes of an array group including a plurality of circuit elements, according to some embodiments; col. 8 [line 4], The attribute window 400 (also referred to as an option form) is invoked from a dropdown menu (e.g., FILE menu) of the electronic design automation (EDA) tool, such as a layout editor, used for designing the electronic circuit design; col. 8 [line 9], The attribute window 400 includes a field 401 for providing a desired name (ArrayGroup0, in this case) to the array group, a row field 403, a column field 405, an X Spacing field 407, and a Y Spacing field 409. The row field 403 is used to provide the desired number of rows in the array group. The column field 405 is used to provide a desired number of columns in the array group. The default number of rows and columns in the array group are 1, since a single circuit element 411 is selected. The X Spacing field 407 is used to provide the horizontal separation (0.07 units, in this case) between adjacent circuit elements in the array. The Y Spacing field 409 is used to provide the vertical separation (0.07 units, in the case) between adjacent circuit elements in the array; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 9, Sanwal teaches all the limitations of claim 8, further comprising: wherein displaying the array control in response to the selection operation for the first target object comprises: in a case of the first target object being an object obtained by arraying a second target object in a virtual scene, in response to the selection operation for the first target object, displaying the array control at the second target object corresponding to the first target object, and deleting the first target object obtained by arraying the second target object (Sanwal Figs. 1-15; col. 7 [line 55], The circuit element is the one from which an array of the circuit elements is to be designed. FIG. 4A illustrates a single circuit element 411 that is selected for creating an array of circuit elements 411. When the circuit element 411 is selected, an attribute window is displayed for changing one or more attributes (or properties) related to the array. FIG. 4C illustrates an attribute window 400 that is displayed on a graphical user interface for editing one or more attributes of an array group including a plurality of circuit elements, according to some embodiments; col. 8 [line 4], The attribute window 400 (also referred to as an option form) is invoked from a dropdown menu (e.g., FILE menu) of the electronic design automation (EDA) tool, such as a layout editor, used for designing the electronic circuit design; col. 8 [line 9], The attribute window 400 includes a field 401 for providing a desired name (ArrayGroup0, in this case) to the array group, a row field 403, a column field 405, an X Spacing field 407, and a Y Spacing field 409. The row field 403 is used to provide the desired number of rows in the array group. The column field 405 is used to provide a desired number of columns in the array group. The default number of rows and columns in the array group are 1, since a single circuit element 411 is selected. The X Spacing field 407 is used to provide the horizontal separation (0.07 units, in this case) between adjacent circuit elements in the array. The Y Spacing field 409 is used to provide the vertical separation (0.07 units, in the case) between adjacent circuit elements in the array; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 10, Sanwal teaches all the limitations of claim 1, further comprising: wherein arraying and drawing the first target object comprises: arraying and drawing the first target object through an instancing method of a graphics processor (Sanwal Figs. 1-15; col. 1 [line 65], a system is described that includes a user interface for displaying an electronic circuit layout of an integrated circuit, a memory device that stores instructions, and a processor configured to execute the instructions for performing a method for modifying the electronic circuit layout using one or more electronic design automation (EDA) tools; col. 6 [line 30], A control unit 202 implements a processor system to control the operations of the electronic design automation system 200. The control unit 202 may include a single processor or a plurality of processors, where a processor includes executable logic, circuitry, and interfaces that are operable to execute one or more instructions to perform predetermined operations/tasks described herein. The processor of the control unit 202 may include an x86 processor, an ARM processor, a Reduced Instruction Set Computing (RISC) processor, an Application-Specific Integrated Circuit (ASIC) processor, or a Complex Instruction Set Computing (CISC) processor. In some embodiments, the control unit 202 includes a Graphics Processing Unit (GPU) that executes the set of instructions to perform one or more processing operations for graphical outputs, separate from the processor. The control unit 202 further includes a software-based graphic design environment executing software programs to assist the circuit designer in generating and streamlining layout designs; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 11, Sanwal teaches all the limitations of claim 1, further comprising: further comprising: in response to a third target object intersecting with a fourth target object in a virtual scene, obtaining a fifth target object according to the third target object and the fourth target object, wherein the third target object is an object obtained by arraying the first target object (Sanwal Figs. 1-15; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 9 [line 58], One such feature is a chop operation that is used to separate an array group of circuit elements into 2 or more separate array groups including one or more circuit elements of the original array group. FIG. 7A illustrates the array group 451 of circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4) before a chop operation and FIG. 7B illustrates array groups 701 and 703 formed after the chop operation. After the user has selected the desired circuit elements 411 to be separated (for instance, circuit elements 411-2 and 411-4) from the array group 451, the user selects (e.g., from a drop down menu in the layout editor) the chop operation. In the illustrated example, the 2×2 array group 451 is separated into two 2×1 array groups 701 and 703. The array group 701 includes circuit elements 411-1 and 411-3 and the array group 703 includes circuit elements 411-2 and 411-4; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 12, Sanwal teaches all the limitations of claim 1, further comprising: further comprising: in response to the first target object obtained through arraying and drawing satisfying a preset condition, displaying a target line on the first target object obtained through arraying and drawing according to an overall shape of the first target object obtained through arraying and drawing, wherein the target line is used to instruct the user to set an object along the target line (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 9 [line 30], Due to a change in the number of circuit elements and/or due a change in the spacing between the circuit element, there will be a change in the lengths of the interconnects between circuit elements of the array group and also a change in the lengths of the interconnects between the circuit elements and one or more other circuit layers of the electronic circuit design. In such instances, the tool will recreate (rewire) the interconnects between circuit elements, and the interconnects between the circuit elements and one or more other circuit layers of the electronic circuit design; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) Regarding claim 15, Sanwal teaches all the limitations of claim 1, further comprising: A computer-readable medium, wherein a computer program is stored on the computer-readable medium, and the computer program, when executed by a processing apparatus, causes the processing apparatus to perform steps of the method according to claim 1 (Sanwal Figs. 1-15; col. 1 [line 53], a non-transitory, computer-readable medium storing instructions is described. The instructions, when executed by a processor, direct the processor to perform a method; col. 1 [line 65], a system is described that includes a user interface for displaying an electronic circuit layout of an integrated circuit, a memory device that stores instructions, and a processor configured to execute the instructions for performing a method for modifying the electronic circuit layout using one or more electronic design automation (EDA) tools; see rejection of claim 1 above): Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Sanwal in view of Kang et al. (US 20110022958 A1, published 01/27/2011), hereinafter Kang. Regarding claim 13, Sanwal teaches all the limitations of claim 1, further comprising: further comprising: in response to a distance between two adjacent first target objects obtained through arraying and drawing in the target axial direction, adjusting a shape of the first target object or the distance to enable the adjusted first target objects to form a whole (Sanwal Figs. 1-15; col. 8 [line 24], The user (circuit designer) can change the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409. Once the desired values have been input in the respective fields, the user then selects (e.g., clicks using mouse) the APPLY button and the array group is created; col. 8 [line 30], FIG. 4B illustrates an array group 451 of circuit elements 411 obtained by changing the number of rows to 2, number of columns to 2, the X Spacing to 0.5, and the Y Spacing to 0.7 in the attribute window 400. Thus, as illustrated, the array group 451 includes 4 circuit elements 411, separated vertically from each adjacent circuit element 411 by 0.7 units and separated horizontally from each adjacent circuit element 411 by 0.5 units. As illustrated, each circuit element 411 is bounded by a bounding box 417 that indicates the boundary within which the circuit element 411 is contained. The X Spacing and the Y Spacing is measured as the separation between bounding boxes 41; col. 8 [line 46], the values of the number of rows, number of columns, the X Spacing, and the Y Spacing in the respective fields 403, 405, 407, and 409 can be edited using a property editor. FIG. 5 illustrates a property editor window 500, according to some embodiments of the disclosure; col. 9 [line 30], Due to a change in the number of circuit elements and/or due a change in the spacing between the circuit element, there will be a change in the lengths of the interconnects between circuit elements of the array group and also a change in the lengths of the interconnects between the circuit elements and one or more other circuit layers of the electronic circuit design. In such instances, the tool will recreate (rewire) the interconnects between circuit elements, and the interconnects between the circuit elements and one or more other circuit layers of the electronic circuit design; col. 10 [line 7], Another feature is a stretch operation that is used to increase or decrease the number of circuit elements in an existing array group by changing the size of a boundary box enclosing the array group. FIG. 8A illustrates the array group 451 (FIG. 4B) enclosed by a boundary box 419 and including circuit elements 411 (individually labelled as 411-1, 411-2, 411-3, and 411-4). In some embodiments, the user may select an upper right corner of the boundary box 419 (e.g., click and hold using the mouse) and drag the corner diagonally in the direction indicated by arrow A to increase the size of the boundary box 419. As the size (area) of the boundary box 419 increases, new circuit elements are added. For the purposes of discussion herein, a “new circuit element” refers to a circuit element that was absent in the original array group prior to changing a size of the array group. As illustrated in FIG. 8B, new circuit elements 411-5, 411-6, 411-7, 411-8, and 411-9 are added. The new circuit element are added such that the X Spacing and Y Spacing separation between adjacent circuit elements is equal to the values in the respective fields 507 and 509 (in this case, 0.5 units and 0.7 unit, respectively). Thus, a 3×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements; col. 10 [line 31], It will be understood that circuit elements get added each time the horizontal and/or vertical separation between the circuit elements and the boundary box 419 is equal to (or greater than) the X Spacing and Y Spacing values indicated in the attribute window 400; col. 10 [line 36], Similarly, the number of circuit element can be reduced by reducing the size of the boundary box. For instance, by dragging the boundary box 419 in the opposite direction of the arrow A, one or more circuit elements 411 can be deleted from the array group 451; col. 10 [line 41], It should be noted that the size of the boundary box 419 can also be changed (increased or decreased) only in the horizontal or vertical direction to change the respective X Spacing or Y-Spacing values. For example, instead of dragging the boundary box 419 diagonally, if the boundary box 419 is dragged horizontally, then only circuit elements 411-8 and 411-9 would be obtained. Thus, a 2×3 array group of circuit elements is obtained from a 2×2 array group of circuit elements. Similarly, if the boundary box 419 is dragged vertically, then only circuit elements 411-5 and 411-6 would be obtained. Thus, a 3×2 array group of circuit elements is obtained from a 2×2 array group of circuit elements) However, Sanwal fails to expressly disclose being less than a preset distance threshold, adjusting a shape of the first target object or the distance to enable the adjusted first target objects to form a whole. In the same field of endeavor, Kang teaches: being less than a preset distance threshold, adjusting a shape of the first target object or the distance to enable the adjusted first target objects to form a whole (Kang Figs. 1-12; [0157], Referring to FIG. 12A, graphic tools indicating a weather widget 201 and a watch widget 205 are displayed on a standby picture in a manner of maintaining a prescribed distance in-between. Afterwards, a user is able to drag the watch widget 205 closer to the weather widget 201 while touching the watch widget 205. In due course, referring to FIG. 12B, if the watch widget 205 gets closer to the weather widget 201 in a distance smaller than a predetermined distance, the watch widget 205 and the weather widget 201 attract each other to maintain a combined state in-between; [0158], The combined two widget graphic tools, as shown in FIG. 12C, move together if a user touches and drags a prescribed portion of the widget graphic tool. Therefore, the user is able to simultaneously move at least two widgets to another prescribed position. In doing so, the combined two widgets keep executing independent programs, respectively. Therefore, the user can touch one of the widgets irrespective of the contact type between the graphic tools in order to execute a specific one of the widgets) It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have incorporated being less than a preset distance threshold, adjusting a shape of the first target object or the distance to enable the adjusted first target objects to form a whole as suggested in Kang into Sanwal. Doing so would be desirable because the present invention is suitable for a wide scope of applications (see Kang [0003]). In order to access a specific function or information via a mobile terminal, a user has to make several key inputs to cause inconvenience (see Kang [0006]). In order to support and enhance the functionality of the mobile terminal, improvement of structural and/or software parts of the mobile terminal can be taken into consideration. For instance, a user input unit is provided to a mobile terminal to receive inputs of various types from a user (see Kang [0008]). Since all graphic tools capable of performing various functions should be arranged to place limitation on a screen space, it may be inconvenient for a user to use. Moreover, in case that at least one graphic user interface is rearranged on a standby picture, each graphic user interface should be moved one by one (see Kang [0011]). The present invention is directed to a mobile terminal that substantially obviates one or more problems due to limitations and disadvantages of the related art (see Kang [0012]). Accordingly, the present invention provides the following effects and/or advantages. A user can be provided with convenience and visual pleasure in a manner that graphic user interfaces independent from each other are interlocked with each other through interaction (see Kang [0035-0036]). Additionally, the system of Kang would improve the system of Sanwal by allowing a user to quickly and easily create desired groups of objects that enable the objects to move together. Therefore, the user is able to simultaneously move at least two widgets to another prescribed position (see Kang [0158]), thereby saving the user in creating and moving desired groups of objects. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Audet (US 20150324071 A1) see Figs. 1-37 and [0097-0108]. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN T REPSHER III whose telephone number is (571)272-7487. The examiner can normally be reached Monday - Friday, 8AM-5PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Welch can be reached at (571) 272-7212. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN T REPSHER III/ Primary Examiner, Art Unit 2143
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Prosecution Timeline

Oct 23, 2024
Application Filed
Sep 15, 2026
Non-Final Rejection mailed — §101, §102, §103 (current)

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