DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/22/2025 has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8 and 12-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Moon et al. (hereinafter “Moon”), US Pub. No. 2019/0189052.
Regarding claim 1, Moon teaches an organic light emitting device (figs. 1, 2) comprising: a display panel provided with a plurality of pixels disposed thereon and connected to data lines and gate lines (fig. 2, pixels PXL, Vdata, Scan), and one data line of the data lines and one gate line of the gate lines (fig. 2, Vdata, Scan); a data driving circuit configured to output a data voltage to the pixels through the one data line (fig. 1, data driver 120); and a gate driving circuit configured to output two scan signals and one emission signal (fig. 1, gate driver 130, Scan1, Scan2, EM1); wherein the gate driving circuit is configured to generate the two scan signals according to a start signal swinging between a gate high voltage and a gate low voltage (fig. 11), a first clock connecting to a first TFT, a second clock connecting to a second TFT and a third clock connecting to a third TFT (figs.7-10, CLK1-4), wherein at least two clocks among the first to third clock include an interval with the same level when the start signal maintains a high level (fig. 11, CLK1 and CLK2 during T1, CLK2 and CLK3 during T2), wherein the plurality of pixels includes an organic light emitting diode (fig. 3, OLED), a driving TFT (fig. 3, DT), and at least one switching TFT, and wherein at least one switching TFT is formed of a same type as the first to third TFTs (fig. 3, ET), wherein turn-on periods of the first clock partially overlap with turn-on periods of the second clock and the third clock (fig. 11, CLK1, CLK2, CLK3, periods 4, 5, 6), the turn-on periods of the second clock partially overlap with the turn-on periods of the first clock and turn-on periods of the third clock (fig. 11, CLK1, CLK2, CLK3, periods 4, 5, 6), and the turn-on periods of the third clock partially overlap with the turn-on periods of the first clock and the second clock (fig. 11, CLK1, CLK2, CLK3, periods 4, 5, 6).
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Regarding claim 2, Moon teaches wherein in the driving TFT, a gate electrode is connected to a first node, one of a first electrode and a second electrode is connected to a first power line supplying a high potential power supply voltage, and the other one is connected to a second node (fig. 3, DT).
Regarding claim 3, Moon teaches wherein the at least one switching TFT includes a first switching TFT connected between the one data line and a third node, and is switched according to a first scan signal (fig. 6, ST1).
Regarding claim 4, Moon teaches wherein the at least one switching TFT includes a second switching TFT connected between the first node and the second node, and is switched according to a second scan signal (fig. 6, ST2).
Regarding claim 5, Moon teaches wherein the at least one switching TFT includes a third switching TFT connected between the third node and a reference line to which a reference voltage is applied, and is switched according to the emission signal (fig. 3, EM, Vref).
Regarding claim 6, Moon teaches wherein the at least one switching TFT includes a fourth switching TFT connected between the second node and the fourth node which is an anode electrode of the organic light emitting diode, and is configured to be switched according to the emission signal (fig. 3, ET).
Regarding claim 7, Moon teaches wherein the at least one switching TFT includes a fifth switching TFT connected between the fourth node and the reference line, and is configured to be switched according to the second scan signal (fig. 6, ST4).
Regarding claim 8, Moon teaches wherein the gate driving circuit comprises: the third TFT connected between the start signal and a Q node, and configured to be switched according to the third clock (fig. 7, Q controller); the first TFT connected between the Q node and the gate high voltage, and the first TFT connected between the gate low voltage and a QB node, and configured to be switched according to the second clock (fig. 7, QB controller).
Regarding claim 12, Moon teaches wherein the gate driving circuit further comprises a first capacitor connected between the Q node and an output node (capacitor CQ, [0060]).
Regarding claim 13, Moon teaches wherein the gate driving circuit further comprises a second capacitor connected between the QB node and the gate high voltage (capacitor CQB, [0067]).
Regarding claim 14, Moon teaches an organic light emitting device (figs. 1, 2) comprising: a display panel having data lines, gate lines, and a plurality of pixels connected to one of the data lines and the one of the gate lines (fig. 2); a data driving circuit configured to supply a data voltage to the plurality of pixels through the data lines (fig. 1, data driver 120); and a gate driving circuit configured to output first scan signals (fig. 1, gate driver 130), wherein the gate driving circuit is configured to receive a first clock supplied to a first transistor, a second clock supplied to a second transistor, and a third clock supplied to a third transistor (figs. 7-10, CLK1-CLK3), wherein each of the plurality of pixels includes: an organic light emitting diode; a driving transistor; and at least one switching transistor (fig. 3), wherein turn-on periods of the first clock partially overlap with turn-on periods of the second clock and the third clock, the turn-on periods of the second clock partially overlap with the turn-on periods of the first clock and turn-on periods of the third clock, and the turn-on periods of the third clock partially overlap with the turn-on periods of the first clock and the second clock (fig. 11, CLK1, CLK2, CLK3, periods 4-6).
Regarding claim 15, Moon teaches a gate driving circuit configured to output a scan signal to a plurality of pixels, the gate driving circuit is configured to receive a first clock supplied to a first transistor, a second clock supplied to a second transistor, and a third clock supplied to a third transistor (figs. 7-10, CLK1-3), wherein turn-on periods of the first clock partially overlap with turn-on periods of the second clock and the third clock, the turn-on periods of the second clock partially overlap with the turn-on periods of the first clock and turn-on periods of the third clock, and the turn-on periods of the third clock partially overlap with the turn-on periods of the first clock and the second clock (fig. 11, CLK1-3, periods 4-6).
Allowable Subject Matter
Claims 9-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: None of the prior art, either singularly or in combination, teaches or fairly suggests the specific elements comprising the specific combination described in the dependent claims above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Chang et al. (US Pub. No. 2018/0151146) teaches a display driving device with overlapping clock signals.
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/KENNETH B LEE JR/Primary Examiner, Art Unit 2625