DETAILED ACTION
This office action is in response to application filed on 10/23/2024.
Claims 1 – 25 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 – 7, 14 – 19 and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sugumar et al (US 20080163239, hereinafter Sugumar), in view of Accapadi et al (US 20050210472, hereinafter Accapadi), and further in view of Hirata et al (US 20160041850, hereinafter Hirata).
As per claim 1, Sugumar discloses: A method comprising:
identifying a plurality of workloads for processing by a plurality of cores, the workloads having attributes associated therewith, the attributes including indicators of resource utilizations of the workloads; (Sugumar [0030]: “Each VM has a corresponding load which represents the amount of work it is currently responsible for. This work may be in the form of tasks or functionality. The load of a VM may be represented as a value, which may be any whole or fractional number. A VM that is idle, may have tasks assigned to it and still have a load of zero. A VM 220-221 may be assigned to execute on a specific processor core 210-212 or to execute within a specific partition 205-206.”)
determining whether one of the cores is considered underutilized based on predefined criteria; (Sugumar [0047]: “A load status 245-246 may be calculated for a given processor core 210-212”; [0048]: “Pre-determined criteria 250 may comprise a partition 205-206 or processor core 210-212 underutilization threshold value”; [0051]: “a first VMM 230 is connected with partition 205. Partition 205 includes processor core 210. Partition 205 has a current load status 245 of "5%." The first VMM 230 compares the load status 245 of partition 205 against the pre-determined criteria 250 underutilization threshold, resulting in a "true" response, indicating that partition 205 is underutilized per the pre-determined criteria 250.”)
in response to determining that a first of the cores is considered underutilized, wherein the load balancer performs a check to determine whether to move a workload from one of the cores to another of the cores; (Sugumar [0051]: “The first VMM 230 then broadcasts a message (data 240) via the communication channel 241 to a second VMM 231 on the system 200. The second VMM 231 is connected with partition 206. Partition 206 includes processor core 211. Partition 206 has a current load status 246 of "99%." The second VMM 231 compares the load status 246 of partition 206 against the pre-determined criteria 250 overutilization threshold, resulting in a "true" response, indicating that partition 206 is overutilized per the pre-determined criteria 250. The second VMM 231 then responds with a message (data 240) via the communication channel 241 to the first VMM 230 on the system 200.”)
and in response to the load balancer determining to move one of the workloads from one of the cores to another of the cores, moving at least a portion of said workload to the another of the cores. (Sugumar [0051]: “The first VMM 230 detecting that partition 205 is underutilized and partition 206 is overutilized then selects a VM 221 to migrate from partition 205 to partition 206. The first VMM 230 next sends a migration request message (data 240) via the communication channel 241 indicating the VM 221 is to migrate. The second VMM 231 then receives the migration request message (data 240), and executes a computer instruction 235 initiating the migration process of VM 221 from partition 205 to partition 206. The migration results in a more balanced system 200 in terms of partition 205-206 utilization and thermal distribution.”.)
Sugumar did not explicitly disclose:
the attributes including whether the associated workload is movable or non-movable,
running a load balancer on the first core;
However, Accapadi teaches:
the attributes including whether the associated workload is movable or non-movable, (Accapadi [0041])
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Accapadi into that Sugumar in order to have the attributes including whether the associated workload is movable or non-movable. Vichare [0129] has shown that the claimed limitation is merely a commonly known and used parameter or constraints bounding a workload to a specific resources, thus it would be advantageous to have the parameter to ensure the load balancing migration process can only choose the workloads that are marked as able to migrate in order to satisfy the predetermined requirements of the workloads, such combination merely claims the combination of known parts in the field to achieve predictable results and is therefore rejected under 35 UCS 103.
Hirata teaches:
running a load balancer on the first core; (Hirata [0117] – [0118])
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Hirata into that Sugumar and Accapadi in order to run a load balancer on the first core. Sugumar teaches that the VMM running on a first partition that runs on at least one processor core performs the load balancing function. Hirata shows that the scheduler/load balancer can be executed on one core as it is commonly known in the industry to do so, such combination merely claims the combination of known parts in the field to achieve predictable results and is therefore rejected under 35 UCS 103.
As per claim 2, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 1, wherein the load balancer does not rebalance workloads more frequently than a predefined time duration. (Sugumar [0042])
As per claim 3, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 2, wherein in response to determining that none of the cores was considered underutilized during a second predefined time duration, selecting one of the cores, and running the load balancer on the selected core. (Sugumar [0051] and Hirata [0117] – [0118])
As per claim 4, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 1, in response to determining none of the cores is considered underutilized based on the predefined criteria, not running the load balancer, regardless of an amount of time since the load balancer was last run. (Sugumar figure 4A, steps 414 -> 468 -> 458 -> 460.)
As per claim 5, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 1, comprising pinning some workloads with certain attributes to a common one of the cores. (Accapadi [0051]: “an idle load balancing routine takes into account processor or chip affinity of threads in local run queues or chip run queues when determining whether a thread is to be reassigned from one queue to another queue.”; [0072] - [0073].)
As per claim 6, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 5, wherein other workloads are also assigned to the common core during a balancing operation. (Accapadi [0072] – [0073])
As per claim 7, the combination of Sugumar, Accapadi and Hirata further teach:
The method of claim 1, further comprising: placing a lock on the load balancer while the load balancer is running on the first core. (Hirata [0117] – [0118])
As per claim 14, it is the computer program product variant of claim 1 and is therefore rejected under the same rationale.
As per claim 15, it is the computer program product variant of claims 2 + 3 and is therefore rejected under the same rationale.
As per claim 16, it is the computer program product variant of claim 4 and is therefore rejected under the same rationale.
As per claim 17, it is the computer program product variant of claim 5 and is therefore rejected under the same rationale.
As per claim 18, it is the computer program product variant of claim 6 and is therefore rejected under the same rationale.
As per claim 19, it is the computer program product variant of claim 7 and is therefore rejected under the same rationale.
As per claim 22, it is the system variant of claim 1 and is therefore rejected under the same rationale.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over combination of Sugumar, Accapadi and Hirata, and further in view of Mann et al (US 20140215041, hereinafter Mann).
As per claim 13, the combination of Sugumar, Accapadi and Hirata did not teach:
The method of claim 1, wherein the checking by the load balancer includes attempting to coalesce at least some of the movable workloads, the checking comprising: assessing the types of movable workloads that are assigned to multiple cores for determining which type of workload can be coalesced to fewer of the cores and result in the lowest utilization of a busiest of said fewer cores after coalescence; and based on the assessment, coalescing the workloads of the determined type to the fewer of the cores.
However, Mann teaches:
The method of claim 1, wherein the checking by the load balancer includes attempting to coalesce at least some of the movable workloads, the checking comprising: assessing the types of movable workloads that are assigned to multiple cores for determining which type of workload can be coalesced to fewer of the cores and result in the lowest utilization of a busiest of said fewer cores after coalescence; and based on the assessment, coalescing the workloads of the determined type to the fewer of the cores. (Mann [0035])
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Mann into that Sugumar, Accapadi and Hirata in order to have the checking by the load balancer includes attempting to coalesce at least some of the movable workloads, the checking comprising: assessing the types of movable workloads that are assigned to multiple cores for determining which type of workload can be coalesced to fewer of the cores and result in the lowest utilization of a busiest of said fewer cores after coalescence; and based on the assessment, coalescing the workloads of the determined type to the fewer of the cores. Mann [0035] has shown that the claimed limitations of consolidating the workload merely commonly known and used steps in load balancing, and thus applicants have merely claimed the combination of known parts in the field to achieve predictable results and is therefore rejected under 35 UCS 103.
Allowable Subject Matter
Claims 8 – 12, 20, 21 and 23 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 24 and 25 allowed.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Vichare et al (US 20230056042) teaches “Systems and methods for workload migration recommendations in heterogeneous workspace environments are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: identify a set of workspaces launched by a set of users, among a plurality of workspaces launched by a plurality of users, where each workspace in the set of workspaces is associated with a performance or user experience metric below a threshold value; select, among a plurality of workloads executed within the set of workspaces, one or more workloads suitable for migration; and for each user of the set of users, determine whether to migrate any of the selected one or more workloads based, at least in part, upon an allocation of cloud and device resources available to the plurality of users.”;
Bivens et al (US 20190354413) teaches “A new workload is assigned to a subset of a plurality of processors, the subset of processors assigned a subset of a plurality of memory devices. In some embodiments, a determination is made as to whether the new workload is categorized as a memory-dependent workload having a memory need which can be met primarily by the subset of the memory devices. If the new workload is categorized as a memory-dependent workload, a determination is then made as to whether the subset of the memory devices is meeting the memory need of the new workload. When the subset of the memory devices is not meeting the memory need of the new workload, a memory related action is taken.”;
Chen et al (US 20170083367) teaches “managing a resource in a distributed resource management system can include: monitoring, by at least one processor, utilization of the resource being used by at least one workload; and performing an enforcement action on a particular workload of the at least one workload when a utilization condition is met, and when the particular workload has a current resource utilization exceeding its associated resource allocation limit.”;
Elnozahy et al (US 20110296212) teaches “A scheduler receives a task that identifies a desired frequency and a desired maximum number of competing hardware threads. The scheduler determines whether a user preference designates either maximization of performance or minimization of energy consumption. Responsive to the user preference designating the performance, the scheduler determines whether there is an idle processor core in a plurality of processor cores available. Responsive to no idle processor being available, the scheduler identifies a subset of processor cores having a smallest load coefficient. From the subset of processor cores, the scheduler determines whether there is at least one processor core that matches desired parameters of the task. Responsive to at least one processor core matching the desired parameters of the task, the scheduler assigns the task to one of the at least one processor core that matches the desired parameters.”;
Jahagirdar et al (US 20140026146) teaches “identify one or more threads scheduled for execution at a processor. The processor may include a plurality of cores, including a first core having a first characteristic and a second core have a second characteristic that is different than the first characteristic. Execution of the one or more threads by the first core may be initiated. A determination may be made whether to apply a migration policy. In response to determining to apply the migration policy, migration of the one or more threads from the first core to the second core may be initiated.”.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLES M SWIFT whose telephone number is (571)270-7756. The examiner can normally be reached Monday - Friday: 9:30 AM - 7PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, April Blair can be reached at 5712701014. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHARLES M SWIFT/Primary Examiner, Art Unit 2196
Prosecution Insights