Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 4-9, and 11-14, is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al., (US 2013/0262928).
It has been noted that, a claimed invention is unpatentable if the differences between it and the prior art are "such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art." 35 U.S.C. § 103(a) (2000); KSRInt'lr. Teleflex Inc., 127 S.Ct. 1727, 1734 (2007); Graham v.John Deere Co., 383 U.S. 1, 13-14 (1966).
In Graham, the Court held that that the obviousness analysis is bottomed on several basic factual inquiries: "[(1)] the scope and content of the prior art are to be determined; [(2)] differences between the prior art and the claims at issue are to be ascertained; and [(3)] the level of ordinary skill in the pertinent art resolved." 383 U.S. at 17. See also KSR, 127 S.Ct. at 1734. "The combination of familiar elements according to known methods is likely to be obvious when it does no more; than yield predictable results." KSR, at 1739.
"When a work is available in one field of endeavor, design incentives and other market forces can prompt variations of it, either in the same field or in a different one. If a person of ordinary skill in the art can implement a predictable variation, § 103 likely bars its patentability." Id. at 1740.
"For the same reason, if a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond his or her skill." Id.
"Under the correct analysis, any need or problem known in the field of endeavor at the time of invention and addressed by the patent can provide a reason for combining the elements in the manner claimed." Id. 11742.636
As per claim 1, Yang discloses a system for interface management, comprising: a main processor, comprising: a universal asynchronous receiver/transmitter (UART) interface (Component, 160, Note [0036], “controller 120 is connected to the USB port 170 with a universal asynchronous receiver/transmitter (UART) interface, Fig. 1); and a control interface (Components 120, TDR, RTS, Fig.1, [0030], “..receives and processes the command to generate the control signal”) a switch (Component, 150, Fig. 1, [0030]) coupled to the UART interface and the control interface (Component, 170, CS1, CS2, Fig. 1, [0031], “data is transmitted from the USB host 160 to the USB port 170 through the USB pin 130 and the switch 150”); and a first sub-circuit , (the USB port 170 is electrically connected to the switch 150 and is configurable to connect with a USB connection 1000 such that a USB device with the USB connection 1000 can receive data or the debug signal from the USB port 170, [0033]) comprising: a first sub-interface (part of USB connection, 1000, Fig. 1, USB connection 210 in Fig. 2 which is part of the debug port signal) coupled to the switch, wherein the switch conducts a transmission path ([0048], “a control signal (step 410), connecting a switch to one of a USB pin and a debug pin based on the control signal (step 420), and transferring a UART debug signal to a USB port through the debug pin (step 430)) between the UART interface and the first sub-interface according to a control signal (“..switch 150 receives the control signal, based on the control signal, the switch 150 is connected to one USB pin 130 and adjustment pin 140 therein., [0031-0036]) received through the control interface (Components 120, TDR, RTS, Fig.1, [0030], “..receives and processes the command to generate the control signal”).
It would have been obvious to one of ordinary skill before the effective filing date that the UART decoding unit of Yang wherein the decoding unit receives and decodes the UART signal through the switch are in response to the control signal and the related debug requirements triggered through operations. (step 430 to either steps 440, 460 or 470, [0051-0056])
As per claim 2, Yang teaches wherein in response to the main processor being in an initial phase, the main processor generates the control signal for conduction and conducts the transmission path (step 410, Fig. 4), wherein the transmission path is used for a debug requirement (step 420), ; or in response to the main processor leaving the initial phase ([0065]), the main processor generates the control signal for conduction and conducts the transmission path (cont. step 420 – “the switch 150 can be connected to one of the USB pin 130 and the debug pin 140 based on the control signal for choosing the USB mode or the debug mode. When the switch 150 is connected to the debug pin 140, the debug mode is chosen such that a debug signal is transmitted from the controller 120 to the USB port 170 through the debug pin 140 and the switch 150,” [0050]), wherein the transmission path is used for a data transmission requirement; or in response to detecting the data transmission requirement, the main processor generates the control signal for conduction and conducts the transmission path (step 430 to either steps 440, 460 or 470, [0051-0056]), wherein the transmission path is used for the debug ([0040] “..the switch 220 is connected to the display 240 through the UART decoder 230, the UART decoder 230 receives and decodes the UART debug signal to generate a decoded debug signal”) requirement.
As per claim 4, Yang teaches wherein in response to the control signal being at a first level, the switch conducts the transmission path (Component, 150, Fig. 1 or 220 Fig. 3); and in response to the control signal being at a second level (step 430 to either steps 440, 460 or 470, [0051-0056]), the switch interrupts the transmission path.
As per claim 5, Yang teaches further comprising: a second sub-circuit (527, Fig. 5 or 521, Fig. 5), comprising: a second sub-interface ([0063-0065], “the debugging module 523 further comprises a transforming module 526. The transforming module 526 receives the UART signal through the switch 522, and the UART signal is transformed by the transforming module 526.
In yet another embodiment of the present invention, the debugging module 523 further comprises a wireless transmission module (not shown). The wireless transmission module communicatively connected to the transforming module 526 for wirelessly transmitting the UART signal to the remote monitoring device 2000. In still another embodiment of the present invention, the debugging module 523 further comprises a second external connector 527. The second external connector 527 is connected to the remote control system 2000, and the remote control system 2000 performs the debugging process to the target system 510 by the device 520 through the second external connector 527.”) coupled to another switch, wherein the another switch conducts another transmission path between the UART interface and the second sub-interface according to the control signal received through another control interface (Fig. 3, Component, 220) of the main processor, and the another switch is coupled to the another control interface.
As per claim 6, Yang discloses wherein the switch comprises: a first port coupled to the UART interface; a control port coupled to the control interface (“The wireless transmission module communicatively connected to the transforming module 526 for wirelessly transmitting the UART signal to the remote monitoring device 2000. In still another embodiment of the present invention, the debugging module 523 further comprises a second external connector 527. The second external connector 527 is connected to the remote control system 2000, and the remote control system 2000 performs the debugging process to the target system 510 by the device 520 through the second external connector 527”; and a plurality of second ports, wherein one of the second ports ([0037-0044]) is coupled to the first sub-circuit, and another one of the second ports is coupled to a second sub-circuit.
As per claim 7, Yang teaches wherein the first sub-circuit is a satellite positioning circuit, a Bluetooth transceiver circuit, a USB connector, or an Internet of thing (IoT) device. (Figs. 1, 3, or 5)
As per claims 8 and 13, Yang teaches the system and therein further teaches the method for implementing an interface management including an UART interface, see the rejection for claims 1 and 2 above regarding the similar claim limitations.
As per claim 9, see the rejection for claim 2 above.
As per claims 11, 12, and 14, see the similar rejection for claims 1, 2, and 4-8 above.
Allowable Subject Matter
Claims 3 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Specifically, claim 3 states “further comprising: an auxiliary interface, wherein the auxiliary interface is a universal serial bus (USB) interface or an Ethernet interface, and is coupled to the switch, wherein in response to the main processor leaving the initial phase, the auxiliary interface is used for the debug requirement; or in response to detecting the data transmission requirement, the auxiliary interface is used for the data transmission requirement.”
RELEVENT ART CITED BY THE EXAMINER
The following prior art made of record and relied upon is citied to establish the level of skill in the
applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP
707.05(c). Ahn (US 2011/0271159), further discloses multiple debugging processes connected to a switch wherein the debugging modules receives UART signal from host system. (Abstract, [0002-0009])
Conclusion
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tammara Peyton whose telephone number is (571) 272-4157. The examiner can normally be reached between 8:30- 6:00 from Monday to Thursday, (I am off every first Friday), and 7:30- 4:00 every second Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor Henry Tsai can be reached on (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Any inquiry of a general nature of relating to the status of this application should be directed to the Group receptionist whose telephone number is (571) 272- 2100.
/TAMMARA R PEYTON/Primary Examiner, Art Unit 2184 March 6, 2026