DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. CN202322072888.7, filed on 8/02/2023.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/31/24. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Objections
Claims 2-8 are objected to because of the following informalities: Claims 2-8 discloses “the circuit for conduction testing of a power supply of a plasma globe lamp” suggest amend to “the circuit for conduction testing of the power supply of the plasma globe lamp”. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sadwick (US 20180279429 hereinafter Sadwick).
Regarding to claim 1, Sadwick discloses a circuit for conduction testing of a power supply of a plasma globe lamp (paragraph 0119 discloses monitoring and data and status/fault logging of each and every individual driver/power supply/module and LED lighting source), comprising a rectifying circuit (figs. 34-36[762, 782 and 814 respectively) and a switching power supply (fig. 34 show switching PS included 763, 765, 764), wherein the circuit for conduction testing of the power supply of the plasma globe lamp is connected with an alternating current output end of an external power supply (figs. 34 shows the circuit connected to AC IN 760), a first end of the rectifying circuit is connected with the alternating current output end of the external power supply (figs. 34 shows the first end of rectify 762 connected to the output 760), a second end of the rectifying circuit is connected with the switching power supply (figs. 34 shows the second end of 762 connected to 764 of the switching PS), and the rectifying circuit (figs. 34[762]) is configured to convert an alternating current (from AC 760) output by the alternating current output end into a direct current and to output the direct current to the switching power supply (fig. 34[763, 765, 764]), and
the rectifying circuit comprises at least two diodes and a substrate, and all the at least two diodes are integrated in the substrate (figs. 34[762] comprised 4 diodes and it would has necessitated that the diodes mounted on the circuit board (substrate)).
Sadwick discloses monitoring and data and status/fault logging of each and every individual driver/power supply/module and LED lighting source instead of conduction testing of a power supply of a plasma globe lamp. However, Sadwick discloses a same circuit as claimed.
Therefore, at the time before the effective filing date, it would be obvious to a POSITA to incorporate Sadwick to perform a conductor test for power supply of a plasma globe lamp as a matter of intended use.
Regarding to claim 2, Sadwick discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 1, wherein the rectifying circuit is a rectifier bridge (fig. 34[762] as a rectifier bridge), a first end of the rectifier bridge is connected with the alternating current output end (fig. 34 shows first end of [762] connected to output of AC 760) of the external power supply, and a second end of the rectifier bridge is connected with the switching power supply (fig. 34 shows second end of [762] connected to [764] of the PS).
Regarding to claim 3, Sadwick discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 1, wherein the rectifying circuit is a full-wave rectifying circuit (fig. 34 shows [762] as a full wave rectifier), the full-wave rectifying circuit comprises a first diode and a second diode, a first end of the first diode and a first end of the second diode are both connected with the alternating current output end of the external power supply, and a second end of the first diode and a second end of the second diode are both connected with the switching power supply (see figs. 34-36).
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sadwick as applied to claim 1 above, and further in view of Gao (US 20170170720 hereinafter Gao).
Regarding to claim 4, Sadwick discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 1, further comprising a filtering circuit (fig. 53 shows filter circuit included 1214, 1216, 1218 and 1220) , wherein the filtering circuit is connected between the rectifying circuit and the alternating current output end of the external power supply (fig. 53 shows the filter connected is between AC 1210 and rectifier 1222), the filtering circuit is integrated in the substrate (it would has necessitated that the filter mounted on the circuit board (substrate)), the filtering circuit comprises a first resistor (fig. 52 shows the filter comprised first resistor 1188), a second resistor (second resistor 1192) and a first capacitor (first capacitor 1190).
Sadwick discloses the outputs of the filter connected to the positive poles of the rectifying circuit and the negative poles of the rectifying circuit connected to the power supply.
However, Sadwick does not disclose a first end of the first resistor is connected with a first end of the second resistor in series, a second end of the first resistor is connected with a positive pole of an input end of the rectifying circuit, a second end of the second resistor is connected with a negative pole of the input end of the rectifying circuit, and the first capacitor is connected between the positive pole of the input end of the rectifying circuit and the negative pole of the input end of the rectifying circuit in parallel.
Fig.2 of Gao discloses a RLC or RC filter comprising a first end of the first resistor (RL1) is connected with a first end of the second resistor in series (RL2), a second end of the first resistor (RL1) is connected with a positive pole of an input end of the rectifying circuit (full bridge D1), a second end of the second resistor (RL2) is connected with a negative pole (full bridge D1) of the input end of the rectifying circuit (full bridge D1), and the first capacitor (C1) is connected between the positive pole of the input end of the rectifying circuit and the negative pole of the input end of the rectifying circuit in parallel (C1 parallel to RL1 and RL2).
Therefore, at the time before the effective filing date, it would be obvious to a POSITA to incorporate the RC filter of Gao into Sadwick as matter of design choice without unexpected results.
Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sadwick in view of Gao as applied to claim 4 above, and further in view of RICHARDS et al. (US 20130099854, hereinafter RICHARDS).
Regarding to claim 5, Sadwick in view of Gao discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 4, except further comprising a plug-in circuit, wherein the plug-in circuit comprises a second capacitor, and the second capacitor is connected across a grounding terminal at an alternating current side of the plug-in circuit and a grounding terminal at a direct current side of the plug-in circuit.
RICHARDS discloses a capacitor Cy across DC ground and AC ground.
Therefore, at the time before the effective filing date, it would be obvious to a POSITA to incorporate a capacitor between AC and DC ground in order to suppress EMI emissions and to act as a safety element to attenuate stray voltages (paragraph 0020 of RICHARDS).
Regarding to claim 6, Sadwick in view of Gao and RICHARDS discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 5, wherein the second capacitor has a capacitance of 2.2 nF (paragraph 0032 of RICHARDS discloses Cy have a capacitance of about 2200 pF).
Regarding to claim 7, Sadwick in view of Gao and RICHARDS discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 5, further comprising a first plug-in unit (fig. 55 of Sadwick discloses Fuse 1330), a second plug-in unit (1216, 1218 and 1220) and a third plug-in unit (1214), wherein the first plug-in unit is connected with a positive pole of the alternating current output end and the positive pole of the input end of the rectifying circuit (fig. 55 of Sadwick shows fuse 1330 connect between positive of PS and the positive end of rectifying circuit 1332), the second plug-in unit (fig. 53 of Sadwick shows filter as second plug in unit) is connected with a negative pole of the alternating current output end and the negative pole of the input end of the rectifying circuit (1218 of the filter connected to negative pole of 1210 (bottom terminal) and the input end of 1222), and the plug-in circuit is connected to the grounding terminal at the alternating current side of the plug-in circuit through the third plug-in unit (1214 connected to common or ground of AC in (bottom terminal)).
Regarding to claim 8, Sadwick in view of Gao and RICHARDS discloses the circuit for conduction testing of a power supply of a plasma globe lamp according to claim 7, wherein a fuse resistor is connected to the first plug-in unit (fig 55 of Sadwick shows fuse 1330 as a resistor).
Conclusion
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/SON T LE/ Primary Examiner, Art Unit 2858
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