DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Objections
Claims 1-18 is/are objected to because of the following informalities:
Claim 1 introduces “a plurality of laminated ceramic layers”, which is later referred to as “the plurality of ceramic layers” in claims 1 and 6-8. This technically creates a lack of sufficient antecedent basis. Claims 2-18 are objected to as they depend on claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 14 and 16 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation “…the metal component and a glass component”. However, claim 1 introduces multiple “a metal component” and therefore, it is indefinite to which “a metal component” is being referenced. For purposes of examination, the examiner is taking "…wherein each of the first and second base electrode layers includes the metal component and a glass component" to read "…wherein each of the first and second base electrode layers further includes a glass component"
Claim 16 recites the limitation “…the metal component and a glass component”. However, claim 1 introduces multiple “a metal component” and therefore, it is indefinite to which “a metal component” is being referenced. For purposes of examination, the examiner is taking "…wherein each of the first and second base electrode layers includes the metal component and a ceramic component" to read "…wherein each of the first and second base electrode layers further includes a ceramic component"
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 8-9, 11-14, and 16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito et al. US 2007/0242416 A1 (hereafter refer to as Saito) in view of Seishi et al. JP 2016009836 A (hereafter referred to as Seishi).
Regarding claim 1, Saito discloses:
A multilayer ceramic electronic component comprising: a multilayer body (2 – Fig. 1 para. [0023]) including a plurality of laminated ceramic layers (4 – Fig. 1 para. [0023]), a first main surface and a second main surface opposed to each other in a height direction, a first lateral surface and a second lateral surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction (Fig. 1 shows the body having a parallelepiped shape); first internal conductive layers each on a corresponding one of the plurality of ceramic layers and each exposed at the first end surface (3 – Fig. 1 [0023]); second internal conductive layers each on a corresponding one of the plurality of ceramic layers and are each exposed at the second end surface (3 – Fig. 1 [0023]); a first external electrode on the first end surface (5 – Fig. 1 para. [0023]); and a second external electrode on the second end surface (5 – Fig. 1 para. [0023]); wherein the first external electrode includes a first base electrode layer including a metal component (5a – Fig. 1 para. [0024]), a first electrically conductive resin layer on the first base electrode layer and including a thermosetting resin and a metal component (5c – Fig. 1 para. [0026]), and a first Ni plated layer on the first electrically conductive resin layer (5d – Fig. 1 para. [0026]); the second external electrode includes a second base electrode layer including a metal component (5a – Fig. 1 para. [0024]), a second electrically conductive resin layer on the second base electrode layer and including a thermosetting resin and a metal component (5c – Fig. 1 para. [0026]), and a second Ni plated layer on the second electrically conductive resin layer (5d – Fig. 1 para. [0026]). Saito fails to explicitly disclose wherein tensile stress is provided as internal stress inside the first Ni plated layer; and tensile stress is provided as internal stress inside the second Ni plated layer.
Seishi discloses wherein tensile stress is provided as internal stress inside the first Ni plated layer; and tensile stress is provided as internal stress inside the second Ni plated layer (Fig 2(a) – para. [0017]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to manufacture the Ni plated layers of Saito to have internal tensile stress as disclosed by Seishi to improve the thermomechanical strength (para. [0014] of Seishi).
Regarding claim 2, Saito as modified by Seishi discloses:
The multilayer ceramic electronic component according to claim 1. However, Saito fails to explicitly disclose wherein the tensile stress is about 50 MPa or more.
Seishi discloses wherein the tensile stress is 40 MPa or 100 MPa (para. [0044-0046]). Furthermore, Seishi teaches that the tensile stress is a result effective variable for controlling the flexural strength and thermomechanical strength of the plating layer (paras. [0041], [0051] and Table I).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to construct the capacitor of Saito to have a Ni plating layer with a tensile stress of 40 MPa to 100 MPa to improve the flexural and thermomechanical strength, as taught by Seishi. Where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 3, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein a first Sn plated layer is on the first Ni plated layer; and a second Sn plated layer is on the second Ni plated layer (5e – Fig. 1 para. [0026] of Saito).
Regarding claim 4, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein the first base electrode layer includes a glass component or a ceramic component; and the second base electrode layer includes a glass component or a ceramic component (paras. [0005], [0024] and claim 1 of Saito).
Regarding claim 5, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein a dimension of the multilayer body in the length dimension is about 0.2 mm or more and about 10 mm or less (para. [0024] of Saito discloses a dimension of 1.6mm – 3.2mm); a dimension of the multilayer body in the height direction is about 0.1 mm or more and about 10 mm or less (paras. [0005] and [0024] of Saito discloses a size of 0.8mm – 1.6mm); and a dimension of the multilayer body in the width direction is about 0.1 mm or more and about 10 mm or less (paras. [0005] and [0024] of Saito discloses a size of 0.8mm – 1.6mm).
Regarding claim 6, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein each of the plurality of ceramic layers includes at least one of BaTiO3, CaTiO3, SrTiO3, or CaZrO3 as a main component (para. [0023] of Saito).
Regarding claim 8, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein a thickness of each of the plurality of ceramic layers is about 0.5 μm or more and about 15 μm or less (para. [0034] of Saito discloses a thickness of 5 μm which is contained within the claimed range).
Regarding claim 9, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein each of the first and second internal conductive layers includes at least one of Ni, Cu, Ag, Pd, or Au, or an alloy including at least one of Ni, Cu, Ag, Pd, or Au (para. [0024] of Saito).
Regarding claim 11, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein a total number of the first and second internal conductive layers is 10 or more and 700 or less (paras. [0024] and [0034] of Saito discloses any number of layers may be used to achieve a desired capacitance and gives 10 layers as an example, overlapping with the claimed range).
Regarding claim 12, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein the first external electrode extends onto a portion of each of the first and second main surfaces and the first and second lateral surfaces; and the second external electrode extends onto a portion of each of the first and second main surfaces and the first and second lateral surfaces (Figs. 1 and 5).
Regarding claim 13, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein each of the first and second base electrode layers is a fired layer (para. [0024] of Saito).
Regarding claim 14, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein each of the first and second base electrode layers further includes a glass component (para. [0024] of Saito).
Regarding claim 16, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1, wherein each of the first and second base electrode layers further includes a ceramic component (para. [0005] and claim 1 of Saito).
Regarding claim 17, Saito as modified by Seishi further discloses
The multilayer ceramic electronic component according to claim 16, wherein the ceramic component includes at least one of BaTiO3, CaTiO3, (Ba, Ca)TiO3, SrTiO3, or CaZrO3 (paras. [0005], [0009] and [0023] discloses that the ceramic in the electrode is common to that in the body).
Regarding claim 18, Saito as modified by Seishi further discloses
The multilayer ceramic electronic component according to claim 1, wherein the metal component in each of the first and second base electrode layers includes at least one of Cu, Ni, Ag, Pd, Ag-Pd alloy, or Au (para. [0024] of Saito).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito in view of Seishi and further in view of Kowase US 2021/0159014 A1 (hereafter referred to as Kowase).
Regarding claim 7, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 6, wherein each of the plurality of ceramic layers includes additives (para. [0024] of Saito). Saito fails to explicitly discloses wherein the additives include at least one of a Mn compound, a Fe compound, a Cr compound, a Co compound, or a Ni compound as a subcomponent.
Seishi fails to disclose wherein each of the plurality of ceramic layers includes at least one of a Mn compound, a Fe compound, a Cr compound, a Co compound, or a Ni compound as a subcomponent.
Kowase discloses wherein the additives includes at least one of a Mn compound, a Fe compound, a Cr compound, a Co compound, or a Ni compound as a subcomponent (para. [0052] and [0072]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to use Mn as an additive (or subcomponent) in the dielectric layer of Saito to prevent grain growth in the dielectric layer, creating a dielectric with a more uniform grain size (para. [0042] and [0072] of Kowase).
Claim(s) 10 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Saito in view of Seishi and further in view of Hattori US 2004/0179326 A1 (hereafter referred to as Hattori).
Regarding claim 10, Saito as modified by Seishi further discloses:
The multilayer ceramic electronic component according to claim 1. Saito fails to discloses wherein a thickness of each of the first and second internal conductive layers about 0.2 μm or more and about 2.0 μm or less, but rather discloses a thickness of 15 μm to 25 μm.
Seishi fails to discloses wherein a thickness of each of the first and second internal conductive layers about 0.2 μm or more and about 2.0 μm or less.
Hattori discloses wherein a thickness of each of the first and second internal conductive layers is 0.1 μm or more and 0.4 μm or less (para. [0021]), overlapping with the claimed range.
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to decrease the internal electrode thickness of Saito to an internal electrode thickness of 0.1 μm to 0.4 μm as taught by Kowase to improve volumetric efficiency and decrease step size, while preventing warpage of the internal electrode (para. [0021] of Hattori).
Regarding claim 15, Saito as modified by Seishi discloses:
The multilayer ceramic electronic component according to claim 14. However, Saito fails to explicitly disclose wherein the glass component includes at least one of B, Si, Ba, Mg, Al, or Li.
Seishi fails to discloses wherein the glass component includes at least one of B, Si, Ba, Mg, Al, or Li.
Hattori discloses wherein the glass component includes at least one of B, Si, Ba, Mg, Al, or Li (para. [0073]).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to choose a glass containing B, Li, Si, or Ba for the glass in the base layer of Saito to improve adhesion of the base electrode layer. Furthermore, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
JP 2002170733 A – Para. [0006] teaches a tensile internal stress for a nickel-plating layer of 50 kgf/mm2 (490 MPa) or less.
US 2019/0084040 A1 – para. [0138] teaches ceramic additives; para. [0143] teaches a silicon glass; para. [0153] teaches a number of layers and internal electrode thickness
Communication
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/T.J.T./Examiner, Art Unit 2847
/Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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