DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 20210132427 A1 (Tai; Ming-Jou et al.)
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Per claims 1, 9, and 17-18, Tai teaches a display device [1] comprising: a pixel including a transistor [GE1,DE1,SE1], a pixel electrode [PE1], and a common electrode [CL4]; a semiconductor layer included in the transistor and electrically connected to the pixel electrode [CHL]; an insulating layer formed between the semiconductor layer and the pixel electrode [PL], and having a contact hole [TH1], wherein a part of the pixel electrode is located in the contact hole [see figure 4]; and a spacer filling the contact hole and protruding toward an opposite side of the transistor from the contact hole [SP1], wherein a part of the common electrode overlaps the spacer and the pixel electrode [see figure 4].
Per claims 2 and 10, Tai teaches the display device according to claim 1, further comprising: a first conductive layer electrically connecting the semiconductor layer and the pixel electrode [DE1], wherein the insulating layer is located on the first conductive layer [see figure 1], and the contact hole exposes the first conductive layer [see figure 4].
Per claims 3 and 11, Tai teaches the display device according to claim 2, further comprising: a second conductive layer between the insulating layer and the pixel electrode, wherein the second conductive layer overlaps the pixel electrode and the common electrode [CL3, see figure 4].
Per claims 4 and 12, Tai teaches the display device according to claim 1, wherein the part of the common electrode is located between the spacer and the pixel electrode [see figure 4].
Per claims 5 and 13, Tai teaches the display device according to claim 1, further comprising: a signal line electrically connected to the semiconductor layer [DL1], wherein the first conductive layer is in physical contact with the semiconductor layer at a first portion [see figure 1 and 4], the signal line overlaps the semiconductor layer at a second portion [see figure 1], and the spacer overlaps neither the first portion nor the second portion [see figures 1 and 4].
Per claims 6 and 14, Tai teaches the display device according to claim 1, wherein a top surface of the spacer is farther from the semiconductor layer than a surface of the common electrode is [see figure 4].
Per claims 7, 15, and 20, Tai teaches the display device according to claim 1, wherein a distance between a top surface of the spacer and the semiconductor layer is longer than a distance between a surface of the common electrode and the semiconductor layer [see figure 4].
Per claims 8 and 16, Tai teaches the display device according to claim 1, wherein the semiconductor layer is formed of an oxide semiconductor [see paragraph 0025: “the material of the semiconductor layer CHL may include amorphous silicon, polysilicon, or metal oxide, but is not limited thereto.”]
Per claim 19. Tai teaches the display device according to claim 18, wherein the contact hole is filled with the pixel electrode and the common electrode [see figure 4].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAMES A DUDEK whose telephone number is (571)272-2290. The examiner can normally be reached Monday-Thursday 6:30-4:30 MT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Carruth can be reached at 571-272-9791. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAMES A DUDEK/ Primary Examiner, Art Unit 2871
