DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 2 is rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Cheng et al (US Publication No. 20170324240).
Regarding claim 2, Cheng teaches the electronic apparatus (i.e., the electronic apparatus 10; fig. 1B), wherein the electrostatic protection circuit portion (i.e., the electrostatic protection circuit portion ESD1, ESD2; fig. 1B) comprises a connection circuit portion (i.e., connection circuit portion R_CL) and a discharge path portion (i.e., discharge path portion diodes embedded in 104; fig. 2A), the connection circuit portion is electrically connected to the functional circuit portion (i.e., the functional circuit portion 102) and the external control circuit portion (i.e., the external control circuit portion 104) to transmit the electrical signal (i.e., the electrical signal in line 106), and is configured to prevent static electricity from being transmitted to the functional circuit portion (implicit, as seen in fig. 1B); and the discharge path portion is electrically connected to the connection circuit portion through the external control circuit portion (implicit, as seen in fig. 2A) and is configured to provide an electrostatic discharge path (i.e., the dashed line Discharging; fig. 2A) (e.g., Please refer to FIGS. 2A and 2B, which are schematic diagrams of detailed operations of the output circuit 10 shown in FIGS. 1A and 1B. More specifically, FIG. 2A illustrates current paths in the ESD phase and FIG. 2B illustrates current paths in the normal operation of the semiconductor chip; para. [0022]).
Allowable Subject Matter
Claims 3-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, Cheng teaches the invention set forth above. However, Cheng does not particularly teach wherein the external control circuit portion comprises a first transistor of type N and a second transistor of type P, and the at least one external terminal comprises a first external terminal, a source electrode of the first transistor is electrically connected to the connection circuit portion, and a drain electrode of the first transistor is electrically connected to the first external terminal, a source electrode of the second transistor is electrically connected to the connection circuit portion, and a drain electrode of the second transistor is electrically connected to the first external terminal, and a gate electrode of the first transistor and a gate electrode of the second transistor are configured to receive respectively a pair of control signals which are inverted; the discharge path portion comprises a first diode and a second diode, the first diode is between the drain electrode of the first transistor and a substrate of the first transistor, the drain electrode of the first transistor is determined as a cathode of the first diode, and the substrate of the first transistor is determined as an anode of the first diode and is configured to receive a first power supply voltage; and the second diode is between the drain electrode of the second transistor and a substrate of the second transistor, the drain electrode of the second transistor is determined as an anode of the second diode, the substrate of the second transistor is determined as the cathode of the second diode and is configured to receive a second power supply voltage, and the first power supply voltage is lower than the second power supply voltage.
Hence claim 3 will be deemed allowable if rewritten in an independent form.
Claims 4-6 depend on objected claim 3, consequently claims 4-6 will also be deemed allowable.
Claims 1 and 7-10 are not elected.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUAAMAR Q AL-TAWEEL whose telephone number is (571)270-0339. The examiner can normally be reached 0730-1700.
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/MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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