DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 8, 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over KIM(US 20200050404 A1), in view of Malina (US 20200201549 A1)
Regarding Claim 1, KIM teaches:
A storage device comprising: a memory device configured to perform operations in response to a command received from a host device; (KIM, [0016] FIG. 3 is a block diagram illustrating an example of a nonvolatile memory device included in a storage device of FIG. 2.)
and a memory controller configured to measure a performance time of the operations (KIM, Fig. 3, 350, control circuit)
and to generate a timeout signal in response to an occurrence of a timeout with respect to the operations, (KIM, [0010], when the first time amount is longer than the time-out time included in the command signal, providing a second response signal including the first time amount and a time-out reset flag from the storage device to the host)
wherein the memory controller: receives a request including a timeout information for the command received from the host device; (KIM, [0010], a method of operating an electronic system including a host and a storage device includes transmitting a command signal including a time-out time from the host to the storage device;)
KIM does not explicitly teach:
sets a timeout reference time, corresponding to the command, based on the timeout information;
However, Malina teaches:
sets a timeout reference time, corresponding to the command, based on the timeout information; (Malina, Fig. 5, [0076] In block 502, a target value is set for DSD 106 representing a target number of data access operations within a predetermined period of time for a storage capacity of DSD 106. [0078] In other examples, controller 120 in response to receiving the target value from host 101, may adjust or tune the prioritization of commands by changing a command timeout for commands to be performed in the first area type or in the second area type.)
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to combine KIM with adjust timeout through controller as taught by Malina, so decreasing the command timeout for commands to be performed in the first area type can increase the priority of such commands so that more of these commands are performed ahead of commands to be performed in the second area type. The overall faster performance of commands in the first area type then increases the performance density for DSD 106. (Malina, [0078])
KIM in view of Malina further teaches:
detects whether performance of the operations has been completed before the timeout occurs based on the timeout reference time; (KIM, [0010], when the first time amount is equal to or shorter than the time-out time included in the command signal...when the first time amount is longer than the time-out time included in the command signal. Examiner’s note: Since Malina teaches the adjustment of timeout based on the timeout received. KIM in view of Malina will teach the comparison with the newly adjusted timeout value)
and transmits, in response to the command, the timeout signal generated when the performance of the operations is not completed until before expiration of the timeout reference time. (KIM, [0010], when the first time amount is longer than the time-out time included in the command signal, providing a second response signal including the first time amount and a time-out reset flag from the storage device to the host; and when the host receives the second response signal from the storage device.... Examiner’s note: Since Malina teaches the adjustment of timeout based on the timeout received. KIM in view of Malina will teach the timeout check with the newly adjusted timeout value)
Regarding Claim 8, KIM in view of Malina teaches:
A computing system comprising: a host device configured to generate a command instructing operations to be performed in a memory device; (KIM, [0026] Referring to FIG. 1, the host may transmit a command signal including a time-out time to the storage device (step S110).)
and a storage device including the memory device configured to perform the operations (KIM, [0016] FIG. 3 is a block diagram illustrating an example of a nonvolatile memory device included in a storage device of FIG. 2.)
and a memory controller configured to control the memory device, (KIM, Fig. 3, 350, control circuit)
wherein the host device includes a timeout information for the command, (KIM, [0010], a method of operating an electronic system including a host and a storage device includes transmitting a command signal including a time-out time from the host to the storage device;)
and transmits, to the storage device, a first request instructing performance of a timeout detection operation on the command, (KIM, [0010], a method of operating an electronic system including a host and a storage device includes transmitting a command signal including a time-out time from the host to the storage device;)
and wherein, the memory controller sets a timeout reference time, corresponding to the command, based on the timeout information, (Malina, Fig. 5, [0076] In block 502, a target value is set for DSD 106 representing a target number of data access operations within a predetermined period of time for a storage capacity of DSD 106. [0078] In other examples, controller 120 in response to receiving the target value from host 101, may adjust or tune the prioritization of commands by changing a command timeout for commands to be performed in the first area type or in the second area type.)
detects whether performance of the operations has been completed before the timeout reference time included in the timeout information elapses in response to the first request, (KIM, [0010], when the first time amount is equal to or shorter than the time-out time included in the command signal...when the first time amount is longer than the time-out time included in the command signal. Examiner’s note: Since Malina teaches the adjustment of timeout based on the timeout received. KIM in view of Malina will teach the comparison with the newly adjusted timeout value)
and transmits, to the host device, a timeout signal for a timeout in which the performance of the operations is not completed before the timeout reference time elapses. (KIM, [0010], when the first time amount is longer than the time-out time included in the command signal, providing a second response signal including the first time amount and a time-out reset flag from the storage device to the host; and when the host receives the second response signal from the storage device.... Examiner’s note: Since Malina teaches the adjustment of timeout based on the timeout received. KIM in view of Malina will teach the timeout check with the newly adjusted timeout value)
Regarding Claim 14, KIM in view of Malina teaches:
A method of operating a storage device, the method comprising: receiving requests from a host device including a timeout information for a command; (KIM, [0010], a method of operating an electronic system including a host and a storage device includes transmitting a command signal including a time-out time from the host to the storage device;)
receiving from the host device the command, which instructs operations to be performed in a memory device; (KIM, [0010], a method of operating an electronic system including a host and a storage device includes transmitting a command signal including a time-out time from the host to the storage device; [0016] FIG. 3 is a block diagram illustrating an example of a nonvolatile memory device included in a storage device of FIG. 2.)
setting a timeout reference time, corresponding to the command, based on the timeout information; (Malina, Fig. 5, [0076] In block 502, a target value is set for DSD 106 representing a target number of data access operations within a predetermined period of time for a storage capacity of DSD 106. [0078] In other examples, controller 120 in response to receiving the target value from host 101, may adjust or tune the prioritization of commands by changing a command timeout for commands to be performed in the first area type or in the second area type.)
detecting a timeout error when the operations corresponding to the command are not completed before the timeout reference time included in the timeout information elapses; (KIM, [0010], when the first time amount is longer than the time-out time included in the command signal. Examiner’s note: Since Malina teaches the adjustment of timeout based on the timeout received. KIM in view of Malina will teach the comparison with the newly adjusted timeout value)
and performing a reset operation corresponding to the timeout error. (KIM, [0038] When the host does not receive the first response signal from the storage device although the host retransmits the command signal to the storage device more than a threshold number of times, the host may reset the storage device to recover the storage device and then retransmit the command signal to the storage device such that the storage device may perform the operation corresponding to the command signal.)
Claim(s) 2, 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over KIM(US 20200050404 A1), in view of Malina (US 20200201549 A1) and Grosz (US 20210124530 A1).
Regarding Claim 2, KIM in view of Malina teaches:
The storage device of claim 1, wherein the timeout information includes a first information indicating a timeout reference time, (KIM, 0027] The time-out time may represents a desired or, alternatively, maximum time during which the host waits for receiving a response signal)
sets the timeout reference time, corresponding to the command, based on the first information. (KIM, [0031] After that, the storage device may compare the necessary or, alternatively, requested time with the time-out time included in the command signal (step S130).)
KIM in view of Malina does not explicitly teach:
and wherein the memory controller sets the timeout reference time, corresponding to the command, based on the first information.
However, Grosz teaches:
and wherein the memory controller sets the timeout reference time, corresponding to the command, based on the first information. (Grosz, Fig. 1, Memory Controller (115) includes Host timeout avoidance module(160). [0019] The host timeout avoidance module 160 may be configured to generate and transmit a response signal to the host 105 (e.g., over interface 111) before a memory device timer reaches a given host timeout interval and after a given memory device operation has been partially performed.)
Therefore, it would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to which said subject matter pertains to combine KIM in view of Malina with setting timeout reference time by the memory controller as taught by Grosz, because the host timeout avoidance module may track how long different classes of memory device operations are performed by the memory device before the host times out and issues a reset signal to the memory device. (Grosz, [0011])
Regarding Claim 9, KIM in view of Malina and Grosz teaches:
The computing system of claim 8, wherein the host device transmits, to the storage device, a second request instructing setting of the timeout reference time, (KIM, [0033] In this case, the host may retransmit the command signal to the storage device after resetting the time-out time included in the command signal to the necessary or, alternatively, requested time included in the second response signal (step S160).)
and wherein the memory controller sets the timeout reference time in response to the command. (KIM, [0034] When the storage device receives the command signal including the time-out time, which is reset to the necessary or, alternatively, requested time included in the second response signal, from the host, the storage device may recalculate the necessary or, alternatively, requested time for performing the operation corresponding to the command signal (step S120). Grosz, [0019] The host timeout avoidance module 160 may be configured to generate and transmit a response signal to the host 105 (e.g., over interface 111) before a memory device timer reaches a given host timeout interval and after a given memory device operation has been partially performed.)
Allowable Subject Matter
Claim 3, 4-7, 10-13, 15-18 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments, filed 02/27/2026, with respect to the rejection(s) of claim(s) 1, 8, and 14 under USC § 102 have been fully considered and are persuasive. Therefore, the 102 rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of newly found art reference(s). (See 103 rejection section above)
Applicant’s arguments, filed 02/27/2026, with respect to the rejection(s) of claim(s) 2 and 9 under USC § 103 have been fully considered and are persuasive. Therefore, the original 103 rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of newly found art reference(s). (See 103 rejection section above)
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
(US 20200050404 A1): A method includes transmitting a command signal including a time-out time from a host to a storage device; determining, by the storage device, a first time amount, which is an amount of time required for the storage device to perform an operation corresponding to the command signal; when the first time amount is not greater than the time-out time, providing a first response signal including a success flag from the storage device to the host after the storage device performs the operation within the time-out time; when the first time amount is longer than the time-out time, providing a second response signal including the first time amount and a time-out reset flag from the storage device to the host; and when the host receives the second response signal, retransmitting the command signal to the storage device after the host resets the time-out time to the first time amount.
(US 20210124530 A1): Devices and techniques for host timeout avoidance in a memory device are disclosed herein. A memory device command is received with a memory device from a host. A determination is made, with the memory device, of a host timeout interval associated with the received memory device command. A tinier of the memory device is initialized to monitor a time interval from receipt of the memory device command. After partially performing the memory device command, a response to the host before the memory device timer interval reaches the host timeout interval is generated by the memory device.
(US 20250165345 A1): A storage device may recover from a firmware failure that places the storage device in an undetectable state. The storage device includes a memory device to store recovery firmware. A storage device controller includes a failure detector module that may identify the firmware failure when a periodic signal is not received by the failure detector module from a firmware thread, when the failure detector module determines that an initialization counter value is greater than an initialization threshold, or when the failure detector module receives a notification of a predefined number of power cycle events occurring with a given time frame. Upon identifying the firmware failure, the failure detector module updates a boot address. A recovery module May obtain recovery firmware from the memory device, based on the boot address, to recover the storage device in a recovery mode, and perform phased recovery actions to restart the storage device.
(US 11681466 B2): Example storage systems, storage devices, and methods provide proactive management of storage operations to, for example, beneficially minimize bottlenecking, latency, and other issues. An example system has a storage pool with a first storage device and a second storage device, and a processor configured to generate a storage request including a storage command, include a command processing time constraint in the storage request, send the storage request to the first storage device, and receive, from the first storage device, a proactive response including an estimation for an execution of the storage command by the first storage device based on the command processing time constraint. The processor may then select a fallback mechanism for executing the storage command based on the proactive response.
(US 20150302024 A1): A storage system and a method for processing a data operation request are disclosed. The method is applied to a storage system that has a write once read many (WORM) function. In the method, after the storage system receives a data operation request, which is used to change data stored in the storage system, sent by an application server, the storage system acquires a time difference between a real-time clock (RTC) and a reference clock, wherein the RTC is configured to provide system time for the storage system, and the reference clock cannot be modified when the system is running. Then, the storage system determines whether the time difference is greater than an accumulated time precision error of the reference clock, and refuses to execute the data operation request when the time difference is greater than the accumulated time precision error.
(US 20200241795 A1): A method for performing access management of a memory device and associated apparatus (e.g. the memory device and controller thereof such as a memory controller within the memory device, an associated host device and an associated electronic device) are provided. The method may include: when the host device sends a host command to the memory device, utilizing the memory controller to estimate a completion time of the host command, to generate completion time information corresponding to the completion time; and utilizing the memory controller to send the completion time information to the host device, to allow the host device to perform polling after the completion time to obtain execution result of the host command.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XINYUAN YU whose telephone number is (571)272-7140. The examiner can normally be reached Monday-Friday 8:30-5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo can be reached at 571-272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/XINYUAN YU/Examiner, Art Unit 2113 /BRYCE P BONZO/Supervisory Patent Examiner, Art Unit 2113
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