Prosecution Insights
Last updated: April 19, 2026
Application No. 18/928,592

DISAGGREGATED MEMORY SERVER HAVING CHASSIS WITH A PLURALITY OF RECEPTACLES ACCESSIBLE CONFIGURED TO CONVEY DATA WITH PCIE BUS AND PLURALITY OF MEMORY BANKS

Non-Final OA §DP
Filed
Oct 28, 2024
Examiner
PEYTON, TAMMARA R
Art Unit
2184
Tech Center
2100 — Computer Architecture & Software
Assignee
Tormem Inc.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
97%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
864 granted / 952 resolved
+35.8% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
20 currently pending
Career history
972
Total Applications
across all art units

Statute-Specific Performance

§101
6.5%
-33.5% vs TC avg
§103
63.2%
+23.2% vs TC avg
§102
8.4%
-31.6% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 952 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). Claims 21-40 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 14-20 of U.S. Patent No. 12,135,884. Although the claims at issue are not identical, they are not patentably distinct from each other because: Claim 21 and 22, Instant Application 18/928,592 Claim 14, US Patent Application 18/086,488, US Patent #12,135,884 A method of providing disaggregated memory, comprising: in a first determination, determining to allocate some of a pool of disaggregated memory to a first computing device; in response to the first determination, allocating a first subset of the pool of disaggregated memory to the first computing device, whereby the first subset of the pool of disaggregated memory is treated by a first operating system of the first computing device as local system memory; in a second determination or the first determination, determining to allocate some of the pool of disaggregated memory to a second computing device; and in response to the first or second determination, allocating a second subset of the pool of disaggregated memory to the second computing device, whereby the second subset of the pool of disaggregated memory is treated by a second operating system of the second computing device as local system memory. A tangible non-transitory computer-readable medium storing computer program instructions that when executed by one or more processors effectuate operations comprising: receiving, by one or more processors, a first request from a first computing device for an amount of volatile memory to be made available to the first computing device on a Peripheral Component Interconnect Express (PCIe) bus of the first computing device; allocating, by one or more processors, a first subset of volatile memory from a portion of volatile memory managed by a memory controller to the first computing device, the first computing device and the memory controller coupled to a PCIe switch configured for routing PCIe bus data between computing devices and memory controllers, the memory controller being among a plurality of memory controllers managing respective portions of a pool of volatile memory, the first computing device being among a plurality of computing devices coupled to the switch, the memory controller and the switch placing in communication, based on the allocating, the first computing device with the first subset of volatile memory; receiving, by one or more processors, a second request from a second computing device of the plurality of computing devices coupled to the switch for an amount of volatile memory to be made available to the second computing device on a PCIe bus of the second computing device; and allocating, by one or more processors, a second subset of volatile memory from the portion of volatile memory managed by the memory controller to the second computing device, the memory controller and the switch placing in communication, based on the allocating, the second computing device with the second subset of volatile memory. 22. (new) The method of claim 21, wherein allocating the first subset of the pool of disaggregated memory and allocating the second subset of the pool of disaggregated memory is performed with a fabric manager in response to commands received via an application program interface (API) of the fabric manager.. RELEVENT ART CITED BY THE EXAMINER The following prior art made of record and relied upon is citied to establish the level of skill in the applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP 707.05(c). Nguyen et al., (US 11,561,697) is sited as the part of the parent case and Li is sited as prior art that teaches a single central processing unit (CPU) socket can only support a limited number of DIMM slots, and a single DIMM has a limited capacity. (Abstract) Conclusion The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tammara Peyton whose telephone number is (571) 272-4157. The examiner can normally be reached between 8:30- 6:00 from Monday to Thursday, (I am off every first Friday), and 7:30- 4:00 every second Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor Henry Tsai can be reached on (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Any inquiry of a general nature of relating to the status of this application should be directed to the Group receptionist whose telephone number is (571) 272- 2100. /Tammara R Peyton/ Primary Examiner, Art Unit 2184 January 26, 2026
Read full office action

Prosecution Timeline

Oct 28, 2024
Application Filed
Feb 07, 2026
Non-Final Rejection — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
97%
With Interview (+6.1%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 952 resolved cases by this examiner. Grant probability derived from career allow rate.

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