DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Application # 18/928,781 was filed on 2/25/2026.
Claims 1-20 are subject to examination.
An IDS filed on 8/20/2025 and 4/9/2026 has been fully considered by the Examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1, 9, 10, 16 respectively are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, 8, 9, 16 respectively of copending Application No. 18/649,319 (hereinafter ‘319 patent application) in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto)
With respect to claims 1, 9, 16 of instant application and claims 1, 8, 16 respectively of ‘319 patent application contain similar subject matter as follows:
“A data processing unit (DPU) comprising: DPU hardware comprising a processing device and an acceleration hardware engine; and a memory operatively coupled to the DPU hardware, the memory to store instructions that, when executed by the DPU hardware, are to provide a virtual switch and a network pipeline abstraction layer (NPAL) that supports multiple network protocols and network functions in a network pipeline, wherein the network pipeline comprises a set of tables and logic organized in a specific order to be accelerated by the acceleration hardware engine,”
‘319 patent application does not teach “wherein the virtual switch is to: monitor a link availability of each of a plurality of links to a destination, the plurality of links being specified in an initial group of identifiers; and detect a link failure of a first link of the plurality of links, and wherein the NPAL is to: remove a first link identifier, associated with the first link, from the initial group of link identifiers to obtain a modified group of link identifiers; and cause a routing table in the NPAL to be updated to remove the first link identifier, and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers.”.
Yoshimoto teaches wherein the virtual switch (i.e. packet forwarding device) is to: monitor a link availability of each of a plurality of links to a destination (Paragraph 42), the plurality of links being specified in an initial group of identifiers (i.e. node identifiers)(Paragraph 46) ; and detect a link failure of a first link of the plurality of links (i.e. detecting link failure) (Paragraph 42), and wherein the NPAL is to: remove a first link identifier (i.e. delete node ID), associated with the first link (i.e. when the link failure occurs), from the initial group of link identifiers to obtain a modified group of link identifiers (Paragraph 96-97); and cause a routing table in the NPAL to be updated to remove the first link identifier (i.e. deletes node ID on the communication set by command input from the routing table)(Paragraph 126), and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers (i.e. switches to autonomous path P11 for the communication of packets with VLAN IDs 9 and 11 which are interrupted) (Paragraph 73-74). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Yoshimoto’s teaching in ‘319 patent application’s teaching to come up with monitoring a link availability of each pf plurality of link to destination with group of identifiers, detecting a link failure and removing the link identifier and rerouting traffic to different remaining links. The motivation for doing so would be keep the latency down, and after detecting link failure, switching to an autonomous communication path therefore there is no interruption in service and keeping the latency down.
With respect to claim 10 of instant application and claim 9 respectively of ‘319 patent application contain similar subject matter
This is a provisional nonstatutory double patenting rejection.
Claims 1, 9, 16 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, 8, 15 of copending Application No. 18/928772 in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto)
With respect to claims 1, 9, 16 of instant application and claims 1, 8, 15 respectively of ‘772 patent application contain similar subject matter as follows:
“A data processing unit (DPU) comprising: DPU hardware comprising a processing device and an acceleration hardware engine; and a memory operatively coupled to the DPU hardware, the memory to store instructions that, when executed by the DPU hardware, are to provide a virtual switch and a network pipeline abstraction layer (NPAL) that supports multiple network protocols and network functions in a network pipeline, wherein the network pipeline comprises a set of tables and logic organized in a specific order to be accelerated by the acceleration hardware engine,”
‘772 patent application does not teach “wherein the virtual switch is to: monitor a link availability of each of a plurality of links to a destination, the plurality of links being specified in an initial group of identifiers; and detect a link failure of a first link of the plurality of links, and wherein the NPAL is to: remove a first link identifier, associated with the first link, from the initial group of link identifiers to obtain a modified group of link identifiers; and cause a routing table in the NPAL to be updated to remove the first link identifier, and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers.”.
Yoshimoto teaches wherein the virtual switch (i.e. packet forwarding device) is to: monitor a link availability of each of a plurality of links to a destination (Paragraph 42), the plurality of links being specified in an initial group of identifiers (i.e. node identifiers)(Paragraph 46) ; and detect a link failure of a first link of the plurality of links (i.e. detecting link failure) (Paragraph 42), and wherein the NPAL is to: remove a first link identifier (i.e. delete node ID), associated with the first link (i.e. when the link failure occurs), from the initial group of link identifiers to obtain a modified group of link identifiers (Paragraph 96-97); and cause a routing table in the NPAL to be updated to remove the first link identifier (i.e. deletes node ID on the communication set by command input from the routing table)(Paragraph 126), and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers (i.e. switches to autonomous path P11 for the communication of packets with VLAN IDs 9 and 11 which are interrupted) (Paragraph 73-74). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Yoshimoto’s teaching in ‘772 patent application’s teaching to come up with monitoring a link availability of each pf plurality of link to destination with group of identifiers, detecting a link failure and removing the link identifier and rerouting traffic to different remaining links. The motivation for doing so would be keep the latency down, and after detecting link failure, switching to an autonomous communication path therefore there is no interruption in service and keeping the latency down.
This is a provisional nonstatutory double patenting rejection.
Claims 1, 9, 16 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 11, 18 of copending Application No. 18/928,794 (hereinafter ‘794 patent application) in view of in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto)
With respect to claims 1, 9, 16 of instant application and claims 1, 11, 18 respectively of ‘794 patent application contain similar subject matter as follows:
“A data processing unit (DPU) comprising: DPU hardware comprising a processing device and an acceleration hardware engine; and a memory operatively coupled to the DPU hardware, the memory to store instructions that, when executed by the DPU hardware, are to provide a virtual switch and a network pipeline abstraction layer (NPAL) that supports multiple network protocols and network functions in a network pipeline, wherein the network pipeline comprises a set of tables and logic organized in a specific order to be accelerated by the acceleration hardware engine,”
‘794 patent application does not teach “wherein the virtual switch is to: monitor a link availability of each of a plurality of links to a destination, the plurality of links being specified in an initial group of identifiers; and detect a link failure of a first link of the plurality of links, and wherein the NPAL is to: remove a first link identifier, associated with the first link, from the initial group of link identifiers to obtain a modified group of link identifiers; and cause a routing table in the NPAL to be updated to remove the first link identifier, and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers.”.
Yoshimoto teaches wherein the virtual switch (i.e. packet forwarding device) is to: monitor a link availability of each of a plurality of links to a destination (Paragraph 42), the plurality of links being specified in an initial group of identifiers (i.e. node identifiers)(Paragraph 46) ; and detect a link failure of a first link of the plurality of links (i.e. detecting link failure) (Paragraph 42), and wherein the NPAL is to: remove a first link identifier (i.e. delete node ID), associated with the first link (i.e. when the link failure occurs), from the initial group of link identifiers to obtain a modified group of link identifiers (Paragraph 96-97); and cause a routing table in the NPAL to be updated to remove the first link identifier (i.e. deletes node ID on the communication set by command input from the routing table)(Paragraph 126), and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers (i.e. switches to autonomous path P11 for the communication of packets with VLAN IDs 9 and 11 which are interrupted) (Paragraph 73-74). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Yoshimoto’s teaching in ‘794 patent application’s teaching to come up with monitoring a link availability of each pf plurality of link to destination with group of identifiers, detecting a link failure and removing the link identifier and rerouting traffic to different remaining links. The motivation for doing so would be keep the latency down, and after detecting link failure, switching to an autonomous communication path therefore there is no interruption in service and keeping the latency down.
This is a provisional nonstatutory double patenting rejection.
Claims 1, 9, 16 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, 9, 17 of copending Application No. 18/928,778 (hereinafter ‘778 patent application) in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto)
With respect to claims 1, 9, 16 of instant application and claims 1, 9, 17 respectively of ‘778 patent application contain similar subject matter as follows:
“A data processing unit (DPU) comprising: DPU hardware comprising a processing device and an acceleration hardware engine; and a memory operatively coupled to the DPU hardware, the memory to store instructions that, when executed by the DPU hardware, are to provide a virtual switch and a network pipeline abstraction layer (NPAL) that supports multiple network protocols and network functions in a network pipeline, wherein the network pipeline comprises a set of tables and logic organized in a specific order to be accelerated by the acceleration hardware engine,”
‘778 patent application does not teach “wherein the virtual switch is to: monitor a link availability of each of a plurality of links to a destination, the plurality of links being specified in an initial group of identifiers; and detect a link failure of a first link of the plurality of links, and wherein the NPAL is to: remove a first link identifier, associated with the first link, from the initial group of link identifiers to obtain a modified group of link identifiers; and cause a routing table in the NPAL to be updated to remove the first link identifier, and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers.”.
Yoshimoto teaches wherein the virtual switch (i.e. packet forwarding device) is to: monitor a link availability of each of a plurality of links to a destination (Paragraph 42), the plurality of links being specified in an initial group of identifiers (i.e. node identifiers)(Paragraph 46) ; and detect a link failure of a first link of the plurality of links (i.e. detecting link failure) (Paragraph 42), and wherein the NPAL is to: remove a first link identifier (i.e. delete node ID), associated with the first link (i.e. when the link failure occurs), from the initial group of link identifiers to obtain a modified group of link identifiers (Paragraph 96-97); and cause a routing table in the NPAL to be updated to remove the first link identifier (i.e. deletes node ID on the communication set by command input from the routing table)(Paragraph 126), and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers (i.e. switches to autonomous path P11 for the communication of packets with VLAN IDs 9 and 11 which are interrupted) (Paragraph 73-74). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Yoshimoto’s teaching in ‘778 patent application’s teaching to come up with monitoring a link availability of each pf plurality of link to destination with group of identifiers, detecting a link failure and removing the link identifier and rerouting traffic to different remaining links. The motivation for doing so would be keep the latency down, and after detecting link failure, switching to an autonomous communication path therefore there is no interruption in service and keeping the latency down.
This is a provisional nonstatutory double patenting rejection.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1- is/are rejected under 35 U.S.C. 103 as being unpatentable over Kutch et al. U.S. Patent Publication # 2021/0117360 (hereinafter Kutch) in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto)
With respect to claim 1, Kutch teaches a data processing unit (DPU) comprising: DPU hardware comprising a processing device and an acceleration hardware engine (Paragraph 56, 54); and
-a memory operatively coupled to the DPU hardware (Paragraph 50), the memory to store instructions that, when executed by the DPU hardware, are to provide a virtual switch and a network pipeline abstraction layer (NPAL) that supports multiple network protocols and network functions in a network pipeline, wherein the network pipeline comprises a set of tables and logic organized in a specific order to be accelerated by the acceleration hardware engine (Paragraph 61)
Kutch does not explicitly teach wherein the virtual switch is to: monitor a link availability of each of a plurality of links to a destination, the plurality of links being specified in an initial group of identifiers; and detect a link failure of a first link of the plurality of links, and wherein the NPAL is to: remove a first link identifier, associated with the first link, from the initial group of link identifiers to obtain a modified group of link identifiers; and cause a routing table in the NPAL to be updated to remove the first link identifier, and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers.
Yoshimoto teaches wherein the virtual switch (i.e. packet forwarding device) is to: monitor a link availability of each of a plurality of links to a destination (Paragraph 42), the plurality of links being specified in an initial group of identifiers (i.e. node identifiers)(Paragraph 46) ; and detect a link failure of a first link of the plurality of links (i.e. detecting link failure) (Paragraph 42), and wherein the NPAL is to:
- remove a first link identifier (i.e. delete node ID), associated with the first link (i.e. when the link failure occurs), from the initial group of link identifiers to obtain a modified group of link identifiers (Paragraph 96-97); and cause a routing table in the NPAL to be updated to remove the first link identifier (i.e. deletes node ID on the communication set by command input from the routing table)(Paragraph 126), and wherein the acceleration hardware engine is to process network traffic data using the network pipeline and distribute the network traffic data to only the remaining links of the plurality of links corresponding to the modified group of identifiers (i.e. switches to autonomous path P11 for the communication of packets with VLAN IDs 9 and 11 which are interrupted) (Paragraph 73-74). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Yoshimoto’s teaching in Kutch’s teaching to come up with monitoring a link availability of each pf plurality of link to destination with group of identifiers, detecting a link failure and removing the link identifier and rerouting traffic to different remaining links. The motivation for doing so would be keep the latency down, and after detecting link failure, switching to an autonomous communication path therefore there is no interruption in service and keeping the latency down.
With respect to claim 4, Kutch and Yoshimoto teaches the DPU of claim 2, but Yoshimoto further teaches the wherein the NPAL comprises Equal-Cost Multi-Path (ECMP) logic, wherein the ECMP logic is to: receive a first packet prior to the link failure of the first link (Paragraphs 49-50); perform an Internet Protocol (IP) address lookup for the first packet to identify an ECMP group identifier associated with the plurality of links (Paragraph 61-62, 84-85); hash the ECMP group identifier to identify any one of the plurality of links (Paragraph 55-60); receive a second packet after the link failure of the first link (Paragraph 90); perform an IP address lookup for the second packet to identify the ECMP group identifier (Paragraph 61-62, 84-85); and hash the ECMP group identifier to identify any one of the remaining links (Paragraph 55-60).
With respect to claim 5, Kutch and Yoshimoto teaches the DPU of claim 2, but Yoshimoto further teaches the wherein the virtual switch is further to: monitor the link availability of each of the plurality of links to the destination (Paragraph 42); detect a link recovery of the first link (Paragraph 46); add the first link identifier to the modified group of link identifiers to obtain the initial group of link identifiers (Paragraph 66-71); and causing the routing table in the NPAL to be updated to add the first link identifier (Paragraph 87-88), and wherein the acceleration hardware engine is to process subsequent network traffic data using the network pipeline and distribute the subsequent network traffic data to the plurality of links corresponding to the initial group of identifiers (Paragraph 73-74).
With respect to claim 6, Kutch and Yoshimoto teaches the DPU of claim 2, but Yoshimoto further teaches the wherein the NPAL comprises Equal-Cost Multi-Path (ECMP) logic, wherein the ECMP logic is to: receive a first packet prior to the link recovery of the first link (Paragraph 61-62, 84-85); perform an Internet Protocol (IP) address lookup for the first packet to identify an ECMP group identifier associated with the plurality of links (Paragraph 61-62, 84-85); hash the ECMP group identifier to identify any one of the remaining links (Paragraph 55-60); receive a second packet after the link recovery of the first link (Paragraph 61-62, 84-85); perform an IP address lookup for the second packet to identify the ECMP group identifier; and hash the ECMP group identifier to identify any one of the plurality of links (Paragraph 61-62, 84-85).
With respect to claim 8, Kutch and Yoshimoto teaches the DPU of claim 2, but Yoshimoto further teaches wherein the initial group of link identifiers is an Equal-Cost Multi-Path (ECMP) group, and wherein the virtual switch is to remove the first link identifier from the ECMP group in the virtual switch (Paragraph 96-97) and modify the routing table in the NAPL in parallel (Paragraph 73-74, 96-97).
With respect to claims 9 and 16, teaches same limitations as claim 1, therefore rejected under same basis.
With respect to claim 10, Kutch and Yoshimoto teaches the DPU of claim 2, but Kutch further teaches wherein the integrated circuit is at least one of a data processing unit (DPU), a network interface card (NIC), a network interface device, or a switch (Paragraph 151), wherein the DPU is a programmable data center infrastructure on a chip (Paragraph 108)
With respect to claim 11, Kutch and Yoshimoto teaches the DPU of claim 2, but Kutch further teaches wherein the NPAL comprises a set of applications programming interfaces (APIs) or classes that provide a unified interface to one or more applications executed by the computing device or a host device coupled to the integrated circuit (Paragraph 87, 205)
With respect to claims 13, 14, 15 respectively, teaches same limitations as claims 2, 4, 5, 6 respectively, therefore rejected under same basis.
With respect to claims 17, 18, 19, 20 respectively, teaches same limitations as claims 8, 4, 5, 6 respectively, therefore rejected under same basis.
Claim(s) 2-3, 7, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kutch et al. U.S. Patent Publication # 2021/0117360 (hereinafter Kutch) in view of Yoshimoto et al. U.S. Patent Publication # 2014/0347975 (hereinafter Yoshimoto) further in view of Miner et al. U.S. Patent Publication # 2014/0122678 (hereinafter Miner)
With respect to claim 2, Kutch and Yoshimoto teaches the DPU of claim 1, Yoshimoto further teaches the DPU of claim 1, wherein the virtual switch is controlled by a network service hosted on the DPU, the network service to update the routing table in the NPAL in response to the notification (Paragraph 158), the routing table storing configuration information associated with the initial group of identifiers (Paragraph 149), wherein the routing table is a first routing table of a bridge of the network pipeline or a second routing table of a router of the network pipeline (Paragraph 149-151)
Kutch and Yoshimoto does not explicitly teach wherein the virtual switch is to send a notification to the network service of the link failure of the first link.
Miner teaches wherein the virtual switch is to send a notification to the network service of the link failure of the first link (Paragraph 46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Miner’s teaching in Kutch and Yoshimoto’s teaching to come up with having virtual switch to send notification of the link failure. The motivation for doing so would be to notify of the link failure, therefore appropriate re-routing of the packets can take place thereby lowering latency.
With respect to claim 3, Kutch, Yoshimoto and Miner teaches the DPU of claim 2, but Miner further teaches the wherein the notification is a message from a kernel (Paragraph 46)
With respect to claim 7, Kutch and Yoshimoto teaches the DPU of claim 2, Yoshimoto further teaches the wherein the virtual switch is controlled by a network service hosted on the DPU, wherein the virtual switch is to: the routing table storing configuration information associated with the initial group of identifiers (Paragraph 126) and the network service to update the routing table in the NPAL in response to the second notification (Paragraph 126).
Kutch and Yoshimoto does not teach send a first notification to the network service of the link failure of the first link, the network service to update the routing table in the NPAL in response to the first notification; send a second notification to the network service of the link recovery of the first link.
Miner teaches send a first notification to the network service of the link failure of the first link, the network service to update the routing table in the NPAL in response to the first notification (Paragraph 46); send a second notification to the network service of the link recovery of the first link (Paragraph 46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement Miner’s teaching in Kutch and Yoshimoto’s teaching to come up with having virtual switch to send notification of the link failure. The motivation for doing so would be to notify of the link failure, therefore appropriate re-routing of the packets can take place thereby lowering latency.
With respect to claims 12, respectively, teaches same limitations as claims 2, respectively, therefore rejected under same basis.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Sindhu et al, US 20220224564 A1, discloses a forwarding pipeline implemented using flexible engines (e.g., a parser engine, a look-up engine, and a rewrite engine) and supports features of IP transit switching [paragraph 92]. The processing cores of networking unit 152 (and/or of processing clusters 156) may perform network interface card functionality, packet switching, and the like, and may use large forwarding tables and offer programmability [paragraph 92].
Mishra et al, US 20130176850 A1, discloses matching one or more header fields in the packet against a set of table entries in a set of flow tables to identify an action to be taken, the set of flow tables being part of an OpenFlow pipeline [claim 1].
Connor et al, US 20160182684 A1, discloses “Additionally, in the conventional service function chain operation, a serial network packet processing pipeline is created where each service function waits on the previous service function in the service chain to complete before it can begin. As will be discussed in further detail below, the network controller 108 determines an appropriate service function chain based on the required services and instantiates one or more VMs to perform the virtual service functions according to the service function chain” [paragraph 20].
Griswold et al, US 20150312160 A1, discloses in another example, a front-panel connector may be unplugged and replaced with breakout cable or vice versa. In case of such arbitrary changes, and/or in case of routine changes to the network, the techniques described in this disclosure may allow the user to dynamically reassign throughput to any serdes lanes in the switch, as may be desired. The dynamic reassignment or reconfiguration, of the serdes may be to create a logical port or in another example to separate a logical port into the constituent serdes to operate independently [paragraph 21].
Shah et al, US 20220318167 A1, discloses One of skill in the art in possession of the present disclosure will appreciate how this example illustrates how the direct-attach cable data transmission visual indicator system of the present disclosure supports “breakout” cable embodiments where a single physical port on the networking device provides four logical interfaces (e.g., at speeds of 4×10 GbE, 4×25 GbE, etc.) [paragraph 85].
Stan et al, US 20240073131 A1, discloses TC 102 may send configuration information to NEPs 114 and 116 indicating that each of their physical port ‘32’ should be configured to act as four independent logical ports. In this example, each logical port may be configured to utilize a virtual link comprising a distinct lane of physical cable 326. Continuing with this example, as part of implementing routing path groups, each emulated switch or one or more related logical ports may be associated with a different routing path group such that traffic associated with a particular routing path group identifier is forwarded via an appropriate logical port and/or link. In some embodiments, logical ports and/or links may utilize breakout cables such that logical ports can connect different NEPs and emulated switches implemented thereon [paragraph 103].
Peach et al, US 20250238339 A1, discloses in some cases, these signal lanes can be combined to form logical interfaces (which are also referred to herein as “channels”). For instance, a 4-lane port could be used as a single interface or channel (with all 4 signal lanes subsumed) or 4 individual interfaces (breakouts), each corresponding to a signal lane (paragraph 2).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DHAIRYA A PATEL whose telephone number is (571)272-5809. The examiner can normally be reached M-F 7:30am-4:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kamal B Divecha can be reached at 571-272-5863. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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DHAIRYA A. PATEL
Primary Examiner
Art Unit 2453
/DHAIRYA A PATEL/Primary Examiner, Art Unit 2453
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