Prosecution Insights
Last updated: May 29, 2026
Application No. 18/929,602

EFFICIENT COMMAND FETCHING IN A MEMORY SUB-SYSTEM

Non-Final OA §DOUBLEPATENT§DP
Filed
Oct 28, 2024
Priority
Jun 21, 2022 — continuation of 12/131,066
Examiner
TSAI, SHENG JEN
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology, Inc.
OA Round
2 (Non-Final)
70%
Grant Probability
Favorable
2-3
OA Rounds
1y 9m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
558 granted / 792 resolved
+15.5% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
18 currently pending
Career history
817
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
80.5%
+40.5% vs TC avg
§102
11.4%
-28.6% vs TC avg
§112
3.3%
-36.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 792 resolved cases

Office Action

§DOUBLEPATENT §DP
DETAILED ACTION 1. This Office Action is taken in response to Applicants’ Amendments and Remarks filed on 4/16/2026 regarding application 18/929,602 filed on 10/28/2024. Claims 1-20 are pending for consideration. 2. Response to Amendments and Remarks Applicants’ amendments and remarks have been fully and carefully considered, with the Examiner’s response set forth below. (1) In response to the amendments and remarks, an updated claim analysis has been made. Refer to the corresponding sections of the following Office Action for details. 3. Examiner’s Note (1) In the case of amending the Claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. This will assist in expediting compact prosecution. MPEP 714.02 recites: “Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” Amendments not pointing to specific support in the disclosure may be deemed as not complying with provisions of 37 C.F.R. 1.131(b), (c), (d), and (h) and therefore held not fully responsive. Generic statements such as “Applicants believe no new matter has been introduced” may be deemed insufficient. (2) Examiner has cited particular columns/paragraph and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. Double Patenting 4. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b). Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). 5. Claims 1-20 are rejected under the judicially created doctrine of obvious-type double patenting as being unpatentable over independent claims 1-20 of US Patent 12,131,066. Although not all of the conflicting claims are exactly identical, they are extremely similar and are not patentably distinct from each other as shown in the example below: 18/929,602 12,131,066 1. (Currently amended) A system comprising: a memory device configured with a zoned namespace having a plurality of zones, wherein each zone is associated with a respective zone identifier; and a processing device, operatively coupled with the memory device, to perform operations comprising: storing, in a first queue of the memory device, a first identifier of a first memory access operation to be performed at a first zone of the memory device, wherein the first queue further stores one or more identifiers of memory access operations to be performed at one or more other zones of the memory device that are different from the first zone; identifying one of a plurality of plane sets of the memory device that is associated with the first zone of the memory device; identifying, using a zone-to-plane set mapping data structure, a second queue of the memory device, wherein the second queue corresponds to the identified plane set; responsive to determining that a number of identifiers of memory access operations stored in the second queue satisfies a threshold criterion, retrieving, from the second queue, a second identifier of a second memory access operation to be performed at a second zone of the memory device; storing the second identifier of the second memory access operation in a third queue of the memory device, wherein the third queue corresponds to a second plane set of the memory device; and performing the second memory access operation at the second zone associated with the second plane set of the memory device. 1. A system comprising: a memory device configured with a zoned namespace having a plurality of zones, wherein each zone is associated with a respective zone identifier; and a processing device, operatively coupled with the memory device, to perform operations comprising: storing a first identifier of a first memory access operation in a first queue of the memory device, wherein the first queue comprises one or more entries, wherein each entry stores an identifier of a memory access operation, and wherein the first memory access operation is to be performed at a first zone of the memory device; identifying, among a plurality of plane sets of the memory device, a plane set that is associated, by a memory data structure, with the first zone of the memory device; identifying a second queue of the memory device, wherein the second queue corresponds to the identified plane set, wherein the second queue comprises one or more entries, wherein each entry stores an identifier of a memory access operation to be performed at the first zone of the memory device; responsive to determining that a number of identifiers of memory access operations stored in the second queue is greater than a threshold number of identifiers of memory access operations that can be stored in the second queue, retrieving a second identifier of a second memory access operation from the first queue, wherein the second memory access operation is to be performed at a second zone of the memory device; storing the second identifier of the second memory access operation in a third queue of the memory device, wherein the third queue corresponds to a second plane set of the memory device, wherein the second plane set is associated with the second zone of the memory device; and performing the second memory access operation at the second zone of the memory device. Allowable Subject Matter 6. Claims 1-20 are rejected under double patenting rejections with respect to U.S. Patent 12,131,066, but would be allowable if able to overcome the double patenting rejections. Conclusion 7. Claims 1-20 are rejected as explained above. Claims 1-20 are rejected under double patenting rejections with respect to U.S. Patent 12,131,066, but would be allowable if able to overcome the double patenting rejections. 8. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG JEN TSAI whose telephone number is 571-272-4244. The examiner can normally be reached on Monday-Friday, 9-6. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on 571-272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /SHENG JEN TSAI/Primary Examiner, Art Unit 2139
Read full office action

Prosecution Timeline

Oct 28, 2024
Application Filed
Jan 16, 2026
Non-Final Rejection mailed — §DOUBLEPATENT, §DP
Mar 23, 2026
Interview Requested
Apr 01, 2026
Applicant Interview (Telephonic)
Apr 01, 2026
Examiner Interview Summary
Apr 16, 2026
Response Filed
Apr 29, 2026
Final Rejection mailed — §DOUBLEPATENT, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
70%
Grant Probability
84%
With Interview (+13.3%)
3y 4m (~1y 9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 792 resolved cases by this examiner. Grant probability derived from career allowance rate.

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