Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings filed on 10/29/2024 are accepted by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-6 and 11-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “Switching-Cycle-Based Startup for Grid-tied Inverters” to He et al. (hereinafter “He1”).
As for claim 1, He1 discloses a method for starting inverter-based resources (IBRs) and synchronizing them with a grid (He1, see page 1), the method comprising:
regulating a current of an inverter to zero via a switching-cycle-based direct current (DC) feedback loop with an input current of zero (He1, see pages 3-4 for “The inverter is steered from the startup phase until the zero current control, eventually escalating to the rated current. Evidently, the inverter's start-up process is remarkably swift with negligible transient currents. The "spikes" in the current, 𝑖𝑖𝑎𝑎 and 𝑖𝑖𝑏𝑏 , are deliberately produced by two switching commands, which facilitate the determination of the phase angle. Subsequently, the phase angle obtained from the start-up phase is applied to the succeeding conventional current control (②+③), in which the current reference is established at zero initially”);
generating an estimate of a grid phase angle of the grid using samples of the current of the inverter, a DC voltage of the inverter, and an inverter switching function (He1, see page 2 for obtaining the phase angle based on equations 1-5);
determining an initial voltage phase angle of the inverter based on the estimated grid phase angle of the grid (He1, see page 3); and
switching to a regular control strategy using the initial voltage phase angle of the inverter (He1, see page 4).
Claim 11 is a system claim corresponds to the method claim 1, it is therefore rejected under similar reasons set forth in the rejections of claim 1. He1 further discloses a processor and a machine-readable medium in operable communication with the processor and an inverter and having instructions stored thereon that, when executed by the processor, perform steps (He1, see page 3).
As per claim 2, the rejection of claim 1 is incorporated, He1 further discloses the IBRs are synchronized with the grid in less than 100 milliseconds (He1, see Fig. 3 on page 4).
Claim 12 is a system claim corresponds to the method claim 2, it is therefore rejected under similar reasons set forth in the rejections of claim 2.
As per claim 3, the rejection of claim 1 is incorporated, He1 further discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 10 milliamps (mA) (He1, see page 3 for zero inrush current of the grid during the synchronizing of the IBRs with the grid).
Claim 13 is a system claim corresponds to the method claim 3, it is therefore rejected under similar reasons set forth in the rejections of claim 3.
As per claim 4, the rejection of claim 3 is incorporated, He1 further discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 0.1 mA (He1, see page 3 for zero inrush current of the grid during the synchronizing of the IBRs with the grid).
Claim 14 is a system claim corresponds to the method claim 4, it is therefore rejected under similar reasons set forth in the rejections of claim 4.
As per claim 5, the rejection of claim 1 is incorporated, He1 further discloses wherein the inverter switching function is generated using Equation 1 as follows:
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72
674
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Greyscale
where Sabc is the inverter switching function, VDC is the DC voltage of the inverter, Lf is a filter, Lg represents a grid inductance, and vg is a voltage of the grid (He1, see page 2, it is noted that Sx can be interpreted as Sabc as claimed).
Claim 15 is a system claim corresponds to the method claim 5, it is therefore rejected under similar reasons set forth in the rejections of claim 5.
As per claim 6, the rejection of claim 2 is incorporated, He1 further discloses wherein the initial voltage phase angle of the inverter is determined using Equation 2 as follows:
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142
786
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where θa is the initial voltage phase angle of the inverter, VDC is the DC voltage of the inverter, Ka and Kb are coefficients derived from the current difference from both phase A and phase B over a switching cycle, and Vg is a magnitude of a voltage of the grid (He1, see pages 2-3).
Claim 16 is a system claim corresponds to the method claim 6, it is therefore rejected under similar reasons set forth in the rejections of claim 6.
Claim(s) 1, 3-4, 7-8, 11, 13-14 and 17-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by “An Ultra-Fast Inrush-Current-Free Startup Method for Grid-tie Inverter without Voltage Sensors” to He et al. (hereinafter “He2”).
He2 discloses a method for starting inverter-based resources (IBRs) and synchronizing them with a grid (He2, see page 2874), the method comprising:
regulating a current of an inverter to zero via a switching-cycle-based direct current (DC) feedback loop with an input current of zero (He2, see page 1);
generating an estimate of a grid phase angle of the grid using samples of the current of the inverter, a DC voltage of the inverter, and an inverter switching function (He2, see pages 2876-2877);
determining an initial voltage phase angle of the inverter based on the estimated grid phase angle of the grid (He2, see page 2874 and page 2879); and
switching to a regular control strategy using the initial voltage phase angle of the inverter (He2, see page 2874 and page 2879).
Claim 11 is a system claim corresponds to the method claim 1, it is therefore rejected under similar reasons set forth in the rejections of claim 1.
As per claim 3, the rejection of claim 1 is incorporated, He2 further discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 10 milliamps (mA) (He2, see page 2879 for zero inrush current).
Claim 13 is a system claim corresponds to the method claim 3, it is therefore rejected under similar reasons set forth in the rejections of claim 3.
As per claim 4, the rejection of claim 3 is incorporated, He1 further discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 0.1 mA (He2, see page 2879 for zero inrush current).
Claim 14 is a system claim corresponds to the method claim 4, it is therefore rejected under similar reasons set forth in the rejections of claim 4.
As per claim 7, the rejection of claim 1 is incorporated, He2 further discloses wherein the regulating of the current of the inverter comprises sampling the current of the inverter at each switching cycle and comparing the sampled inverter current with a reference value (He2, see page 2877 for hysteresis current control).
Claim 17 is a system claim corresponds to the method claim 7, it is therefore rejected under similar reasons set forth in the rejections of claim 7.
As per claim 8, the rejection of claim 7 is incorporated, He 2 further discloses wherein, at each switching cycle, either a first device of the inverter or a second device of the inverter is switched, depending on whether the sampled inverter current is higher or lower than the reference value (He2, see page 2877 for hysteresis current control).
Claim 18 is a system claim corresponds to the method claim 8, it is therefore rejected under similar reasons set forth in the rejections of claim 8.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 7-8 and 17-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over He1, in view of He2.
As per claim 7, the rejection of claim 1 is incorporated, He1 does not explicitly disclose wherein the regulating of the current of the inverter comprises sampling the current of the inverter at each switching cycle and comparing the sampled inverter current with a reference value. However, He2 in an analogous art discloses wherein the regulating of the current of the inverter comprises sampling the current of the inverter at each switching cycle and comparing the sampled inverter current with a reference value (He2, see page 2877 for hysteresis current control).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of He2 into the method of He1. The modification would be obvious because one of the ordinary skill in the art would want to achieve predictable results of fast dynamic response by using the hysteresis current control.
Claim 17 is a system claim corresponds to the method claim 7, it is therefore rejected under similar reasons set forth in the rejections of claim 7.
As per claim 8, the rejection of claim 7 is incorporated, He2 further discloses wherein, at each switching cycle, either a first device of the inverter or a second device of the inverter is switched, depending on whether the sampled inverter current is higher or lower than the reference value (He2, see page 2877 for hysteresis current control).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of He2 into the method of He1. The modification would be obvious because one of the ordinary skill in the art would want to achieve predictable results of fast dynamic response by using the hysteresis current control.
Claim 18 is a system claim corresponds to the method claim 8, it is therefore rejected under similar reasons set forth in the rejections of claim 8.
Claim(s) 9-10 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over He1, in view of US20220294225 to Shijo et al. (hereinafter “Shijo”).
As per claim 9, the rejection of claim 1 is incorporated, He1 does not explicitly disclose the IBRs comprise a battery. However, Shijo in an analogous art discloses the IBRs comprise a battery (Shijo, see Fig. 1 and [0015]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Shijo into the method of He1. The modification would be obvious because one of the ordinary skill in the art would want to provide safety in maintenance during power outage or occurrence of a system accident (Shijo, see [0052]).
Claim 19 is a system claim corresponds to the method claim 9, it is therefore rejected under similar reasons set forth in the rejections of claim 9.
As per claim 10, the rejection of claim 1 is incorporated, He2 does not explicitly disclose the grid is connected with a micro grid. Shijo in an analogous art discloses the grid is connected with a micro grid (Shijo, see Fig. 1 and [0016]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Shijo into the method of He1. The modification would be obvious because one of the ordinary skill in the art would want to provide safety in maintenance during power outage or occurrence of a system accident (Shijo, see [0052]).
Claim 20 is a system claim corresponds to the method claim 10, it is therefore rejected under similar reasons set forth in the rejections of claim 10.
Claim(s) 1, 7-11 and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US20040120172 to Heikkila et al. (hereinafter “Heikkila”), in view of “Sensorless Synchronization Method For a Grid-Side Converter With an LCL Filter Based On a Sliding Mode Observer and Discontinuous Operating Mode” to Jukic et al. (hereinafter “Jukic”), further in view of “Switching Pattern Improvement for One-Cycle Zero-Integral-Error Current Controller” to Orts-Grau et al. (hereinafter “Orts”).
As per claim 1, Heikkila substantially discloses a method for starting inverter-based resources (IBRs) and synchronizing them with a grid (Heikkila, see [0007]-[0010] and [0014]-[0015]), the method comprising:
regulating a current of an inverter to zero via a feedback loop with an input current of zero (Heikkila, see [0007] and [0010]);
generating an estimate of a grid phase angle of the grid using samples of the current of the inverter, a DC voltage of the inverter, and an inverter switching function (Heikkila, see [0043]-[0046]);
Heikkila does not explicitly disclose a switching-cycle-based direct current (DC) feedback loop, determining an initial voltage phase angle of the inverter based on the estimated grid phase angle of the grid; and switching to a regular control strategy using the initial voltage phase angle of the inverter. However, Jukic in an analogous art discloses determining an initial voltage phase angle of the inverter based on the estimated grid phase angle of the grid (Jukic, see pages 1302-1303); and switching to a regular control strategy using the initial voltage phase angle of the inverter (Jukic, see page 1303).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Jukic into the method of Heikkila. The modification would be obvious because one of the ordinary skill in the art would want to provide a sensor-less method for synchronizing the GSC with an LCL filter (Jukic, see page 1305).
The combination of Heikkila and Jukic does not explicitly disclose a switching-cycle-based direct current (DC) feedback loop. However, Orts in an analogous art discloses a switching-cycle-based direct current (DC) feedback loop (Orts, see pages 159-160).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Orts into the combination of Heikkila and Jukic. The modification would be obvious because one of the ordinary skill in the art would want to improve the power quality and energy efficiency of electrical systems (Orts, see page 158).
As per claim 7, the rejection of claim 1 is incorporated, Orts further discloses the regulating of the current of the inverter comprises sampling the current of the inverter at each switching cycle and comparing the sampled inverter current with a reference value (Orts, see pages 159-160).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Orts into the combination of Heikkila and Jukic. The modification would be obvious because one of the ordinary skill in the art would want to improve the power quality and energy efficiency of electrical systems (Orts, see page 158).
As per claim 8, the rejection of claim 7 is incorporated, Orts further discloses wherein, at each switching cycle, either a first device of the inverter or a second device of the inverter is switched, depending on whether the sampled inverter current is higher or lower than the reference value (Orts, see pages 158-160).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Orts into the combination of Heikkila and Jukic. The modification would be obvious because one of the ordinary skill in the art would want to improve the power quality and energy efficiency of electrical systems (Orts, see page 158).
As per claim 9, the rejection of claim 1 is incorporated, Jukic further discloses the IBRs comprise a solar panel, a wind turbine, a fuel cell, and/or a battery (Jukic, see page 1300).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Jukic into the method of Heikkila. The modification would be obvious because one of the ordinary skill in the art would want to provide a sensor-less method for synchronizing the GSC with an LCL filter (Jukic, see page 1305).
As per claim 10, the rejection of claim 1 is incorporated, Jukic further discloses the grid is connected with a power plant, a microgrid, and/or a distributed generation grid (Jukic, see page 1300).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Jukic into the method of Heikkila. The modification would be obvious because one of the ordinary skill in the art would want to provide a sensor-less method for synchronizing the GSC with an LCL filter (Jukic, see page 1305).
Claims 11 and 17-20 are system claims correspond to the method claims 1 and 7-10, respectively, they are therefore rejected under similar reasons set forth in the rejections of claims 1 and 7-10. Jukic further discloses a processor and a machine-readable medium in operable communication with the processor and an inverter and having instructions stored thereon that, when executed by the processor, perform steps (Jukic, see page 1302).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Jukic into the method of Heikkila. The modification would be obvious because one of the ordinary skill in the art would want to provide a sensor-less method for synchronizing the GSC with an LCL filter (Jukic, see page 1305).
Claim(s) 2-4 and 12-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Heikkila, in view of Jukic, in view of Orts, further in view of “A PLL-Less Voltage Sensorless Direct Deadbeat Control for a SiC Grid-Tied Inverter With LVRT Capability Under Wide-Range Grid Impedance” to Dong et al. (hereinafter “Dong”).
As per claim 2, the rejection of claim 1 is incorporated, the combination of Heikkila, Jukic and Orts does not explicitly disclose the IBRs are synchronized with the grid in less than 100 milliseconds (ms). However, Dong in an analogous art discloses the IBRs are synchronized with the grid in less than 100 milliseconds (ms) (Dong, see page 9480 for the start-up process can be completed and enter the steady state within 1 ms).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Dong into the combination of Heikkila, Jukic and Orts. The modification would be obvious because one of the ordinary skill in the art would want to improve the stability of grid-tied inverters (Dong, see page 9469).
As per claim 3, the rejection of claim 1 is incorporated, the combination of Heikkila, Jukic and Orts does not explicitly disclose wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 10 milliamps (mA). However, Dong in an analogous art discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 10 milliamps (mA) (Dong, see page 9480 for inrush current-free feature (i.e. zero inrush current)).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Dong into the combination of Heikkila, Jukic and Orts. The modification would be obvious because one of the ordinary skill in the art would want to improve the stability of grid-tied inverters (Dong, see page 9469).
As per claim 4, the rejection of claim 3 is incorporated, Dong further discloses wherein an inrush current of the grid during the synchronizing of the IBRs with the grid is less than 0.1 mA (Dong, see page 9480 for inrush current-free feature (i.e. zero inrush current)).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to incorporate teaching of Dong into the combination of Heikkila, Jukic and Orts. The modification would be obvious because one of the ordinary skill in the art would want to improve the stability of grid-tied inverters (Dong, see page 9469).
Claims 12-14 are system claims correspond to the method claims 2-4, respectively, they are therefore rejected under similar reasons set forth in the rejections of claims 2-4.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure.
US20120081061 discloses power conversion systems with active front end converters for example motor drives and power generation systems for distributed energy sources are presented with adaptive harmonic minimization for grid-tie converters for minimized or reduced total harmonic distortion in the line current spectrum including the source harmonic current and the grid-tie converter injected current spectrum referred to the line side.
US20240297570 discloses a single-stage partial power inverter for transforming a DC signal into an AC signal comprising: a galvanically isolated DC-DC converter in a partial power configuration, having a voltage input and a voltage output; an inverter bridge connected to said voltage output of the DC-DC converter in a partial power configuration; a control loop configured to control a switching cycle of the DC-DC converter; wherein said control loop is configured to control said switching cycle of the DC-DC converter so that the voltage signal at said voltage output has a rectified AC waveform, said rectified AC waveform having a frequency that is twice a fundamental frequency of said AC signal; and wherein said inverter bridge is operated at a switching frequency that is twice the fundamental frequency of said AC signal.
US8350517 discloses a method for connection or application of a converter to a rotating asynchronous machine which is operated without an encoder, without a high current and without a torque surge. The method provides a control unit, using an inverter or converter, for feeding the asynchronous machine which rotates at a mechanical rotary speed. The asynchronous machine is regulated by the control unit. A stator current vector is ascertained from measured currents of the stator windings of the asynchronous machine and a rotating stator voltage vector. Calculation is effected in respect of a stator flux change vector from the stator current vector, the stator voltage vector and a stator resistance in accordance with a motor model. An angle difference between the stator current vector and the stator flux change vector is calculated. That angle difference is regulated to a reference value of 90.degree. or -90.degree., wherein an output signal of the regulator corresponds to a rotary field frequency, to be impressed, of the voltage vector of the stator. Regulation is effected in respect of an amplitude of the stator voltage vector by way of a current regulator to which the difference of a current reference value and a parameter corresponding to the amplitude of the stator current is made available at the input as a regulating difference.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON LIN whose telephone number is (571)270-3175. The examiner can normally be reached on Monday-Friday 9:30 a.m. – 6:00 p.m. PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert E. Fennema can be reached on (571)272-2748. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON LIN/
Primary Examiner, Art Unit 2117
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