DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the vertically folded stepped impedance resonator (2) is located in a middle of the dielectric substrate” recited in Claim 1 must be shown or the feature(s) canceled from the claim(s). The current drawings show it located on the surfaces of the dielectric substrate. See also Specification at ¶¶7-12, 24-27 (describing same). No new matter should be entered.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because Fig. 2 does not include the following reference sign mentioned in the description: metal grounds 3 (¶25). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-7 objected to because of the following informalities:
Claims 1-7 recite “a low cost,” which is a relative term unrelated to the structure or functionality of the claimed devices. The examiner suggests deleting the term to improve clarity.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor, or a joint inventor, regards as the invention.
Claim 1, lines 3-4, recites “wherein the vertically folded stepped impedance resonator (2) is located in a middle of the dielectric substrate.”
Claim 1, lines 9-10, recites “the low impedance line (6) is disposed on an upper surface of the dielectric substrate (8), the high impedance line (7) is disposed on the lower surface of the dielectric substrate (8).”
It is unclear how can the vertically folded stepped impedance resonator be located in the middle of the dielectric substrate whereas at least some of its parts are disposed on the upper and lower surfaces of the dielectric substrate, which is how it is shown and described in the drawings and the specification.
For examination purposes, these terms will be understood to mean “wherein the vertically folded stepped impedance resonator (2) is located in
Claim 1, lines 11-12, recites “the small-size vertically folded stepped impedance resonator (2).” There is insufficient antecedent basis for this limitation.
For examination purposes, this limitation will be understood to mean “the vertically folded stepped impedance resonator (2),” recited earlier in the claim.
Claim 4 recites “two pairs of formed hybrid couplers.” There is insufficient antecedent basis for this limitation. It is unclear which part(s) form each pair of “formed hybrid couplers” and where exactly.
Claim 7 recites “the two passband paths” and “the two passbands.” There is insufficient antecedent basis for each of these limitations.
For examination purposes, these limitations will be understood to mean “a passband path for each pair of vertically folded stepped impedance resonators (2) of the quarter wavelength.”
Claims 2-7 are also rejected under 35 U.S.C. 112(b) as dependent on rejected claim(s).
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Y. Rao et al., Miniaturized 28-GHz Packaged Bandpass Filter With High Selectivity and Wide Stopband Using Multilayer PCB Technology, IEEE Microwave Wireless Components Letters, June 2022 (“Rao”).
Rao discloses in Figs.1-8 and the corresponding description:
Claim 1 (as best understood)
A miniaturized microstrip filter (Figs. 1a-d, 6a-f, Abstract, Bandpass Filter, pp. 664-667) with a low insertion loss, a low cost, and multiple zeros, comprising a dielectric substrate (8) (p. 664, Panasonic Megtron 7 substrate) and a vertically folded stepped impedance resonator (2) (Fig. 6); wherein the vertically folded stepped impedance resonator (2) is located in a middle of the dielectric substrate (8), and coplanar waveguide transmission ports (1) (Fig. 1a and 6f, Port 1 and Port 2) connected to the vertically folded stepped impedance resonator (2) (Fig. 6a-f, Res 1 or Res 2) are disposed on both two sides of a lower surface of the dielectric substrate (8) (Fig. 1a-b); and
the vertically folded stepped impedance resonator (2) comprises a folded low impedance line (6) and a high impedance line (7) (Fig. 1c-d, annotated; narrower lines have higher impedance than wider lines), the low impedance line (6) is disposed on an upper surface (L2 or L3) of the dielectric substrate (8), the high impedance line (7) is disposed on the lower surface (L1 of the dielectric substrate (8), the two are connected through a metalized via hole (4) (Fig. 1a-b annotated), to form the small-size vertically folded stepped impedance resonator (2) and a position with a strongest electric field distribution and a position with a strongest magnetic field distribution in the vertically folded stepped impedance resonator (2) are isolated in different layers by the low impedance line (6) and the high impedance line (7) to realize independent controls of an electric coupling and a magnetic coupling (pp. 664-666).
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Claim 2 (as best understood)
wherein metal grounds (3) (G1, G2, perimeter ground planes of L1, L2, L3) are disposed on two sides of the upper surface and on the lower surface of the dielectric substrate (8), and each of the metal grounds (3) on the two sides of the upper surface is provided with a row of metalized via holes (4) to surround the vertically folded stepped impedance resonator (2), and is connected to the metal ground (3) on the lower surface through the metalized via holes (4) (Figs. 1a-d annotated).
Allowable Subject Matter
Claims 3-7 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) set forth in this Office action and to include all of the limitations of the base claim(s) and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
U.S. Patent Application Publication No. 2004/0085164 A1, published May 6, 2004 (“Hirabayashi”) discloses a miniaturized microstrip filter including a dielectric substrate, coplanar waveguide transmission ports, connected to the vertically folded stepped impedance resonator including a folded low impedance line, a high impedance line, and metal ground planes connected by vias (Figs. 5-6).
U.S. Patent Application Publication No. 2010/0201460 A1, published Aug. 12, 2012 (“Tamura”) discloses a dielectric resonator including high-impedance [narrow] wiring, low-impedance [wider] wiring connected by vias, ground planes (Figs. 3, 7, 8).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR COLE, telephone number (571) 272-4686. The examiner can be reached Monday-Friday, 9AM-5PM ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ANDREA LINDGREN BALTZELL, can be reached at (571) 272-5918. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/VICTOR COLE/
Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843