Prosecution Insights
Last updated: July 17, 2026
Application No. 18/931,330

METHODS AND SYSTEMS FOR IMPROVING TERABYTES WRITTEN (TBW) OF A NAND BASED STORAGE DEVICE

Final Rejection §103
Filed
Oct 30, 2024
Priority
Sep 04, 2024 — IN 202441066836
Examiner
SAIN, GAUTAM
Art Unit
2135
Tech Center
2100 — Computer Architecture & Software
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
1y 7m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
285 granted / 425 resolved
+12.1% vs TC avg
Strong +24% interview lift
Without
With
+23.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
24 currently pending
Career history
464
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
93.7%
+53.7% vs TC avg
§102
0.6%
-39.4% vs TC avg
§112
3.9%
-36.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 425 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Allowable Subject Matter Claims 4, 9, 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. REASONS FOR ALLOWANCE The following is an examiner’s statement of reasons for indicating allowability: For Claim 4, the prior art discloses and/or renders obvious the limitations from base Claim 1. The prior art does not appear to disclose the limitations from Claim 4. For Claim 9, the prior art discloses and/or renders obvious the limitations from base Claim 6. The prior art does not appear to disclose the limitations from Claim 9. For Claim 17, the prior art discloses and/or renders obvious the limitations from base Claim 11. The prior art does not appear to disclose the limitations from Claim 11. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Response to Arguments Applicant's arguments filed 3/5/2026 have been fully considered but they are not persuasive. For claims 1, 6 and 11, Applicant argues that that the cited references do not disclose the limitations. The Office disagrees. In the present OA, the combination of references render the amended limitations as obvious. Specifically, Applicant argues that the cited references do not disclose monitoring, by the block reallocating system, a Greatest Erase Count (GEC) of each of a plurality of independent block pools in a NAND based storage device at intervals; determining, by the block reallocating system, a candidate independent block pool among the plurality of independent block pools having a rate of increase of Erase Count (EC) higher than a rate of increase of EC of remaining ones of the plurality of independent block pools, based on the GEC of each of the plurality of independent block pools The Office disagrees. For the limitations related to rate of increase of Erase Count, Gorobets discloses [0043] The parameters 55 includes a quantity related to the number of program/erase cycles experienced by the block, this quantity being updated after each cycle or some number of cycles. When this experience quantity is used in a wear leveling algorithm, logical block addresses are regularly re-mapped to different physical block addresses in order to even out the usage (wear) of all the blocks… number of cycles experienced by different blocks. [0077] when some form of block experience counts are available, the block within the erase pool having the highest experience count may be identified. 0079 - if block experience counts are available, the counts of the blocks are monitored and a wear leveling exchange initiated when the next block made available in the erase pool to receive data has an experience count that is higher than other blocks, such as higher than an average experience count of all or substantially all other blocks in the system. Gorbets provides the benefit that It may be desirable that wear leveling exchanges do not take place during the early life of the memory system, when there is little need for such leveling. If a total count of the number of blocks erased and reprogrammed during the life of the memory is available, a wear leveling exchange can be initiated with a frequency that increases as the total usage of the memory system increases (0080). For the limitations related to Greatest Erase Count of each block pool, Yang discloses 0049 - victim block into a block having the highest erase count. 0025 - relatively high erase counts. Providing the benefit of performance and lifespan of the memory system 110 may be improved further (0050). In combination, Gorbets discloses [0015] In order to keep track of the number of cycles experienced by the memory cells of the individual blocks, a count can be kept for each block, or for each of a group of blocks. use for mapping a block out of the system when it reaches a maximum lifetime cycle count, the count can be earlier used to control erase and programming parameters as the memory cell blocks age. 0090 - experience counts or some other parameter are utilized to make the block selection from a group of blocks being considered. Providing the benefit of experience counts or indications of the usage of individual blocks or groups of blocks may be employed in conjunction with the foregoing to enhance the wear leveling process (0021). For Claims 6 and 11, Applicant’s arguments are based on similarity with Claim 1, which is addressed above. Applicant’s arguments for dependent claims are based on their respective base independent claims 1, 6 and/or 11, which are addressed above. New claims 12-18 are rejected below. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, 6, 10, 12, 13 are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 20240168649 A1) and in view of Gorobets (US 20060106972 A1) and further in view of Yang (US 20210216446 A1) Claim 1. Liu discloses A method of improving Terabytes Written (TBW) of a NAND based storage device including a block reallocating system (eg., 0045 - increasing terabytes written ; [0062] Determining whether to reallocate virtual blocks ), the method comprising: Liu does not disclose, but Gorobets discloses monitoring, by the block reallocating system, a Greatest Erase Count (GEC) of each of a plurality of independent block pools in a NAND based storage device at intervals (eg., 0021 - block experience counts maintained by the memory system controller to identify physical blocks with a low number of experience counts as those storing data of logical blocks having low counts; [0067] A system capable of maintaining individual block physical and/or logical experience counts is illustrated in FIGS. 11-13.; 0096 - When experience counts are maintained for the individual blocks or groups of blocks); determining, by the block reallocating system, a candidate independent block pool among the plurality of independent block pools having a rate of increase of Erase Count (EC) higher than a rate of increase of EC of remaining ones of the plurality of independent block pools, based on the GEC of each of the plurality of independent block pools (eg., 0021 - logical blocks with high counts provide an indication of likely continued heavy cycling of its data; 0076 - erase pool block(s) with the highest count are selected; 0107 - If block experience counts are maintained, whenever the next block in order for use from the erase pool according to a predetermined sequence has an experience count that is more than an average experience count of all the blocks in the memory system, plane or sub-system)(further, Gorobets discloses [0043] The parameters 55 includes a quantity related to the number of program/erase cycles experienced by the block, this quantity being updated after each cycle or some number of cycles. When this experience quantity is used in a wear leveling algorithm, logical block addresses are regularly re-mapped to different physical block addresses in order to even out the usage (wear) of all the blocks… number of cycles experienced by different blocks. [0077] when some form of block experience counts are available, the block within the erase pool having the highest experience count may be identified. 0079 - if block experience counts are available, the counts of the blocks are monitored and a wear leveling exchange initiated when the next block made available in the erase pool to receive data has an experience count that is higher than other blocks, such as higher than an average experience count of all or substantially all other blocks in the system. Gorbets provides the benefit that It may be desirable that wear leveling exchanges do not take place during the early life of the memory system, when there is little need for such leveling. If a total count of the number of blocks erased and reprogrammed during the life of the memory is available, a wear leveling exchange can be initiated with a frequency that increases as the total usage of the memory system increases (0080)); determining, by the block reallocating system, whether the GEC of the candidate independent block pool and the GEC of at least one independent block pool among the remaining ones of the plurality of independent block pools; and (eg., [0076] use of block experience counts that enhances the process … the counts of the blocks in the erase pool may be used to select the one or more destination blocks to take part in the exchange.) meet a reallocation condition; reallocating, by the block reallocating system, one or more free blocks from the at least one independent block pool to the candidate independent block pool in response to the candidate independent block pool and the at least one independent block pool meeting the reallocation condition (eg., 0019 - Physical blocks that experience low usage are by this technique reallocated into the erased block pool where they are subjected to additional usage; 0021 - within a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts to be exchanged). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Liu in view of Gorobets does not disclose, but Yang discloses a Greatest Erase Count (GEC) (eg., [0043] Referring to FIG. 2, in step S202, determine candidate blocks for a victim block based on the erase counts of the memory blocks in the memory device 150.); It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, providing the benefit of a controller capable of performing a wear leveling operation efficiently (see Yang, 0005) a controller, coupled to the plurality of memory blocks, suitable for: determining candidate blocks, among the plurality of memory blocks, based on an erase count of each memory block; selecting a victim block among the candidate blocks, based on a hot page count of each candidate block; and moving data of the victim block into a destination block (0008). Claim 5. Liu does not disclose, but Gorobets discloses wherein the GEC of a respective one of the plurality of independent block pools is a highest value among ECs of a plurality of blocks included in the respective one of the plurality of independent block pools (eg., 0021; 0104 - If block experience counts are maintained, the block in the erase pool having the highest experience count is selected). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Claim 12. Liu does not disclose, but Gorobets discloses wherein reallocating the one or more free blocks from the at least one independent block pool to the candidate independent block pool includes selecting one of the remaining ones of the plurality of independent block pools having a lowest GEC for the reallocation when two or more of the remaining ones of the plurality of independent block pools meet the reallocation condition (eg., 0021 - a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts; 0073 - experience counts of each group of blocks are read and one or more of the blocks with the lowest counts of the group are selected for the exchange). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Claim 6. Liu discloses A block reallocating system for improving Terabytes Written (TBW) of a NAND based storage device, the block reallocating (eg., 0045 - increasing terabytes written ; [0062] Determining whether to reallocate virtual blocks ), system comprising: a processor (eg., 0024 - memory controller 106 may manage data stored in the memory devices 104); and a memory communicatively coupled to the processor and configured to store instructions, wherein, upon execution of the instructions, the processor is configured to: (eg., 0023 Fig. 1 - memory system 102 having one or more memory devices 104) Liu does not disclose, but Gorobets discloses monitor of each of a plurality of independent block pools in a NAND based storage device at intervals (eg., 0021 - block experience counts maintained by the memory system controller to identify physical blocks with a low number of experience counts as those storing data of logical blocks having low counts; [0067] A system capable of maintaining individual block physical and/or logical experience counts is illustrated in FIGS. 11-13.; 0096 - When experience counts are maintained for the individual blocks or groups of blocks); determine a candidate independent block pool among the plurality of independent block pools having a rate of increase of Erase Count (EC) higher than a rate of increase of EC of remaining ones of the plurality of independent block pools, based on the GEC of each of the plurality of independent block pools (eg., 0021 - logical blocks with high counts provide an indication of likely continued heavy cycling of its data; 0076 - erase pool block(s) with the highest count are selected; 0107 - If block experience counts are maintained, whenever the next block in order for use from the erase pool according to a predetermined sequence has an experience count that is more than an average experience count of all the blocks in the memory system, plane or sub-system) (further, Gorobets discloses [0043] The parameters 55 includes a quantity related to the number of program/erase cycles experienced by the block, this quantity being updated after each cycle or some number of cycles. When this experience quantity is used in a wear leveling algorithm, logical block addresses are regularly re-mapped to different physical block addresses in order to even out the usage (wear) of all the blocks… number of cycles experienced by different blocks. [0077] when some form of block experience counts are available, the block within the erase pool having the highest experience count may be identified. 0079 - if block experience counts are available, the counts of the blocks are monitored and a wear leveling exchange initiated when the next block made available in the erase pool to receive data has an experience count that is higher than other blocks, such as higher than an average experience count of all or substantially all other blocks in the system. Gorbets provides the benefit that It may be desirable that wear leveling exchanges do not take place during the early life of the memory system, when there is little need for such leveling. If a total count of the number of blocks erased and reprogrammed during the life of the memory is available, a wear leveling exchange can be initiated with a frequency that increases as the total usage of the memory system increases (0080)); determine whether the GEC of the candidate independent block pool and the GEC of at least one independent block pool among the remaining ones of the plurality of independent block pools; and (eg., [0076] use of block experience counts that enhances the process … the counts of the blocks in the erase pool may be used to select the one or more destination blocks to take part in the exchange.) meet a reallocation condition; reallocate one or more free blocks from the at least one independent block pool to the candidate independent block pool when the candidate independent block pool and the at least one independent block pool meet the reallocation condition (eg., 0019 - Physical blocks that experience low usage are by this technique reallocated into the erased block pool where they are subjected to additional usage; 0021 - within a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts to be exchanged). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Liu in view of Gorobets does not disclose, but Yang discloses a Greatest Erase Count (GEC) (eg., [0043] Referring to FIG. 2, in step S202, determine candidate blocks for a victim block based on the erase counts of the memory blocks in the memory device 150.); It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, providing the benefit of a controller capable of performing a wear leveling operation efficiently (see Yang, 0005) a controller, coupled to the plurality of memory blocks, suitable for: determining candidate blocks, among the plurality of memory blocks, based on an erase count of each memory block; selecting a victim block among the candidate blocks, based on a hot page count of each candidate block; and moving data of the victim block into a destination block (0008). Claim 10 is rejected for reasons similar to Claim 5 above. Claim 13. Liu does not disclose, but Gorobets discloses wherein reallocating the one or more free blocks from the at least one independent block pool to the candidate independent block pool includes selecting one of the remaining ones of the plurality of independent block pools having a lowest GEC for the reallocation when two or more of the remaining ones of the plurality of independent block pools meet the reallocation condition (eg., 0021 - a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts; 0073 - experience counts of each group of blocks are read and one or more of the blocks with the lowest counts of the group are selected for the exchange). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Claims 2, 3, 7, 8, 11, 14, 15, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 20240168649 A1) and in view of Gorobets (US 20060106972 A1) and further in view of Yang (US 20210216446 A1) and Kao (US 20100100663) Claim 2. Liu in view of Gorobets and Yang does not disclose, but Kao discloses wherein determining whether the GEC of the candidate independent block pool and the GEC of the at least one independent block pool meet the reallocation condition comprises: determining whether the GEC of the candidate independent block pool is greater than or equal to a first threshold percentage of a total MAX_EC pre-configured for the candidate independent block pool (eg., 0018 - The erase count threshold ECTh may also be increased, for example, to EDR/2+EDR/4. Frequency or strength of the wear leveling operation performed by the wear leveling mechanism may be increased so as to keep the difference Delta within the first wear leveling limit WLDelta.sub.1. The first wear leveling limit WLDelta.sub.1 may be maintained until the highest erase/write count ECMax reaches the erase count threshold ECTh of EDR/2+EDR/4); and determining whether the GEC of the at least one independent block pool is less than a second threshold percentage of a total MAX_EC pre-configured for the at least one independent block pool, wherein the second threshold percentage is less than the first threshold percentage (eg., 0017 - While the highest erase/write count ECMax is less than a erase count threshold ECTh, which may be equal to half the predetermined maximum erase/write count EDR (expressed as EDR/2). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, with Kao providing the benefit of performing wear leveling that employs a variable threshold (see Kao 0002). Claim 3. Liu does not disclose, but Gorobets discloses wherein the one or more free blocks are reallocated to the candidate independent block pool from the at least one independent block pool having the GEC that is less than the second threshold percentage (eg., 0021 - within a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts to be exchanged… identify physical blocks with a low number of experience counts as those storing data of logical blocks having low counts). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Claim 7 is rejected for reasons similar to Claim 2 above. Claim 8 is rejected for reasons similar to Claim 3 above. Claim 14. Liu in view of Gorobets and Yang does not disclose, but Kao discloses wherein the intervals are set based on when the GEC of one or more of the plurality of independent block pools reaches a threshold percentage of a total MAXEC pre-configured for the one or more of the plurality of independent block pools (eg., 0018 - The erase count threshold ECTh may also be increased, for example, to EDR/2+EDR/4. Frequency or strength of the wear leveling operation performed by the wear leveling mechanism may be increased so as to keep the difference Delta within the first wear leveling limit WLDelta.sub.1. The first wear leveling limit WLDelta.sub.1 may be maintained until the highest erase/write count ECMax reaches the erase count threshold ECTh of EDR/2+EDR/4); and It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, with Kao providing the benefit of performing wear leveling that employs a variable threshold (see Kao 0002). Claim 11. Liu discloses A method of increasing Terabytes Written (TBW) capability of a NAND based storage device, comprising the following performed by a memory block reallocating system (eg., 0045 - increasing terabytes written ; [0062] Determining whether to reallocate virtual blocks ), system comprising: Liu does not disclose, but Gorobets discloses monitoring a Greatest Erase Count (GEC) of each of a plurality of independent block pools in a NAND based storage device at intervals (eg., 0021 - block experience counts maintained by the memory system controller to identify physical blocks with a low number of experience counts as those storing data of logical blocks having low counts; [0067] A system capable of maintaining individual block physical and/or logical experience counts is illustrated in FIGS. 11-13.; 0096 - When experience counts are maintained for the individual blocks or groups of blocks); determining a candidate independent block pool among the plurality of independent block pools having a rate of increase of Erase Count (EC) higher than a rate of increase of EC of remaining ones of the plurality of independent block pools, based on the GEC of each of the plurality of independent block pools (eg., 0021 - logical blocks with high counts provide an indication of likely continued heavy cycling of its data; 0076 - erase pool block(s) with the highest count are selected; 0107 - If block experience counts are maintained, whenever the next block in order for use from the erase pool according to a predetermined sequence has an experience count that is more than an average experience count of all the blocks in the memory system, plane or sub-system) (further, Gorobets discloses [0043] The parameters 55 includes a quantity related to the number of program/erase cycles experienced by the block, this quantity being updated after each cycle or some number of cycles. When this experience quantity is used in a wear leveling algorithm, logical block addresses are regularly re-mapped to different physical block addresses in order to even out the usage (wear) of all the blocks… number of cycles experienced by different blocks. [0077] when some form of block experience counts are available, the block within the erase pool having the highest experience count may be identified. 0079 - if block experience counts are available, the counts of the blocks are monitored and a wear leveling exchange initiated when the next block made available in the erase pool to receive data has an experience count that is higher than other blocks, such as higher than an average experience count of all or substantially all other blocks in the system. Gorbets provides the benefit that It may be desirable that wear leveling exchanges do not take place during the early life of the memory system, when there is little need for such leveling. If a total count of the number of blocks erased and reprogrammed during the life of the memory is available, a wear leveling exchange can be initiated with a frequency that increases as the total usage of the memory system increases (0080)); determining whether the GEC of the candidate independent block pool and the GEC of at least one independent block pool among the remaining ones of the plurality of independent block pools meet a reallocation condition (eg., [0076] use of block experience counts that enhances the process … the counts of the blocks in the erase pool may be used to select the one or more destination blocks to take part in the exchange.) reallocating one or more free blocks from the at least one independent block pool to the candidate independent block pool when the candidate independent block pool and the at least one independent block pool meet the reallocation condition, said reallocating including selecting one of the remaining ones of the plurality of independent block pools having a lowest GEC for the reallocation when two or more of the remaining ones of the plurality of independent block pools meet the reallocation condition, (eg., 0019 - Physical blocks that experience low usage are by this technique reallocated into the erased block pool where they are subjected to additional usage; 0021 - within a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts to be exchanged). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Liu in view of Gorobets does not disclose, but Yang discloses a Greatest Erase Count (GEC) (eg., [0043] Referring to FIG. 2, in step S202, determine candidate blocks for a victim block based on the erase counts of the memory blocks in the memory device 150.); It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, providing the benefit of a controller capable of performing a wear leveling operation efficiently (see Yang, 0005) a controller, coupled to the plurality of memory blocks, suitable for: determining candidate blocks, among the plurality of memory blocks, based on an erase count of each memory block; selecting a victim block among the candidate blocks, based on a hot page count of each candidate block; and moving data of the victim block into a destination block (0008). Liu in view of Gorobets and Yang does not disclose, but Kao discloses wherein the intervals are set based on when the GEC of one or more of the plurality of independent block pools reaches a threshold percentage of a total MAX_EC pre-configured for the one or more of the plurality of independent block pools (eg., 0018 - The erase count threshold ECTh may also be increased, for example, to EDR/2+EDR/4. Frequency or strength of the wear leveling operation performed by the wear leveling mechanism may be increased so as to keep the difference Delta within the first wear leveling limit WLDelta.sub.1. The first wear leveling limit WLDelta.sub.1 may be maintained until the highest erase/write count ECMax reaches the erase count threshold ECTh of EDR/2+EDR/4) (eg., 0017 - While the highest erase/write count ECMax is less than a erase count threshold ECTh, which may be equal to half the predetermined maximum erase/write count EDR (expressed as EDR/2). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, with Kao providing the benefit of performing wear leveling that employs a variable threshold (see Kao 0002). Claim 15. Liu in view of Gorobets and Yang does not disclose, but Kao discloses wherein the threshold percentage is an interval threshold percentage; and wherein determining whether the GEC of the candidate independent block pool and the GEC of the at least one independent block pool meet the reallocation condition comprises: determining whether the GEC of the candidate independent block pool is greater than or equal to a first threshold percentage of a total MAX_EC pre-configured for the candidate independent block pool (eg., 0018 - The erase count threshold ECTh may also be increased, for example, to EDR/2+EDR/4. Frequency or strength of the wear leveling operation performed by the wear leveling mechanism may be increased so as to keep the difference Delta within the first wear leveling limit WLDelta.sub.1. The first wear leveling limit WLDelta.sub.1 may be maintained until the highest erase/write count ECMax reaches the erase count threshold ECTh of EDR/2+EDR/4); and determining whether the GEC of the at least one independent block pool is less than a second threshold percentage of a total MAXEC pre-configured for the at least one independent block pool, wherein the second threshold percentage is less than the first threshold percentage (eg., 0017 - While the highest erase/write count ECMax is less than a erase count threshold ECTh, which may be equal to half the predetermined maximum erase/write count EDR (expressed as EDR/2). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, with Yang, with Kao providing the benefit of performing wear leveling that employs a variable threshold (see Kao 0002). Claim 16. Liu does not disclose, but Gorobets discloses wherein the one or more free blocks are reallocated to the candidate independent block pool from the at least one independent block pool having the GEC that is less than the second threshold percentage (eg., 0021 - within a range of physical block addresses may be examined at one time to select only one or a few of those blocks with the lowest counts to be exchanged… identify physical blocks with a low number of experience counts as those storing data of logical blocks having low counts). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Claim 18. Liu does not disclose, but Gorobets discloses wherein, for each independent block pool of the plurality of independent block pools, the GEC comprises a highest value among ECs of each block of a plurality of blocks included in the independent block pool (eg., 0021; 0104 - If block experience counts are maintained, the block in the erase pool having the highest experience count is selected). It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the terabytes written system to reallocate blocks as disclosed by Liu, with Gorobets, providing the benefit of to determining whether a wear leveling exchange should take place are monitored, and, in a companion step 175, it is determined whether one or more criteria have been satisfied to initiate wear leveling (see Gorobets, 0078). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAUTAM SAIN whose telephone number is (571)270-3555. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jared Rutz can be reached at 571-272-5535. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GAUTAM SAIN/Primary Examiner, Art Unit 2135
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Prosecution Timeline

Oct 30, 2024
Application Filed
Dec 05, 2025
Non-Final Rejection mailed — §103
Jan 12, 2026
Examiner Interview Summary
Jan 12, 2026
Applicant Interview (Telephonic)
Mar 05, 2026
Response Filed
Jun 04, 2026
Final Rejection mailed — §103
Jun 25, 2026
Applicant Interview (Telephonic)
Jun 25, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
91%
With Interview (+23.9%)
3y 3m (~1y 7m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 425 resolved cases by this examiner. Grant probability derived from career allowance rate.

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