DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-7, 9-15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Liu et al (US 2022/0231105; hereinafter Liu), in view of Tsuchi et al (US 2011/0205218; hereinafter Tsuchi), and further in view of Hudson et al (US 2020/0410923; hereinafter Hudson) and Morris et al (US 2020/0251638; hereinafter Morris).
• Regarding claims 1, 14, and 18, Liu discloses a display and associated method for controlling comprising a subpixel group (figures 9 and 10) comprising:
a plurality of power rails configured to supply rail voltages to a plurality of light emitting diodes (elements 121-123 in figure 10 and ¶s 64 and 96); and
a plurality of drive transistors, each drive transistor coupled in series between a power rail and a light emitting diode (note the relationship between at least elements 121, R(2), and T11 in figure 10).
However, Liu fails to disclose the additional details of the display.
In the same field of endeavor, Tsuchi discloses where:
the subpixel group further comprises a well rail coupled to a body terminal of each drive transistor (note where each of elements 101-112 has a well/body connected to one of Vbp1 and Vbp2 in figure 2 and ¶s 78-80; see also figure 9),
the well rail configured to supply a bulk voltage to the body terminal of each drive transistor (Vbpx in figures 2 and 9 and ¶s 131-133), and
the bulk voltage being greater than the rail voltages supplied by the plurality of power rails to prevent forward biasing of body diodes formed between the plurality of drive transistors and the common well (at least suggested by “when a PMOS transistor having a P+ diffusion region (for instance a drain) connected to the connection node Nc in the third sub-decoder 13 is off, a leakage current will not flow from the P.sup.+ diffusion region via a substrate to the back gate power supply of this PMOS transistor” in ¶ 65; where this description is similar to applicant’s description of body diodes in figure 5 and ¶ 38).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu according to the teachings of Tsuchi, for the purpose of preventing a leakage current from flowing in a transistor (¶ 65). However, Tsuchi also fails to disclose the additional details of the display.
In the same field of endeavor, Hudson discloses where:
the display comprises a plurality of subpixel groups each comprising a plurality of subpixels (figure 4 and ¶s 135-141); and
the plurality of drive transistors are fabricated within a common well in a substrate (figure 4A and ¶ 135).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu, as modified by Tsuchi, according to the teachings of Hudson, for the purpose of matching the threshold voltages of the transistors in pixels circuits (¶ 141). However, Hudson also fails to disclose the additional details of the display.
In the same field of endeavor, Morris discloses where the common well is configured to enable a pitch between the plurality of light emitting diodes of less than five microns (¶s 189 and 204).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu, as modified by Tsuchi and Hudson, according to the teachings of Morris, for the purpose of providing a high-brightness, high resolution display capable of being used in large and small display devices (¶s 5 and 6).
• Regarding claims 2, 3, 6, and 9, Liu, in view of Tsuchi, Hudson, and Morris, discloses everything claimed, as applied to claim 1. Additionally, Liu discloses where:
Claim 2: the rail voltages supplied by the plurality of power rails correspond to forward voltages generated by each of the plurality of light emitting diodes (¶ 59).
Claim 3: not all of the rail voltages supplied by the plurality of power rails are equal (¶s 64 and 96).
Claim 6: the display is a color display (¶ 97); and
the plurality of light emitting diodes include:
a red micro-LED (¶ 97);
a green micro-LED (¶ 97); and
a blue micro-LED (¶ 97).
Claim 9: the subpixel group for the display further comprises:
a plurality of current-source transistors (elements T21-T23 in figure 10),
each current-source transistor coupled in a series connection between a corresponding power rail and a corresponding drive transistor (note the relationship between at least elements 121, T11, and T21 in figure 10); and
a plurality of bias controls coupled to gate terminals of the plurality of current-source transistors that configured the plurality of current-source transistors to conduct a drive current (EM in figure 10).
Claim 17: the rail voltages supplied by the plurality of power rails correspond to forward voltages of the light emitting diode of each subpixel to reduce a power consumed by each subpixel group (¶ 59).
Claim 19: the method for controlling the subpixel group of the display further comprises:
reducing a power consumed by the subpixel group by:
supplying a first subpixel having a first light emitting diode with a lower rail voltage (¶s 59, 64, and 96); and
supplying a second subpixel having a second light emitting diode with a higher rail voltage (¶s 59, 64, and 96).
Claim 20: the first light emitting diode is a red micro-LED (¶s 59, 64, 96, and 97); and
the second light emitting diode is a green micro-LED (¶s 59, 64, 96, and 97).
However, Liu fails to disclose the additional details of the display.
In the same field of endeavor, Tsuchi discloses where:
Claim 3: the bulk voltage is greater than a maximum of the rail voltages supplied by the plurality of power rails (“a voltage greater than this upper limit voltage” in ¶ 65).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu according to the teachings of Tsuchi, for the purpose of preventing a leakage current from flowing in a transistor (¶ 65). However, Tsuchi also fails to disclose the additional details of the display.
In the same field of endeavor, Hudson discloses where:
Claim 7: the plurality of drive transistors are p-type transistors each having terminals embedded in a common well shared by the plurality of drive transistors (figures 3C and 4A and ¶s 122 and 135),
the common well being n-type and the terminals being p-type (figures 3C and 4A and ¶s 122 and 135); and
body diodes are formed between each terminal and the common well (inherent in the structure of figures 3C and 4A).
Claim 10: each current-source transistor is a p-type metal oxide semiconductor transistor (figures 3C and 4A and ¶s 122 and 135); and
each current-source transistor has a respective body terminal coupled to the well rail (figures 3C and 4A and ¶s 122 and 135).
Claim 11: the plurality of bias controls are configured to generate bias voltages (¶ 97),
each bias voltage based on a rail voltage of the corresponding power rail to reduce a power consumed by each current-source transistor (¶ 97).
Claim 12: the subpixel group further comprises:
SRAM cells coupled to gate terminals of the plurality of drive transistors (element 201 in figure 2D and ¶ 98),
a state of each SRAM cell controlling an ON/OFF condition of a corresponding drive transistor (¶ 98).
Claim 13: each SRAM cell is coupled to a word line (WLINE in figure 2B and ¶ 56) and a bit line of the display (elements 254 and 255 in figure 2B and ¶ 56, in view of ¶ 39).
Claim 15: the display further comprises:
a plurality of bias controls (¶ 74),
each bias control configured to bias the current-source transistor in each subpixel according to the rail voltage so that each current-source transistor conducts a drive current (¶ 74).
Claim 19: the method for controlling the subpixel group of the display further comprises:
reducing an area of the subpixel group by:
fabricating a first drive transistor of the first subpixel and a second drive transistor of the second subpixel so that they share a common well in a substrate (figure 4 and ¶s 135-141).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu, as modified by Tsuchi, according to the teachings of Hudson, for the purpose of matching the threshold voltages of the transistors in pixels circuits (¶ 141). However, Hudson also fails to disclose the additional details of the display.
In the same field of endeavor, Morris discloses where:
Claim 5: the pitch of the subpixel group is less than 5 microns (¶s 189 and 204).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have modified the invention of Liu, as modified by Tsuchi and Hudson, according to the teachings of Morris, for the purpose of providing a high-brightness, high resolution display capable of being used in large and small display devices (¶s 5 and 6).
Response to Arguments
Applicant’s arguments with respect to claims 1, 14, and 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Closing Remarks/Comments
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN DANIELSEN whose telephone number is (571)272-4248. The examiner can normally be reached Monday-Friday 9:00 AM to 5:00 PM Eastern Time.
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/NATHAN DANIELSEN/Primary Examiner, Art Unit 2622