DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 15-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because these claims recite the term “computer program product” which under its broadest reasonable interpretation can be construed to include electromagnetic signals which do not fall into any of the four categories of invention.
Claim Objections
Claims 15-20 are objected to because of the following informalities: claim 15 recites the phrase “in any of claims 8” and the other claims have the same phrase but refer to claims 9-13 respectively. As per MPEP section 608.01(n) item A, using the phrase “in any of” is acceptable such as the second to last example under item A, but only if the claims are grouped. The way the claims are currently referring back to only one claim, the phrase “in any of” needs to be corrected to “in” claim[s] 8. The same rationale applies to claims 16-20. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 7-10 and 14-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu (US 2021/0216447), and further in view of Lai et al. (US 10,754,786).
Consider claim 1, Fu in view of Lai et al. discloses a non-volatile memory controller, comprising: a communication interface, coupled to a non-volatile memory; and a processor, operating the non-volatile memory through the communication interface, wherein: space allocation of the non-volatile memory is presented by a plurality of logical-to-physical address mapping sub-tables; the processor selects a plurality of source blocks and a destination block from the non-volatile memory for garbage collection; and in order from the lowest to the highest logical address, the processor selects the logical-to-physical address mapping sub-tables in turn for use as a scan target, to perform a full scan of each logical-to-physical address mapping sub-table, and thereby to collect valid data in the source blocks and program the valid data obtained from the source blocks to the destination block (Fu: abstract, Fig. 1, [0003], [0015], [0019]-[0022], [0024], discloses having a L2P table broken up into smaller sub-tables and scans those sub-tables for validity information. Source blocks with the least amount of valid data are selected to be garbage collected to a selected destination block. Even though Fu teaches loading and scanning each sub-table for validity information, Fu does not specifically go into the ordering of the sub-tables and therefore does not specifically discuss the sub-tables being in an order from lowest to highest logical address, however Lai et al. does teach this feature. Lai et al.: Fig. 2, Col. 1 lines 55-65, Col. 4-5 lines 64-31, Col. 6 lines 10-16, discloses a L2P table that can be broken up into smaller sub-tables that are populated and traversed in logical address order from lowest to highest logical address.).
It would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify the Fu reference to have the L2P table and sub-table structure of Lai et al. because having sub-tables created and accessed consecutively going from lowest to highest logical address is a straight forward, convenient, simple to implement organizational table arrangement and would yield the predictable result of being able to effectively scan the tables for information.
Consider claim 2, Fu in view of Lai et al. discloses the non-volatile memory controller as claimed in claim 1, wherein: the processor scans the scan target on a mapping management unit basis, to obtain a mapped physical address mapped to a target logical address; and when the mapped physical address leads to one of the source blocks, the processor collects data indicated by the mapped physical address, and programs the collected data to the destination block (Fu: abstract, Fig. 1, [0003], [0015], [0019]-[0022], [0024], discloses having a L2P table broken up into smaller sub-tables and scans those sub-tables for validity information. Source blocks with the least amount of valid data are selected to be garbage collected to a selected destination block.).
Consider claim 3, Fu in view of Lai et al. discloses the non-volatile memory controller as claimed in claim 1, wherein: the processor selects the source blocks based on a valid data count of each block of the non-volatile memory (Fu: abstract, Fig. 1, [0003], [0015], [0019]-[0022], [0024], discloses having a L2P table broken up into smaller sub-tables and scans those sub-tables for validity information. Source blocks with the least amount of valid data are selected to be garbage collected to a selected destination block.).
Consider claim 7, Fu in view of Lai et al. discloses the non-volatile memory controller as claimed in claim 1, wherein: when collecting valid data of the source blocks and programming the collected valid data to the destination block, the processor decreases valid data counts of the corresponding source blocks; and the processor excludes blocks with zero valid data from the source blocks (Fu: abstract, Fig. 1, [0003], [0015], [0019]-[0022], [0024], [0026], discloses having a L2P table broken up into smaller sub-tables and scans those sub-tables for validity information. Source blocks with the least amount of valid data are selected to be garbage collected to a selected destination block. The status of blocks and the data within them are tracked. Spare blocks are blocks without valid data and spare/free blocks are not considered.).
Claims 8-10 and 14 are the method claims to controller claims 1-3 and 7 and are rejected using the same rationale.
Claims 15-17 are the computer program product claims to controller claims 1-3 and are rejected using the same rationale.
Claim(s) 4, 11 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fu (US 2021/0216447) in view of Lai et al. (US 10,754,786) as applied to claims 3 and 10 above, and further in view of Su et al. (US 9,280,459).
Consider claim 4, Fu in view of Lai et al. discloses the non-volatile memory controller as claimed in claim 3, however this combination does not specifically describe dividing source blocks into groups as claimed and therefore the combination alone does not teach: “wherein: based on a valid data count of each source block, the processor divides the source blocks into primary clearing blocks and secondary clearing blocks; a total amount of valid data in the primary clear blocks does not exceed a spare space size of the destination block; and the processor prioritizes valid data collection about the primary clearing blocks over valid data collection about the secondary clearing blocks.”. Su et al.: (abstract, Col. 3 lines 26-35, Col. 4 lines 10-18 and 58-63, Col. 5 lines 4-5 and 43-46, Col. 6 lines 28-36) discloses grouping source blocks based on the amount of valid data in the block and selecting from the group with the least amount of valid data first. The term “spare space size” is considered an arbitrary spare space size and the amount of valid data in the first group can be small enough to fit into destination blocks.
It would have been obvious to a person of ordinary skill in the art at the time the invention was made to modify the Fu in view of Lai et al. references to group the source blocks based on the amount of valid data as described in Su et al. because doing so enhances efficiency of garbage collection (Su et la.: Col. 6 lines 16-17 and 30-31)
Claim 11 is the method claim to controller claim 4 and is rejected using the same rationale.
Claim 18 is the computer program product claim to controller claim 4 and is rejected using the same rationale.
Allowable Subject Matter
Claims 5-6, 12-13 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The examiner has found, in the prior art, many of the claimed features, including grouping source blocks based on the amount of valid data, however none of the references found in the prior art disclose the particular calculation and use of the spare space size and residual value as claimed in claims 5 and 12.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL ALSIP whose telephone number is (571)270-1182. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald G. Bragdon can be reached at (571)272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/MICHAEL ALSIP/Primary Examiner, Art Unit 2139