DETAILED ACTION
Applicant’s response filed 5/11/2026 has been considered.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending.
Rejections under 35 USC 112 are partially maintained as several of the rejections were not addressed.
Rejections under 35 USC 102 are presented in view of reference provided in the IDS submitted 2/27/2026.
IDS filed 2/27/2026 has been considered. PTO-1449 is attached.
Application is pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
For example, claim 1 recites:
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The claim lacks clarity.
The claim recites, “…determine a first set of bit positions, at each of which T/2 instances of the first data have a same first bit value different from a same second bit value of the other T/2 copies of the first data…”
If half of the T instances are the same in a certain set of bit positions and the other half of the T instances are different in in the same, then this makes the false assumption that this probability will be true for the given even number of T instances all the time.
In other words this limitation, if understood correctly, suggests that exactly half of the received instances will have an error which is not necessarily true.
This limitation appears to be confusing.
Essential elements are missing from the claim language.
Independent claims 8 and 14 are rejected for similar reasons. Although claim 8 has some different limitations, clarity is lacking for similar reasons. Respective dependent claims are rejected at least based on dependency. Rejections below are made in accordance with MPEP 2111.
Corrections are requested.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 8 and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zopf USPAP 20210058190A1 (herein: D1).
As per claims 1 and 14, D1 teaches (i.e., title, abstract and Figure 1) an apparatus comprising: a receiver configured to receive a plurality of T instances of first data as transmitted, wherein each instance includes data and a cyclic redundancy check (CRC) code (i.e., Figure 2, below and paragraph 0019), at least one instance of the data includes an error from transmission (i.e., Figure 2, packet 211 and paragraph 0020), and T is an even number greater than or equal to 4 (i.e., Figure 2, 4 transmissions and paragraphs 0019-0027); and one or more processors (i.e., Figure 5 and paragraph 0045) configured to: determine a first set of bit positions, at each of which T/2 instances of the first data have a same first bit value different from a same second bit value of the other T/2 instances of the first data (i.e., Figure 2, the column of reference number 2111 wherein two positions are 0s and two positions are 1s); determine a second set of bit positions, at each of which more than T/2 instances of the first data have a same bit value different from a bit value at a corresponding bit position of the a first instance of the plurality of T instances (i.e., Figure 2, 1st column of the four transmissions wherein the first 3 are 0s and the last one is 1); and correct, using the first set of bit positions and the second set of bit positions, an error contained in the first copy instance (i.e., Figure 2 and paragraphs 0019-0025).
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As per claim 8, D1 teaches (i.e., title, abstract and Figure 1) an apparatus comprising: a receiver configured to receive a plurality of T instances of first data as transmitted, wherein each instance includes data and including a cyclic redundancy check (CRC) code (i.e., Figure 2, above and paragraph 0019), at least one instance of the data includes an error from transmission (i.e., Figure 2, packet 211 and paragraph 0020), and wherein T is an odd number greater than or equal to 3 (i.e., Figure 2, packets and paragraph 0026); and one or more processors (i.e., Figure 5 and paragraph 0045) configured to: determine a first set of bit positions, at each of which (T-1)/2 instances of the first data have a same first bit value different from a same second bit value of the other (T+1)/2 instances of the first data (i.e., Figure 2, the column of reference number 2111 wherein two positions are 0s and two positions are 1s; The Examiner would like to point out that is T is odd, for example 3, and then if 1 is added to or 1 is subtracted from T then T becomes even as shown in claims 1 and 14.); determine a second set of bit positions, at each of which more than (T-1)/2 instances of the first data have a same bit value different from a bit value at a corresponding bit position of the first instance (i.e., Figure 2, 1st column of the four transmissions wherein the first 3 are 0s and the last one is 1. The Examiner would like to point out that is T is odd and then if 1 is added to or 1 is subtracted from T then T becomes even as shown in claims 1 and 14.); and correct, using the first set of bit positions and the second set of bit positions, an error contained in the first instance (i.e., Figure 2 and paragraphs 0019-0025).
It is the Examiner’s conclusion that the claims of the present application, as presented, are not clear and are not patentably over the prior art, as understood. Applicant is encouraged to formulate claim language that clearly defines the novelty of the application. Additional pertinent prior arts are cited for Applicant’s review. Remaining dependent claims may be rejected once the claims are clear. It appears Applicants are using verbiage that appears to be confusing and unique when in fact the prior art reads on the claims, at least the independent claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUJTABA M CHAUDRY whose telephone number is (571)272-3817. The examiner can normally be reached Monday-Friday 9am-5:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Albert DeCady can be reached at 571-272-3819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MUJTABA M. CHAUDRY
Primary Examiner
Art Unit 2112
/MUJTABA M CHAUDRY/Primary Examiner, Art Unit 2112