Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-7, 11-13, and 15-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Heo (US 2025.0014499).
Regarding claim 1, Heo disclose:
An electronic display comprising: a display panel comprising a plurality of display pixels having non-uniform luminance characteristics (see Fig. 1, 3-4; [0078-0079]; display DP with plurality of pixels PX with non-uniform luminance characteristic (e.g., mura area MA))
pixel uniformity correction circuitry configured to compensate for the non-uniform luminance characteristics of the display pixels based on pixel luminance correction factors selected based on pixel group luminance error patterns corresponding to locations of the display pixels (see Fig. 1, 3-4; [0078-0079]; pixel uniformity correction circuit 10 to compensate for non-uniform luminance characteristics based on luminance correction factors (e.g., high v. low spatial frequency components) of pixel group luminance error patterns (MA) in locations of the display pixels).
Regarding claim 2, the rejection of claim 1 is incorporated herein. Heo further disclose:
the pixel group luminance error patterns describe luminance error patterns of groups of at least two display pixels by at least two display pixels (see Fig. 3)
Regarding claim 3, the rejection of claim 2 is incorporated herein. Heo further disclose:
the pixel group luminance error patterns describe luminance error patterns of groups of greater than two display pixels by greater than two display pixels (see Fig. 3)
Regarding claim 4, the rejection of claim 1 is incorporated herein. Heo further disclose:
the pixel uniformity correction circuitry comprises: lower spatial frequency mura compensation circuitry configured to correct for static non-uniform luminance characteristics of the plurality of display pixels; higher spatial frequency mura compensation circuitry configured to correct for local variations in the non-uniform luminance characteristics of the plurality of display pixels (see Fig. 4; [0078-0079])
Regarding claim 5, the rejection of claim 1 is incorporated herein. Heo further disclose:
the pixel uniformity correction circuitry is configured to compensate for the non-uniform luminance characteristics of the plurality of display pixels using a per-pixel-group set of correction factors that, when applied to pixel data to be sent to the plurality of display pixels, reduces or eliminates non-uniform luminance characteristics of the plurality of display pixels within a threshold of human visual acuity (see Fig. 4; [0078-0079]; where in order to display images correctly for user of the display, such corrections to non-uniform luminance to be provided within threshold of human visual acuity as necessitated by design)
Regarding claim 6, the rejection of claim 1 is incorporated herein. Heo further disclose:
the pixel uniformity correction circuitry comprises: a group index lookup table (LUT) configured to define the pixel luminance correction factors based on the pixel group luminance error patterns; and a group pattern LUT configured to define locations of the pixel group luminance error patterns on the display panel (see Fig. 6; [0094])
Regarding claim 7, the rejection of claim 6 is incorporated herein. Heo further disclose:
a scaler LUT configured to define a scaling factor for the pixel luminance correction factors based on a global brightness setting of the electronic display (see Fig. 4, 14; [0064, 0143]; where global brightness setting Data_test s used in order to configure scaling factor (compensation) required).
Regarding claim 11, Heo disclose:
Image processing circuitry wherein the pixel luminance correction factors are configured to compensate for non-uniform luminance characteristics of display pixels of an electronic display (see Fig. 1, 3-4; [0078-0079]; pixel uniformity correction circuit 10 to compensate for non-uniform luminance characteristics based on luminance correction factors (e.g., high v. low spatial frequency components) of pixel group luminance error patterns (MA) in locations of the display pixels)
a group index lookup table (LUT) configured to define pixel luminance correction factors based on pixel group luminance error patterns; a group pattern LUT configured to define locations of the pixel group luminance error patterns on the electronic display (see Fig. 6; [0094])
selection circuitry configured to obtain the pixel luminance correction factor for pixel data for a particular display pixel of the electronic display from the group index LUT and the group pattern LUT to enable the pixel data to be compensated for the non-uniform luminance characteristics of the display pixels of the electronic display (see Fig. 4; [0078-0079, 0094]; circuitry to use group index and pattern to enable non-uniform luminance compensation of the display pixels)
Regarding claim 12, the rejection of claim 11 is incorporated herein. Heo further disclose:
scaler circuitry configured to apply a scaling factor to the pixel luminance correction factors obtained by the selection circuitry, wherein the scaling factor is based on a global brightness setting of the electronic display (see Fig. 4, 14; [0068, 0143]; scaler circuit 100)
Regarding claim 13, the rejection of claim 12 is incorporated herein. Heo further disclose:
a scaler LUT configured to define the scaling factor for the pixel luminance correction factors based on the global brightness setting of the electronic display (see Fig. 4, 14; [0064, 0143]; where global brightness setting Data_test s used in order to configure scaling factor (compensation) required).
Regarding claim 15, the rejection of claim 11 is incorporated herein. Heo further disclose:
the pixel group luminance error patterns describe luminance error patterns of groups of at least two display pixels by at least two display pixels (see Fig. 3)
Regarding claim 16, the rejection of claim 11 is incorporated herein. Heo further disclose:
the pixel group luminance error patterns describe luminance error patterns of groups of more than two display pixels by more than two display pixels (see Fig. 3)
Regarding claim 17, claim 17 is rejected under the same rationale as claim 1.
Regarding claims 18-19, claims 18-19 are each rejected under the same rationale as claim 6.
Regarding claim 20, Heo disclose:
An electronic device comprising: processing circuitry configured to generate pixel data; and an electronic display comprising: a display panel comprising a plurality of display pixels having non-uniform luminance characteristic (see Fig. 1, 3-4; [0078-0079]; display DP with plurality of pixels PX with non-uniform luminance characteristic (e.g., mura area MA))
pixel uniformity correction circuitry configured to compensate for the non-uniform luminance characteristics of the display pixels on a per-pixel basis based on a per-pixel correction factor applied to the pixel data wherein the per-pixel correction factor has a bit depth of 3 bits or lower (see Fig. 1, 3-4; [0078-0079]; pixel uniformity correction circuit 10 to compensate for non-uniform luminance characteristics based on luminance correction factors (e.g., high v. low spatial frequency components) of pixel group luminance error patterns (MA) in locations of the display pixels; see further [0129]; where MCD_HF for the high special frequency all have three bits (e.g., ‘000’).
Allowable Subject Matter
Claim 8-10, 14, and 21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH BUKOWSKI whose telephone number is (571)270-7913. The examiner can normally be reached Monday - Friday // 0730-1530.
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/kenneth bukowski/ Primary Examiner, Art Unit 2621