DETAILED ACTION
The application of Sethi et al., for a “Method to identify the performance bottle neck in the complex enterprise virtualized environment” filed on November 1, 2024, which is a continuation of U.S. Application No. 17223604, filed on April 6, 2021, now U.S. Patent No. 12158830 has been examined. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The information disclosure statement (IDS) submitted on December 2, 2024 has been considered.
Claims 1-20 are presented for examination.
Claims 11-20 are rejected under 35 USC § 101.
Claims 1-20 are rejected under nonstatutory double patenting rejection.
Claim Objections
Claim 12 is objected to because of the following informalities: Claim 12 is missing a period. Appropriate correction is required.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 11-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claim(s) recite(s) mental processes-concepts performed in human mind.
As per claim 11, with the exception of the recitation of the limitations “A non-transitory storage medium having stored therein instructions that are executable by one or more hardware processors to perform operations”, the limitations “comparing telemetry data including request times and response times collected from a computing system with expected telemetry from the computing system, wherein the expected telemetry data includes expected request times and expected response times, wherein the request times identify a time for each layer involved in a request and the response time identify time for each layer involved in the response; generating a probability for each of the layers of the computing system, wherein the probability represents a likelihood that a corresponding layer is a potential source of a performance issue; and identifying a particular layer of the computing system as a source of a performance issue in the computing system based on the probabilities; and troubleshooting the performance issue starting in the particular layer” can be performed by a human mind or with the aid of pen and paper. (MPEP 2106.04(a)(2)).
Step 2A. This judicial exception is not integrated into a practical application because the additional element(s) “A non-transitory storage medium having stored therein instructions that are executable by one or more hardware processors to perform operations” is/are directed to generic computer components recited at a high-level of generality such that they amount to nothing more than mere instructions to apply the exception using generic computer components (MPEP 2106.05(f)).
The limitation of “comparing telemetry data including request times and response times collected from a computing system with expected telemetry from the computing system” is mere data gathering and analysis recited at a high level of generality, and thus are insignificant extra-solution activity (MPEP 2106.05(g).
The limitations of “generating a probability for each of the layers of the computing system…identifying a particular layer of the computing system as a source of a performance issue” are directed to the abstract idea of analyzing/manipulating data and are therefore mental processes. (MPEP 2106.04(a)(2)).
The limitation of “troubleshooting the performance issue starting in the particular layer” can be performed by a human, e.g. recommending resolutions.
Step 2B. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception. The additional element(s) “A non-transitory storage medium having stored therein instructions that are executable by one or more hardware processors to perform operations” does/do not provide significantly more than the recited judicial exception because the additional elements are mere instructions to implement an abstract idea or other exception on a computer and in this case generic computer components (MPEP 2106.05(f)).
As for the limitations recited in claims 12-20, when considering each of the claims as a whole these additional elements do not integrate the exception into a practical application, using one or more of the considerations laid out by the Supreme Court and the Federal Circuit. The additional elements do not reflect an improvement in the functioning of a computer, or an improvement to other technology or technical field. The additional elements do not implement a judicial exception with, or use a judicial exception in conjunction with, a particular machine or manufacture that is integral to the claim. The additional element do not apply or use the judicial exception in some other meaningful way beyond generally linking the use of the judicial exception to a particular technological environment, such that the claim as a whole is more than a drafting effort designed to monopolize the exception.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12158830. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-14 of U.S. Patent No. 12158830 contain(s) every element of claim(s) 1-20 of the instant application and as such anticipate(s) claim(s) 1-20 of the instant application.
Reasons for allowance
The following is an examiner's statement of reasons for allowance:
Claims 1-20 are rejected under a nonstatutory type double patenting rejection as claiming the same invention as that of claims 1-14 of the parent application No. 17223604, now U.S. Patent No. 12158830, which were allowed in an office action mailed on August 7, 2024. Claims 1-10 would be allowable if a proper terminal disclaimer is filed. Claims 11-20 would be allowable if rewritten to overcome the 35 USC § 101 rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Elmira Mehrmanesh whose telephone number is (571)272-5531. The examiner can normally be reached on M-F from 10-6.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Bryce Bonzo, can be reached at telephone number (571) 272-3655. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Elmira Mehrmanesh/
Primary Examiner, Art Unit 2113