DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
CLAIM INTERPRETATION
Claims in this application are not interpreted under 35 U.S.C. §112(f).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5, 8, 10-12, 15, and 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication No. US 2016/0350164A1 (Cunningham) in view of US Patent Application Publication No. US 2017/0052720 A1 (Chu) in view of US Patent No. US 11,983,422 B1 (Proulx) as motivated by US Patent Application Publication No. US 2013/0007543 A1 (Goss) in further view of US Patent Application Publication No. US 2010/0058018 A1 (Kund).
Regarding claim 1 and analogous claims 8 and 15:
Cunningham teaches A memory sub-system (NVM (16) and memory control logic (14) with comparator (20) and error logic (18)) comprising: a memory device (NVM (16) including NVM array (22)) comprising a plurality of blocks (the NVM array (22) includes a plurality of blocks as seen in [Fig. 1]); and a memory controller operatively coupled with the memory device, the memory controller to perform operations comprising: reading a reference block of the plurality of blocks, wherein the data stored in the reference block is based on pre-programmed reference data written during production of the memory sub-system and stored in the reference block (by disclosing that the memory control logic (14) coupled to the NVM (16) obtains production data and ECC as well as margin data, which is written to the NVM (16) during a production phase by the manufacturer before shipping [0013]. The production data and margin data include data that is programmed at the time of production by the manufacturer, before shipping the product to consumers, and includes firmware and parameters necessary for operating the NVM, such as execute control code and reference data [0013] [0015-0024]. This data may be read when the data processing system is initially powered up after manufacturing [0013]).
Cunningham does not disclose, but Chu teaches a memory sub-system (10) comprising: a memory device ((406) with a plurality of blocks (410) of memory cells erased together [0032-0034] [Fig. 3]) and a processing device operatively coupled with the memory device, the processing device to perform operations comprising: (by teaching a memory control unit (404) with a memory management circuit (502), which includes a processor with instructions stored in memory (ROM) for performing the disclosed operations [Fig. 3] [Fig. 4] [0031] [0037] [0039]) detecting a power-on for the memory device when the memory device is in a powered-off state (by disclosing determining if the storage device is powered on as part of a boot operation after being powered off (S801-S803) [Fig. 8] [0061] [0073]); determining, an estimate of a duration for which the memory device was in the powered-off state (by teaching that a shutdown time may be calculated (805) [Fig. 8] [0074-0077]). determining whether the duration satisfies a duration threshold (by determining that it is determined whether the off time is longer than an off time threshold (807)); and responsive to determining the duration satisfies the duration threshold, initiating a folding operation for at least a subset of the plurality of blocks (if the off time is longer than an off time threshold, then a refresh operation (folding operation) is performed on the physical erasing units (809) [0067] [0079]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the memory control logic that reads the pre-programmed production and reference data written to the memory device during a manufacturing phase after being initially powered up as taught by Cunningham to additionally include a power-down time (written with the programmed production and reference data written to the memory device during the manufacturing phase as taught by Cunningham) and to include a processor in the memory control logic with the ability to determine a power off duration after a power-on for the memory device (for example, when initially powering up the memory device after being manufactured as taught by Cunningham), determining whether the off time is greater than an off time threshold. If the off-time is greater than the threshold, performing on refresh operation on the physical erasing units (such as those including the programmed production and reference data written to the memory device during the manufacturing phase as taught by Cunningham), or else not performing the refresh if the off time is not greater than the threshold as taught by Chu.
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013] and refreshing the data according to an off time threshold can prevent data from being lost or errors and can perform the refresh operation accurately as taught by Chu in [Chu, 0011].
Cunningham in view of Chu does not explicitly disclose, but Proulx teaches obtaining read information from a reference block of the plurality of blocks, wherein the read information is based on a pre-programmed reference data written during production of the memory system and stored in the reference block; determining, based on the read information from the reference block, an estimate of a duration for which the memory device was in the powered-off state (by teaching that a storage device controller [Col 4: line 38 – Col 5: line 12] may read a subset of pSLC data from blocks of the storage subsystem using pSLC scan read voltage thresholds to read data, such as metadata stored in the pSLC blocks (reference data stored in the reference block and determine error rates of the various read data (obtaining read information from a reference block of the plurality of blocks). The pSLC scan operation may be used to obtain a read voltage threshold at which the subset of data read from the storage system experienced errors within a predetermined threshold. The obtained read voltage threshold (read information) is then used to estimate a powered-off data retention time (duration for which the memory device was in the powered-off state) [Col 6: lines 5-60]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have substituted the calculation of the off-time as taught by Chu with the calculation of the off-time according to the pSLC scan method as taught by Proulx, and furthermore to include storing the data stored during the manufacturing phase with the pSLC method so that it could be read with the pSLC scan method (i.e., obtaining read information from a reference block of the plurality of blocks, wherein the read information is based on a pre-programmed reference data written during production of the memory sub-system and stored in the reference block) to determine an off time as taught by Proulx (such as an off time after manufacturing when the memory device is powered-on initially after the production data was stored to the memory device during manufacturing as taught by Cunningham).
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013]. Furthermore, the pSLC storage method offers enhanced reliability and lifetime of that portion of memory for storing relatively important information that is needed to utilize the storage system (i.e., like the production and reference data as taught by Cunningham) as taught by Proulx in [Col 6: lines 14-39]. Finally, although Chu teaches a way to obtain a power-off time, unlike a personal computer, a memory storage device may not include a battery and a clock to keep track of time when powered off. While a host system may be able to inform the device of the current time, not all host systems can or do provide this information, and furthermore, they may be misconfigured or exhibit errors that cause the host system clock to be incorrect. As a result, a solid-state non-volatile memory storage device may require an independent way to determine elapsed time that can be used to estimate temporal degradation of the memory during a powered-off time [Goss, 0013, 0027, 0033, 0040], such as the pSLC scan method as taught by Proulx. Accordingly, one of ordinary skill in the art would have been motivated to switch the determination of the off-time period from using host timestamps as taught by Chu to the pSLC scan method as taught by Proulx because it would avoid relying on a host, which may be misconfigured or exhibit errors that cause the host’s system clock to be incorrect as taught by Goss in [0013].
Cunningham in view of Chu in further view of Proulx as motivated by Goss does not explicitly disclose, but Kund teaches that the power on may be initiated in response to a power on command (by teaching that a memory controller (120) typically receives and acts upon external commands included in a command set for controlling a memory device, such as a power up and down command [0024]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the determination of whether the memory device was powered on as taught by Chu to include determining whether the memory controller had received the power up command as taught by Kund because it would have only required the combination of known elements according to known methods to yield predictable results. For example, Chu teaches performing operations at boot time if the memory device is powered on, but does not teach that power on is in response to a command. However, Kund teaches that a memory controller typically receives and acts upon external commands included in a command set for operating a memory device such as a power up and down command. Accordingly, one of ordinary skill in the art could have combined the method of performing operations at boot when the device is powered on as taught by Chu to include booting in response to a power-on command as taught by Kund according to known methods and the results would have been predictable. Furthermore, in combination, each element would continue function the same as when they were separately. Accordingly, the combination would have been obvious to one of ordinary skill in the art.
Regarding claim 3 and analogous claims 10 and 17:
The memory sub-system of claim 1 is made obvious by Cunningham in view of Chu in further view of Proulx as motivated by Goss in further view of Kund (Cunningham-Chu-Proulx-Goss-Kund).
Cunningham does not explicitly disclose, but Proulx teaches, performing a first adjustment to a read threshold voltage based on physical characteristics of the memory device ((302) (306) by teaching that the read voltage threshold that was used in the most recent performance of block (302) may be adjusted by 10 voltage steps for a subsequent read operation at (306) [Col 8: lines 27-57] [Fig. 3]. The baseline voltage and adjustment are provided by a manufacturer of the storage device), performing a read operation on the reference block at the first adjustment of the read threshold voltage (the read operation is then performed at (302) with the adjusted read voltage threshold adjusted by 10 steps); and responsive to determining an error with the read operation satisfies an error threshold (if the read operation results in a number of errors within a threshold range (304) [Fig. 3]), obtaining the read information (the powered-off data duration time is determined according to the read voltage threshold at which a subset of pSLC data read from the storage system experienced errors within the threshold range (308) [Fig. 3] [Col 10: lines 35-50]. The threshold voltages correspond to different data retention (shutdown) times based on different erase counts of the block as seen in (based on physical characteristics of the memory device) [Fig. 9]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have substituted the calculation of the off-time as taught by Chu with the calculation of the off-time according to the pSLC scan method as taught by Proulx, and furthermore to include storing the data stored during the manufacturing phase with the pSLC method so that it could be read with the pSLC scan method (i.e., obtaining read information from a reference block of the plurality of blocks, wherein the read information is based on a pre-programmed reference data written during production of the memory sub-system and stored in the reference block) to determine an off time as taught by Proulx (such as an off time after manufacturing when the memory device is powered-on initially after the production data was stored to the memory device during manufacturing as taught by Cunningham).
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013]. Furthermore, the pSLC storage method offers enhanced reliability and lifetime of that portion of memory for storing relatively important information that is needed to utilize the storage system (i.e., like the production and reference data as taught by Cunningham) as taught by Proulx in [Col 6: lines 14-39]. Finally, although Chu teaches a way to obtain a power-off time, unlike a personal computer, a memory storage device may not include a battery and a clock to keep track of time when powered off. While a host system may be able to inform the device of the current time, not all host systems can or do provide this information, and furthermore, they may be misconfigured or exhibit errors that cause the host system clock to be incorrect. As a result, a solid-state non-volatile memory storage device may require an independent way to determine elapsed time that can be used to estimate temporal degradation of the memory during a powered-off time [Goss, 0013, 0027, 0033, 0040], such as the pSLC scan method as taught by Proulx. Accordingly, one of ordinary skill in the art would have been motivated to switch the determination of the off-time period from using host timestamps as taught by Chu to the pSLC scan method as taught by Proulx because it would avoid relying on a host, which may be misconfigured or exhibit errors that cause the host’s system clock to be incorrect as taught by Goss in [0013].
Regarding claim 4 and analogous claims 11 and 18:
The memory sub-system of claim 3 is made obvious by Cunningham-Chu-Proulx-Goss-Kund.
Cunningham does not explicitly disclose, but Proulx teaches, responsive to determining the error value associated with the read operation does not satisfy the error threshold (304 – No) performing a second adjustment to the read threshold voltage value based on physical characteristics of the memory device wherein the second adjustment is different from the first adjustment; performing a second read operation on the reference block at the second adjustment of the read threshold voltage value; and responsive to determining a second error value associated with the second read operation satisfies the error threshold, identifying the read information (by teaching that the pSLC scan may be completed by increasing/decreasing the read voltage threshold for subsequent pSLC read operations with a voltage step of only 1, such that a precise read voltage threshold may be obtained that satisfies the error threshold range and the determined read voltage threshold may be used to determine the retention (shutdown) time, where the read voltage thresholds for different erase counts correspond to different retention (shutdown) times (based on physical characteristics of the memory device) [Col 9: line 8 – Col 10: line 35] [Fig. 9]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have substituted the calculation of the off-time as taught by Chu with the calculation of the off-time according to the pSLC scan method as taught by Proulx, and furthermore to include storing the data stored during the manufacturing phase with the pSLC method so that it could be read with the pSLC scan method (i.e., obtaining read information from a reference block of the plurality of blocks, wherein the read information is based on a pre-programmed reference data written during production of the memory sub-system and stored in the reference block) to determine an off time as taught by Proulx (such as an off time after manufacturing when the memory device is powered-on initially after the production data was stored to the memory device during manufacturing as taught by Cunningham).
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013]. Furthermore, the pSLC storage method offers enhanced reliability and lifetime of that portion of memory for storing relatively important information that is needed to utilize the storage system (i.e., like the production and reference data as taught by Cunningham) as taught by Proulx in [Col 6: lines 14-39]. Finally, although Chu teaches a way to obtain a power-off time, unlike a personal computer, a memory storage device may not include a battery and a clock to keep track of time when powered off. While a host system may be able to inform the device of the current time, not all host systems can or do provide this information, and furthermore, they may be misconfigured or exhibit errors that cause the host system clock to be incorrect. As a result, a solid-state non-volatile memory storage device may require an independent way to determine elapsed time that can be used to estimate temporal degradation of the memory during a powered-off time [Goss, 0013, 0027, 0033, 0040], such as the pSLC scan method as taught by Proulx. Accordingly, one of ordinary skill in the art would have been motivated to switch the determination of the off-time period from using host timestamps as taught by Chu to the pSLC scan method as taught by Proulx because it would avoid relying on a host, which may be misconfigured or exhibit errors that cause the host’s system clock to be incorrect as taught by Goss in [0013].
Regarding claim 5 and analogous claims 12 and 19:
The memory sub-system of claim 1 is made obvious by Cunningham-Chu-Proulx-Goss-Kund.
Cunningham does not explicitly disclose, but Proulx teaches wherein determining the estimate of the duration for which the memory device was in the powered-off state comprises: responsive to determining the read information reflects an expected read information, indicating the estimate of the duration, wherein the expected read information is based on a pre-characterization table corresponding to one or more physical characteristics of the memory device (by teaching that responsive to determining the read voltage threshold results in errors within the threshold (reflects an expected read information), the retention duration (shutdown duration) is determined from a table stored in the storage device initialization database (208) corresponding to erase counts and read threshold voltages of the memory device [Fig. 9] [Col 12: line 24 – Col 13: line 20]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have substituted the calculation of the off-time as taught by Chu with the calculation of the off-time according to the pSLC scan method as taught by Proulx, and furthermore to include storing the data stored during the manufacturing phase with the pSLC method so that it could be read with the pSLC scan method (i.e., obtaining read information from a reference block of the plurality of blocks, wherein the read information is based on a pre-programmed reference data written during production of the memory sub-system and stored in the reference block) to determine an off time as taught by Proulx (such as an off time after manufacturing when the memory device is powered-on initially after the production data was stored to the memory device during manufacturing as taught by Cunningham).
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013]. Furthermore, the pSLC storage method offers enhanced reliability and lifetime of that portion of memory for storing relatively important information that is needed to utilize the storage system (i.e., like the production and reference data as taught by Cunningham) as taught by Proulx in [Col 6: lines 14-39]. Finally, although Chu teaches a way to obtain a power-off time, unlike a personal computer, a memory storage device may not include a battery and a clock to keep track of time when powered off. While a host system may be able to inform the device of the current time, not all host systems can or do provide this information, and furthermore, they may be misconfigured or exhibit errors that cause the host system clock to be incorrect. As a result, a solid-state non-volatile memory storage device may require an independent way to determine elapsed time that can be used to estimate temporal degradation of the memory during a powered-off time [Goss, 0013, 0027, 0033, 0040], such as the pSLC scan method as taught by Proulx. Accordingly, one of ordinary skill in the art would have been motivated to switch the determination of the off-time period from using host timestamps as taught by Chu to the pSLC scan method as taught by Proulx because it would avoid relying on a host, which may be misconfigured or exhibit errors that cause the host’s system clock to be incorrect as taught by Goss in [0013].
Claims 2, 6-7, 9, 13-14, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Cunningham-Chu-Proulx-Goss-Kund in further view of US Patent Application Publication No. US 2014/0059405 A1 (Syu).
Regarding claim 2 and analogous claims 9 and 16:
The memory sub-system of claim 1 is made obvious by Cunningham-Chu-Proulx-Goss-Kund.
Cunningham does not explicitly disclose, but Syu teaches, further comprising: responsive to detecting a power-off, writing second reference data (by teaching that before power-off, a system may record up to which block a scrubbing (folding/refreshing) operation has been performed and an activity flag to indicate it was in the middle of performing a scrubbing operation. In this way, upon power-on, the scrubbing operation may be resumed [0044-0045]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified metadata stored in the system as taught by Cunningham to include the activity flag and up to which block the scrubbing operation had been performed on blocks as taught by Syu.
One of ordinary skill in the art would have been motivated to make this modification because it is desirable for the system to continue a scrubbing (refreshing/folding) that may be interrupted by power off, and allows unfinished operations to be finished before anything else as taught by Syu in [0044-0046].
Syu does not explicitly disclose writing the activity flag or block number, but Proulx teaches to store such metadata to the reference block, wherein the reference data is stored in a first portion of the reference block, and wherein the second reference data is written to a second portion of the reference block (by teaching that a portion of the MLC/TLC NAND devices in the storage system may be configured as pseudo SLC (pSLC) devices that are configured to store 1-bit per cell in order to enhance the reliability and lifetime of that portion of those MLC/TLC NAND devices in the storage system that may store metadata, such as storage device configuration information, tables that allow the translation of logical block addresses to physical NAND locations, and other firmware numerical data (i.e., all of these considered reference data stored in a first portion of the reference block), and other relatively important information (writing second reference data to the reference block, wherein second reference data written to a second portion of the reference block) that is needed to utilize the storage subsystem [Col 6: lines 28-40]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the activity flag and recorded block of what block the scrubbing operation made it to before the power down was performed as taught by Syu to include being stored in the metadata portion of the memory in a pSLC configuration as it is relatively important information needed to utilize the storage subsystem as taught by Proulx.
One of ordinary skill in the art would have been motivated to make this modification because the relatively important information may be stored with higher reliability and improve the lifetime of that portion of the storage device if it is stored in a portion of the memory configured as pSLC memory as taught by Proulx in [Col 6: lines 28-40].
Cunningham in view of Syu does not explicitly disclose, but Kund teaches that the power off may be initiated in response to a power off command (by teaching that a memory controller (120) typically receives and acts upon external commands included in a command set for controlling a memory device, such as a power up and down command [0024]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the determination of whether the memory device was going to be powered off as taught by Syu to include determining whether the memory controller had received the power off command as taught by Kund because it would have only required the combination of known elements according to known methods to yield predictable results. For example, Syu teaches that before power-off, a system may record up to which block a scrubbing (folding/refreshing) operation has been performed and an activity flag to indicate it was in the middle of performing a scrubbing operation, but does not teach that power off is initiated response to a command. However, Kund teaches that a memory controller typically receives and acts upon external commands included in a command set for operating a memory device such as a power up and down command. Accordingly, one of ordinary skill in the art could have combined the method of performing operations before a device is powered down as taught by Syu to include determining to power down in response to a power down command as taught by Kund according to known methods and the results would have been predictable. Furthermore, in combination, each element would continue function the same as when they were separately. Accordingly, the combination would have been obvious to one of ordinary skill in the art.
Regarding claim 6 and analogous claims 13 and 20:
The memory sub-system of claim 1 is made obvious by Cunningham-Chu-Proulx-Goss-Kund.
Cunningham does not explicitly disclose, but Chu teaches, further comprising: responsive to determining the duration does not satisfy the duration threshold, continuing operation of the memory device (by teaching that if the off time is not longer than the threshold (807 -> No), the memory device will continue to operate, but may not perform a refresh (as in (809) in response to (807 -> Yes)) [0074-0079]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the memory control logic that reads the pre-programmed production and reference data written to the memory device during a manufacturing phase after being initially powered up as taught by Cunningham to additionally include a power-down time (written with the programmed production and reference data written to the memory device during the manufacturing phase as taught by Cunningham) and to include a processor in the memory control logic with the ability to determine a power off duration after a power-on for the memory device (for example, when initially powering up the memory device after being manufactured as taught by Cunningham), determining whether the off time is greater than an off time threshold. If the off-time is greater than the threshold, performing on refresh operation on the physical erasing units (such as those including the programmed production and reference data written to the memory device during the manufacturing phase as taught by Cunningham), or else not performing the refresh if the off time is not greater than the threshold as taught by Chu.
One of ordinary skill in the art would have been motivated to make this modification because it is important that the read data output from the read operations of the control code and reference data be correct, otherwise the processing system has the potential for destructive failure as taught by Cunningham [Cunningham, 0013], and refreshing the data according to an off time threshold can prevent data from being lost or errors and can perform the refresh operation accurately as taught by Chu in [Chu, 0011].
Cunningham in view of Chu does not explicitly disclose, but Syu teaches, and then determining whether the folding operation has previously been initiated; and responsive to determining the folding operation has previously been initiated, folding a next block of the subset of the plurality of blocks (by teaching that before power-off, a system may record up to which block a scrubbing (folding/refreshing) operation has been performed and an activity flag to indicate it was in the middle of performing a scrubbing operation. In this way, upon power-on, the scrubbing operation may be resumed if after power-up, the activity flag is found [0044-0045]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified data stored in the system as taught by Cunningham-Chu-Proulx-Goss-Kund to include the activity flag and up to which block the scrubbing operation had been performed on blocks, so that if in response to power up, (if another scrubbing operation for all the blocks was not scheduled as taught by Chu) and the previous scrubbing operation was not complete, the scrubbing operation may be resumed and completed as taught by Syu.
One of ordinary skill in the art would have been motivated to make this modification because it is desirable for the system to continue a scrubbing (refreshing/folding) that may be interrupted by power off, and allows unfinished operations to be finished before anything else as taught by Syu in [0044-0046].
Regarding claim 7 and analogous claim 14:
The memory sub-system of claim 6 is made obvious by Cunningham-Chu-Proulx-Goss-Kund in further view of Syu.
Cunningham does not explicitly disclose, but Syu teaches, further comprising: responsive to determining the folding operation has not previously been initiated, performing a subsequent memory operation on the memory device (by teaching that before power-off, a system may record up to which block a scrubbing (folding/refreshing) operation has been performed and an activity flag to indicate it was in the middle of performing a scrubbing operation. In this way, upon power-on, the scrubbing operation may be resumed if after power-up, the activity flag is found, where if an activity flag is not found, scrubbing is not resumed and the system continues to operate by performing other operations [0044-0045]).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified data stored in the system as taught by Cunningham-Chu-Proulx-Goss-Kund to include the activity flag and up to which block the scrubbing operation had been performed on blocks, so that if in response to power up, (if another scrubbing operation for all the blocks was not scheduled as taught by Chu) and the previous scrubbing operation was not complete, the scrubbing operation may be resumed and completed, but if not scrubbing operation was in progress, to continue booting and performing other operations as taught by Syu.
One of ordinary skill in the art would have been motivated to make this modification because it is desirable for the system to continue a scrubbing (refreshing/folding) that may be interrupted by power off, and allows unfinished operations to be finished before anything else as taught by Syu in [0044-0046].
Response to Arguments/Amendments
In response to the amendments to the claims, the previous claim objections have been withdrawn.
In response to the amendments to the claims, a new 35 USC §103 rejection has been made including new combinations of references. The new combinations of references additionally include Cunningham and Goss. Cunningham provides an environment where one of ordinary skill in the art, applying the teachings of Chu in view of Proulx, would be motivated to write pre-programmed reference data during production of the memory sub-system to protect the production and reference data written during manufacturing as taught by Cunningham. The data written during the manufacturing phase as taught by Cunningham may be protected according to the refresh method taught by Chu based on the off time as determined according to the pSLC scan method taught by Proulx as motivated by Goss. The pSLC scan method requires reading data that was written before the memory device was powered off, such as reading data written during manufacturing as taught by Cunningham because the storage device may be powered on initially after manufacturing and read the production and reference data, in which is it important not to have errors or else the system may suffer a destructive failure as taught by Cunningham, which may be addressed with a refresh method as taught by Chu according to an off-time determination taught by Proulx as motivated by Goss. Accordingly, Applicant’s arguments against the previous combination of references is not persuasive and the claims are not indicated as allowable.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US Patent Application Publication No. US 2013/0055046 A1 (Blodgett) – teaches that blocks can be marked for refresh after they have reached a retention time so that if power is lost, the device can resume refreshing blocks already marked for refresh [0035-0038].
US Patent Application Publication No. US 2014/0310445 A1 (Fitzpatrick) – teaches to refresh blocks based on a decay estimation after a power down time and temperature is estimated, where the decay estimation is based on a change in read voltages thresholds [Fig. 7] [0033] [0065-0067] [0076-0104].
US Patent Application Publication No. US 2021/0257041 A1 (Kim) – teaches that after a threshold time of being shut down, a storage controller should be powered up to refresh the data stored on the solid state drive [Fig. 4].
US Patent Application Publication No. US 2017/0345489 A1 (Zeng) – teaches to determine a power-off time from a threshold voltage shift [0068-0072].
US Patent Application Publication No. US 2015/0169398 A1 (Chunn) – teaches that a frequency of a scrub operation may be changed after determining a power-off time [Fig. 7] [0004] [0034-0035].
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CURTIS JAMES KORTMAN whose telephone number is (303)297-4404. The examiner can normally be reached Monday through Friday 7:30 AM through 4:00 PM MT.
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/CURTIS JAMES KORTMAN/Primary Examiner, Art Unit 2139