Prosecution Insights
Last updated: October 02, 2026
Application No. 18/935,248

HIGH-PERFORMANCE INPUT-OUTPUT DEVICES SUPPORTING SCALABLE VIRTUALIZATION

Final Rejection §DP
Filed
Nov 01, 2024
Priority
May 02, 2017 — continuation of 10/228,981 +3 more
Examiner
TRAN, JIMMY H
Art Unit
2451
Tech Center
2400 — Computer Networks
Assignee
Intel Corporation
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
11m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
566 granted / 712 resolved
+21.5% vs TC avg
Strong +17% interview lift
Without
With
+17.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
25 currently pending
Career history
733
Total Applications
across all art units

Statute-Specific Performance

§101
5.5%
-34.5% vs TC avg
§103
61.0%
+21.0% vs TC avg
§102
12.6%
-27.4% vs TC avg
§112
9.8%
-30.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 712 resolved cases

Office Action

§DP
DETAILED ACTION This action is in response to communication filed on 6/8/2026. Claims 39, 47, 55 are pending. Claims 39, 47, and 55 have been amended. Claims 40-46, 48-54, 56-57 have been cancelled. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s amendments, filed 6/8/2026, with respect to the 101 rejection(s) of claim(s) 39 and 55 have been fully considered and are persuasive. Therefore, the rejection regarding 101 has been withdrawn. The rejection regarding non-statutory obviousness-type double patent as being being unpatentable over claim 1-18 of U.S. Patent No. 12,164,971 (hereafter ‘971) in view of Kjos (US 2008/0005297) remains pending. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claim 39, 47, and 55 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1-18 of U.S. Patent No. 12,164,971 (hereafter ‘971) in view of Kjos (US 2008/0005297). Regarding claim 39, obvious over ‘971 claim 13 in view of Kjos, a machine-readable medium having program code stored thereon which, when executed by one or more processors, cause the one or more processors to perform operations to provide scalable virtualization of an input/output (IO) device, the operations comprising: storing, in one or more base address registers (BARs), base addresses corresponding to address ranges, the one or more BARs configured to store a corresponding one or more base addresses of a configurable size to provide scalability (‘971 Claim 13 teaches storing base addresses in BARs for address ranges mapped to MMIO registers, but lacks explicitly configurability for scalability. Kjos discloses storing base addresses in BARs corresponding to address ranges (MMIO ranges), with configurable size (via mask/write-read to determine size), providing scalability by allowing variable MMIO region sizes in virtualized I/O; [0026] “When the guest programs the base MMIO address for a device into a PCI Configuration Base Address Register (BAR), the PCI Configuration Driver 214 tracks the guest's settings but does not modify the actual BAR settings in hardware. When the guest attempts to access the MMIO address range for the first time, the Virtual I/O Map Driver 218 attempts to find the device associated with the given GPA and, upon finding the value in a virtual BAR register, creates a mapping between the guest's address and the value in the physical BAR register of the device” and [0057] “The BAR registers returned contain a mask indicating what is obtained by writing 0xFFFFFFFF to the registers and reading back responses, returning to the caller the size of the BARs but not the actual physical address programmed in the BAR”. Obvious to modify ‘971 for scalable BARs to handle variable guest needs); allocating the one or more base addresses to one or more memory-mapped input/output (MMIO) registers to be associated with one or more assignable interface (AI) instances of an input-output (I/O) device, the one or more Al instances to expose a corresponding one or more virtual devices to one or more guests of a plurality of guests, wherein access by the one or more guests to the one or more virtual devices is to be managed via the corresponding one or more Al instances, and wherein each Al instance of the one or more Al instances is to be associated with a guest based, at least in part, on a requester ID and a PASID value corresponding to the guest (‘971 Claim 13 teaches allocating to MMIO registers for direct/intercepted operations mapped to a virtual device interface. Kjos strengthens management via instances; [0026] “When the guest programs the base MMIO address for a device into a PCI Configuration Base Address Register (BAR), the PCI Configuration Driver 214 tracks the guest's settings”. For AI instances exposing virtual devices, ‘971 interface is equivalent; for requesters ID/PASID association, Kjos uses device IDs for guest association; [0089] “For a PCI Configuration Access, the first interactions the guest has with the direct I/O device are PCI Configuration accesses”. Obvious to use ID-based association for guest management in ‘971s virtualization); isolating the plurality of guests based on corresponding requester IDs and process address space identifier (PASID) values associated with the plurality of guests, wherein interrupt data structures are to be generated to manage interrupts generated by the one or more guests, the interrupts to be associated with the corresponding PASIDs (‘971 lacks explicitly isolation/interrupts with PASID. Kjos teaches isolation via guest-specification mappings; [0029] “The virtual machine direct I/O driver handles interrupts generated by a direct I/O device by sending a message to the VMM 210 which can invoke the interrupt controller emulation software to deliver the interrupt to the guest”. Obvious to add for secure guest separation in ‘971); and configuring one or more mailbox registers to exchange messages between a host and the plurality of guests (‘971 lacks, but Kjos teaches message-passing protocol; [0016] “The virtual machine monitor 106 and host 110 interact via a pseudo-device driver, called the VMM driver 116 using a message-passing protocol”. Obvious to configure for communication in ‘971’s host-guest setup). Regarding claim(s) 47, obvious over ‘971 claim 1 in view of Kjos. Maps similar to claim 39, with system elementals (memory, controller, I/O interconnect) generic in ‘971 (implied in I/O virtualization hardware). Obvious for same reason. Regarding claim(s) 55, obvious over ‘971 claim 13 in view of Kjos. Maps similar to claim 39, with “composing” instead of “allocating” (obvious variation per ‘971 mapping to virtual device interface). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. For the reason above, claims 39, 47, and 55 have been rejected and remain pending. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JIMMY H TRAN whose telephone number is (571)270-5638. The examiner can normally be reached Monday-Friday 9am-5pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chris Parry can be reached at 571-272-8328. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JIMMY H TRAN Primary Examiner Art Unit 2451 /JIMMY H TRAN/Primary Examiner, Art Unit 2451
Read full office action

Prosecution Timeline

Nov 01, 2024
Application Filed
Apr 15, 2025
Response after Non-Final Action
Mar 06, 2026
Non-Final Rejection mailed — §DP
Jun 08, 2026
Response Filed
Aug 25, 2026
Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
97%
With Interview (+17.2%)
2y 10m (~11m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 712 resolved cases by this examiner. Grant probability derived from career allowance rate.

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