Prosecution Insights
Last updated: August 17, 2026
Application No. 18/935,914

EFFICIENCY-IMPROVED BACKGROUND MEDIA SCAN MANAGEMENT OF NON-VOLATILE MEMORY DEVICES

Final Rejection §112
Filed
Nov 04, 2024
Priority
Dec 04, 2023 — provisional 63/605,711
Examiner
KORTMAN, CURTIS JAMES
Art Unit
2139
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology Inc.
OA Round
4 (Final)
79%
Grant Probability
Favorable
5-6
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
177 granted / 224 resolved
+24.0% vs TC avg
Strong +24% interview lift
Without
With
+23.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
23 currently pending
Career history
243
Total Applications
across all art units

Statute-Specific Performance

§101
8.8%
-31.2% vs TC avg
§103
45.6%
+5.6% vs TC avg
§102
7.7%
-32.3% vs TC avg
§112
32.8%
-7.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 224 resolved cases

Office Action

§112
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 3-4, 6, 8-13, and 15-19 are objected to because of the following informalities: Claim 3 recites, “writing refresh data”, and “to one or more erased blocks” which as best understood by the Examiner in light of the specification should be amended to recite, “writing the refresh data” and “to the one or more erased blocks” as the limitations are previously introduced in claim 2. Claim 4 recites, “of each respective block of the memory cells”, which as best understood by the Examiner in light of the specification should be amended to recite, “of each respective block of the one or more blocks of the memory cells”. Claim 6 recites, “the refresh”, which as best understood by the Examiner, would be more logical if claim 1 recited “determining that the one or more blocks qualify for the refresh”. Claim 8 recites, “one or more blocks, of the plurality of blocks of memory cells”, which as best understood by the Examiner in light of the specification should be amended to recite, “the one or more blocks, of the plurality of blocks of memory cells” and then harmonized with the previous recitation of “the one or more blocks” for proper antecedent basis. Claim 8 recites, “the one or more indicators”, which as best understood by the Examiner in light of the specification should be amended to recite, “the Claim 10 recites, “writing refresh data”, and “to one or more erased blocks” which as best understood by the Examiner in light of the specification should be amended to recite, “writing the refresh data” and “to the one or more erased blocks” as the limitations are previously introduced in claim 9. Claim 11 recites, “of each respective block of memory”, which as best understood by the Examiner in light of the specification should be amended to recite, “of each respective block of the one or more blocks of the memory cells”. Claim 12 recites, “the one or more indicators”, which as best understood by the Examiner in light of the specification should be harmonized with the other recitations of “the indicators” or “the one or more indicators” in claim 9. Claim 13 recites, “wherein the signal further includes at least one of a number of indicators that remain in the queue: or a flag…” which as best understood by the Examiner in light of the specification should be amended to recite, “wherein the signal further includes Claim 13 also recites, “the refresh”, which as best understood by the Examiner, would be more logical if claim 8 recited “the indicators correspond to one or more blocks, of the plurality of blocks of memory cells, which qualified for the refresh”. Claim 15 recites, “one or more blocks, of the plurality of blocks of memory cells”, which as best understood by the Examiner in light of the specification should be amended to recite, “the one or more blocks, of the plurality of blocks of memory cells” and then harmonized with the previous recitation of “the one or more blocks” for proper antecedent basis. Claim 15 recites, “the one or more indicators”, which as best understood by the Examiner in light of the specification should be amended to recite, “the Claim 17 recites, “of each respective block of memory”, which as best understood by the Examiner in light of the specification should be amended to recite, “of each respective block of the one or more blocks of the memory cells”. Claim 18 recites, “the one or more indicators”, which as best understood by the Examiner in light of the specification should be harmonized with the other recitations of “the indicators” or “the one or more indicators” in claim 15. Claim 19 also recites, “the refresh”, which as best understood by the Examiner, would be more logical if claim 15 recited “the indicators correspond to one or more blocks, of the plurality of blocks of memory cells, which qualified for the refresh”. Claims 9-13 and 16-19 are objected to for failing to correct the deficiencies of a base claim from which they depend. Appropriate correction is required. Claim Rejections - 35 USC § 112(b) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-6, 8-13 and 15-19 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1: Claim 1 recites, “the one or more sampling background scans”. However, the antecedent basis is unclear because the claim previously recites “one or more sampling background scans” that have already been used to qualify blocks for refresh, and later claims “performing one or more sampling background scans” to qualify blocks for refresh. It is therefore unclear which sampling background scans “the one or more sampling background scans” is referring to. The Examiner suggests fixing the tense of the limitations to indicate the queue stores indicators for one or more blocks of memory cells that “qualify for refresh based on one or more sampling background scans of the one or more blocks” and then reciting that the processing device is performing “the one or more sampling background scans of the one or more blocks” such that the later recitation of “the one or more sampling background scans” can logically refer back to both limitations. Regarding claim 2 and analogous claims 9 and 16: Claim 2 recites, “the refresh data” and “the one or more erased blocks”. However, there is insufficient antecedent basis for this limitation in the claim. Accordingly, the scope of the claim cannot be determined and the claim is indefinite. Claims 9 and 16 recite limitations analogous to claim 2 and are rejected according to a similar analysis. Regarding claim 4 and analogous claims 11 and 17: Claim 4 recites, “determining, based on the representative error rate for each respective block, that the one or more blocks qualify for refresh”. However, claim 1 already recites determining that “the one or more blocks qualify for refresh” based on “the total bytes written” attribute of the “SMART data”. Accordingly, it is unclear whether claim 4 replaces, supplements, or modifies the determination recited in claim 1 and therefore the scope of the claim cannot be determined and the claim is indefinite. Claims 11 and 17 recite limitations analogous to claim 4 and are rejected according to a similar analysis. Regarding claim 8 and analogous claim 15: Claim 8 recites, “the one or more blocks”, however, there is insufficient antecedent basis for this limitation in the claim and accordingly, the scope of the claim cannot be determined and the claim is indefinite. Claim 15 recites limitations analogous to claim 8 and is rejected according to a similar analysis. Regarding claim 9 and analogous claim 16: Claim 9 recites, “the one or more blocks”. However, claim 8 recites “the one or more blocks” and then recites “one or more blocks, of the plurality of blocks of memory cells”. It is therefore unclear which recitation of “one or more blocks” the limitation in claim 9 is meant to refer back to and the antecedent basis of the limitation is unclear the scope of the claim cannot be determined and the claim is indefinite. Claim 16 recites limitations analogous to claim 9 and is rejected according to a similar analysis. Regarding claim 11 and analogous claim 17: Claim 11 recites, “the one or more sampling background scans of the one or more blocks”. However, there is insufficient antecedent basis for this limitation in the claim. Claim 9 only previously recites, “one or more sampling background scans of a plurality of blocks” (emphasis added) or “one or more sampling background scans”, generically, and therefore cannot provide antecedent basis for the limitation recited in claim 11. Claim 11 also recites, “the one or more blocks”, which has unclear antecedent basis according to analogous reasoning provided for claim 9. Claim 11 also recites, “the one or more blocks of memory”. However, claims 9 and 11 previously refer to “a plurality of blocks of memory cells of the IC memory”, “one or more blocks, of the plurality of blocks of memory cells”, or “one or more blocks”, and accordingly, the limitation “the one or more blocks of memory” in claim 11 lacks clear antecedent basis and the scope of the claim cannot be determined and the claim is indefinite. Claim 17 recites limitations analogous to those identified in claim 11 above and accordingly is rejected according to a similar analysis. Regarding claim 12 and analogous claim 18: Claim 12 recites, “the one or more blocks”, which has unclear antecedent basis according to analogous reasoning provided for claim 9. Claim 18 recites limitations analogous to those identified in claim 12 above and accordingly is rejected according to a similar analysis. Regarding claims 2-6, 9-13 and 16-19: Claims 2-6, 9-13 and 16-19 are rejected for failing to cure the deficiencies of a rejected base claim from which they depend. Response to Arguments/Amendments In response to the amendments to the claims, claim objections have been made as seen in the corresponding rejection section above. In response to the amendments to the claims, new 35 USC §112(b) rejections have been made as seen in the corresponding rejection section above. In response to the amendments to the claims, the 35 USC §103 rejection has been withdrawn. All of the previously cited prior art does not discuss TBW and accordingly does not render obvious “performing one or more sampling background scans of the one or more blocks; determining that the one or more blocks qualify for refresh based on at least one attribute of self-monitoring analysis and reporting technology (S.M.A.R. T.) data obtained from the one or more sampling background scans, wherein the at least one attribute comprises total bytes written” as recited in combination with the other limitations in representative claim 1. Accordingly, the previously cited prior art does not render obvious the claims as amended. US Patent Application Publication No. US 2014/0173268 A1 (Hashimoto) – teaches using a total logical sectors written statistical information X07 from SMART information [0237] [0293], which may be used with a threshold RMax to determine if the memory system is at the end of its life [0294-0301]. If so, end of life processing may be performed. However, the end of life processing that is performed is to end refresh operations [0348]. Furthermore, logical sectors written is not the same as total bytes written TBW attribute. Therefore, since it is not used to determine that blocks qualify for refresh, but to end refresh operations at the end of a memory device’s lifespan and is not the same metric as TBW, Hashimoto in combination with the other references does not render obvious the limitation identified above in combination with the other limitations of the claim. US Patent Application Publication No. US 2017/0131948 A1 (Hoang) – teaches that TBW may be an attribute among a plurality of SMART attributes [0138] [0148]. However, the attribute is not used to determine blocks that qualify for refresh. Accordingly, Hoang in combination with the other references does not render obvious the limitation identified above in combination with the other limitations of the claim. Subject Matter Free From Prior Art Claims 1-6, 8-13 and 15-19 are not rejected with prior art for the reasons indicated above. However, claims 1-6, 8-13 and 15-19 are not indicated as allowable due to the outstanding 35 USC §112(b) rejections and claim objections. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CURTIS whose telephone number is (303)297-4404. The examiner can normally be reached Monday through Friday 7:30 AM through 4:00 PM MT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CURTIS JAMES KORTMAN/Primary Examiner, Art Unit 2139
Read full office action

Prosecution Timeline

Show 9 earlier events
Apr 13, 2026
Response after Non-Final Action
Apr 23, 2026
Request for Continued Examination
Apr 28, 2026
Response after Non-Final Action
May 04, 2026
Non-Final Rejection mailed — §112
Jul 08, 2026
Applicant Interview (Telephonic)
Jul 08, 2026
Examiner Interview Summary
Jul 09, 2026
Response Filed
Jul 28, 2026
Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

5-6
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+23.7%)
2y 2m (~5m remaining)
Median Time to Grant
High
PTA Risk
Based on 224 resolved cases by this examiner. Grant probability derived from career allowance rate.

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