Prosecution Insights
Last updated: April 19, 2026
Application No. 18/937,120

Efficient Switching Circuit

Non-Final OA §DP
Filed
Nov 05, 2024
Examiner
HILTUNEN, THOMAS J
Art Unit
2849
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Solaredge Technologies Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
87%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
1003 granted / 1235 resolved
+13.2% vs TC avg
Moderate +6% lift
Without
With
+6.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
30 currently pending
Career history
1265
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
44.4%
+4.4% vs TC avg
§102
39.7%
-0.3% vs TC avg
§112
10.9%
-29.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1235 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 11 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim 10 of U.S. Patent No. 11,374,562 (‘562 hereinafter). Although the claims at issue are not identical, they are not patentably distinct from each other because claim 10 of ‘562 essentially recites all of the limitations of claim 1 of the instant application. However, claim 10 does not explicitly state that “turning, at a second time later than the first time, the plurality of first transistors of the first leg from an off state to an ON state” (Examiner’s emphasis) and “turning, at a fourth time later than the third time, the second transistor of the second leg from the ON state to the OFF state” (Examiner’s emphasis). For instance, claim 10 of the instant application fails to explicitly disclose that that the first leg is turned on after the second leg and the first leg is turned off before the second leg. However, claim 10 of ‘562 implies that the transistors may be turned on as recited in claim 1 of the instant application, since claim 10 of ‘562 states “transition the apparatus from a non-conduction period to a conduction period by turning the first transistor of the second leg from an OFF state to an ON state and turning the plurality of transistors of the first leg from an OFF state to an ON state; and transition the apparatus from the conduction period to the non-conduction period by turning the plurality of transistors of the first leg from the ON state to the OFF state and turning the first transistor of the second leg from the ON state to the OFF state” which suggests the possibility of the activation and deactivation of the first and second legs at any desired timing including the timing as recited in claim 1 of the instant application. Furthermore, Fig. 3 of ‘567 suggests such a timing of the activation of the transistors as recited in claim 1 of the instant application. While claim 10 of ‘567 fails to explicitly disclose the explicit timing as recited in claim 1 of the instant application. It would have been obvious to time the activation of the transistors of the first and second legs of claim 10 of ‘567 such that the first leg is turned on after the second leg and the first leg is turned off before the second leg, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). One would have been motivated to set the timing of activation at the desired time points for the purpose of having a desired activation timing of the switched circuit. With respect to claim 11, claim 11 merely recites the method of constructing/operating the circuit as recited in claim 1. Thus, claim 11 is rejected for similar reasons as discussed above with claim 1, since it would have been obvious to perform the method of claim 11 using the circuit as recited in claim 10 of ‘567, as modified above, since the circuit is connected and operative such that it will perform the method steps of claim 11. Allowable Subject Matter Claims 2-10 and 12-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Thomas J. Hiltunen whose telephone number is (571)272-5525. The examiner can normally be reached 9:00AM-5:30PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS J. HILTUNEN/Primary Examiner, Art Unit 2849
Read full office action

Prosecution Timeline

Nov 05, 2024
Application Filed
Jan 23, 2026
Non-Final Rejection — §DP
Apr 06, 2026
Response Filed

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
87%
With Interview (+6.0%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1235 resolved cases by this examiner. Grant probability derived from career allow rate.

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