Prosecution Insights
Last updated: August 17, 2026
Application No. 18/937,255

SOURCE DRIVER, DISPLAY DRIVING DEVICE, AND DISPLAY DEVICE INCLUDING THE DISPLAY DRIVING DEVICE

Non-Final OA §102§103
Filed
Nov 05, 2024
Priority
Nov 28, 2023 — RE 10-2023-0167884 +1 more
Examiner
LAM, NELSON C
Art Unit
2627
Tech Center
2600 — Communications
Assignee
Samsung Electronics Co., Ltd.
OA Round
3 (Non-Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
1y 6m
Est. Remaining
70%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
415 granted / 688 resolved
-1.7% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
24 currently pending
Career history
721
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
58.4%
+18.4% vs TC avg
§102
22.8%
-17.2% vs TC avg
§112
15.8%
-24.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 688 resolved cases

Office Action

§102 §103
DETAILED ACTION Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/14/2026 has been entered. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ichikura (US 20230034077). As per claim 1, Ichikura discloses a display driving device (Fig. 1; [0033]) comprising: a source driver (#13) configured to output a data signal obtained by amplifying an input signal (#V1) to a source line (#S1) in a first period (Fig. 2, #LOAD; [0038]; [0041]; [0049]), and, in a second period (#t1) different from the first period (#LOAD), receive a detection signal (#GV1) from the source line (#S1) and output a comparison result signal (#f1) based on a comparison between the detection signal (#GV1) and the input signal (#V1) supplied during the second period (#t1; [0050]; [0055]-[0060]; [0066]-[0067]); and a driving controller (#1330) configured to determine at least one of a load or a defect of the source line (#S1) based on a timing at which a level of the comparison result signal (#f1) transitions in the second period (Fig. 5, #t1; [0064]-[0067]; [0076]-[0077]). As per claim 12, Ichikura discloses a display device (Fig. 1, #100; [0033]) comprising: a panel (#20) including a plurality of pixels (#PC) and a plurality of source lines (#S1-Sn) connected to the plurality of pixels (#PC; [0035]); and a display driving circuit (Fig. 3, #13) including an amplifier region (#133) and a driving controller (#1330; [0040]; [0048]), the amplifier region (#133) comprising an amplifier (#AM1) and being configured to transmit a plurality of data signals to the plurality of source lines (#S1-Sn) in a first period (Fig. 2, #LOAD; [0038]; [0041]; [0049]), and, in a second period (#t1) different from the first period (#LOAD), receive a plurality of detection signals (#GV1-GVn) from the plurality of source lines (#S1-Sn) and output a plurality of comparison result signals (#f1-fj) by comparing the plurality of detection signals (#GV1-GVn) and an input signal (#V1-Vn) supplied during the second period (#t1; [0050]; [0055]-[0060]; [0066]-[0067]); and the driving controller (#1330) being configured to, for each of the plurality of comparison result signals (#f1-fj), determine at least one of a load or a defect of a corresponding source line of the plurality of source lines (#S1-Sn) based on a timing at which a level of a comparison result signal transitions in the second period (Fig. 5, #t1; [0064]-[0067]; [0076]-[0077]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-3, 5-6, 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikura in view of Lin (US 20180226009). As per claim 2, Ichikura discloses the display driving device of claim 1, wherein the source driver (#13) comprises: an amplifier region (Fig. 3, #133) comprising an amplifier (#AM1), the amplifier region (#133) being configured to amplify the input signal to output the data signal in the first period (Fig. 2, #LOAD; [0038]; [0041]; [0049]), and compare the input signal and the detection signal to output the comparison result signal in the second period (#t1; [0055]-[0060]; [0066]-[0067]). However, Ichikura does not explicitly teach a digital-to-analog converter configured to output the input signal based on data received from the driving controller. Lin teaches a digital-to-analog converter configured to output the input signal based on data received from the driving controller ([0031]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the digital-to-analog converter disclosed by Lin to the source driver of Ichikura so that the source driver may perform a digital-to-analog conversion on pixel data to generate source voltages (Lin: [0031]). As per claims 3 and 5, Ichikura in view of Lin discloses the display driving device of claim 2 except for the first period is a period of one horizontal period or less, wherein the first period is a period of two horizontal periods or greater. Official Notice is taken that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the first period is a period of one horizontal period or less, wherein the first period is a period of two horizontal periods or greater since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. As per claim 6, Ichikura in view of Lin discloses the display driving device of claim 5, wherein the driving controller is further configured to change the data multiple times in the second period, and detect the defect in the source line based on data, among the data changed multiple times, related to the timing at which the level of the comparison result signal transitions in the second period (Ichikura: [0064]-[0067]; [0076]-[0077]), As per claim 16, Ichikura in view of Lin discloses the display device of claim 12, wherein the amplifier region is further configured to, in the first period, transmit a data signal of a first level to a first data line among a plurality of data lines (Lin: [0031]), and a data signal of a second level different from the first level to a second data line adjacent to the first data line among the plurality of data lines (Lin: [0031]-[0032]). As per claim 18, Ichikura in view of Lin discloses the display device of claim 12, wherein the driving controller is further configured to determine a short defect of the corresponding source line (Ichikura: [0066]-[0067]). However, Ichikura in view of Lin do not teach the first period is a period of two horizontal periods or greater. Official Notice is taken that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the first period is a period of two horizontal periods or greater since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claims 11 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikura in view of Lin in view of Kong (US 20170287429). As per claim 11, Ichikura in view of Lin discloses the display driving device of claim 2. However, Ichikura in view of Lin do not teach the source driver further includes a switch circuit configured to, based on a level of a selection signal, selectively connect an output terminal of the amplifier region to the source line in the first period and disconnect the output terminal of the amplifier region from the source line in the second period. Kong teaches the source driver (Figs. 3A-3B, #300a) further includes a switch circuit configured to, based on a level of a selection signal, selectively connect an output terminal of the amplifier region to the source line in the first period and disconnect the output terminal of the amplifier region from the source line in the second period ([0054]-[0055]; [0067]; [0083]-[0088]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the switch circuit disclosed by Kong to the source driver of Ichikura in view of Lin so as to determine operation states of the first channel amplifier and the second channel amplifier based on a comparison result, before a first horizontal period in which the first pixel and the second pixel are driven (Kong: [0005]). As per claim 19, Ichikura discloses a source driver (Fig. 1, #13; [0034]) comprising: an amplifier region (Fig. 3, #133) including an amplifier (#AM1), the amplifier region (#133) being configured to amplify the input signal (#V1) to output a data signal in a first period (Fig. 2, #LOAD; [0038]; [0041]; [0049]), and, in a second period (#t1) after the first period (#LOAD), compare the input signal (#V1) supplied during the second period (#t1) and a detection signal (#GV1) received from a source line (#S1) to output a comparison result signal (#f1; [0050]; [0055]-[0060]; [0066]-[0067]); and wherein at least one of a load or a defect of the source line (#S1) is determined based on a timing at which a level of the comparison result signal (#f1) transitions in the second period (Fig. 5, #t1; [0064]-[0067]; [0076]-[0077]). However, Ichikura does not explicitly teach a digital-to-analog converter configured to output an input signal based on input data. Lin teaches a digital-to-analog converter configured to output an input signal based on input data ([0031]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the digital-to-analog converter disclosed by Lin to the source driver of Ichikura so that the source driver may perform a digital-to-analog conversion on pixel data to generate source voltages (Lin: [0031]). However, Ichikura in view of Lin do not teach a switch circuit configured to, based on a level of a first selection signal, selectively connect an output terminal of the amplifier region to the source line in the first period and selectively disconnect the output terminal of the amplifier region from the source line in the second period. Kong teaches a switch circuit configured to, based on a level of a first selection signal, selectively connect an output terminal of the amplifier region to the source line in the first period and selectively disconnect the output terminal of the amplifier region from the source line in the second period ([0054]-[0055]; [0067]; [0083]-[0088]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the switch circuit disclosed by Kong to the source driver of Ichikura in view of Lin so as to determine operation states of the first channel amplifier and the second channel amplifier based on a comparison result, before a first horizontal period in which the first pixel and the second pixel are driven (Kong: [0005]). Claims 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikura in view of Jeong (US 20220189374). As per claim 13, Ichikura discloses the display device of claim 12. However, Ichikura does not teach the display driving circuit further includes a gamma voltage generator configured to output the input signal in the second period. Jeong teaches the display driving circuit further includes a gamma voltage generator (Fig. 1, #130) configured to output the input signal in the period ([0028]-[0029]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the gamma voltage generator disclosed by Jeong to the display device of Ichikura so as to provide gamma reference voltages corresponding to different colors, respectively, during the second period. As per claim 14, Ichikura in view of Jeong discloses the display device of claim 13, wherein the gamma voltage generator is further configured to change a level of the input signal in the second period (Jeong: [0029]). Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Ichikura in view of Lee (US 20060221035). As per claim 17, Ichikura discloses the display device of claim 12. However, Ichikura does not teach the driving controller is further configured to determine a magnitude of the load of the corresponding source line. Lee teaches to determine a magnitude of the load of the corresponding source line ([0037]-[0038]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the driving controller of Ichikura configured according to Lee so as to provide a pulse for measuring the load of the data line to any one of the data lines (Lee: [0041]). However, Ichikura in view of Lee do not teach the first period is a period of one horizontal period or less. Official Notice is taken that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the first period is a period of one horizontal period or less since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Allowable Subject Matter Claims 4, 7-10, 15 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art of a display driving device comprising a source driver configured to output a data signal obtained by amplifying an input signal to a source line in a first period, and in a second period different from the first period, receive a detection signal from the source line and output a comparison result signal based on a comparison between the detection signal and the input signal does not teach or fairly suggest the driving controller is further configured to change the data multiple times in the second period, and determine a magnitude of the load of the source line based on data, among the data changed multiple times, related to the timing at which the level of the comparison result signal transitions in the second period, wherein the source driver is further configured to output a first data signal obtained by amplifying a first input signal to a first source line adjacent to the source line in the first period, the first input signal being different from the input signal, and in the second period, receive a first detection signal from the first source line and output a first comparison result signal by comparing the first detection signal and the first input signal, and wherein the driving controller is further configured to detect a short between the source line and the first source line based on the comparison result signal and the first comparison result signal, wherein the source driver further includes a ramp signal generator configured to provide a ramp signal that increases or decreases with a constant slope as the input signal in the second period, a ramp signal generator configured to provide a ramp signal that increases or decreases with a constant slope as the input signal in the second period, and a multiplexer circuit configured to, based on a level of a second selection signal, selectively connect an input terminal of the amplifier region to the digital-to-analog converter in the first period and selectively connect the input terminal of the amplifier region to the ramp signal generator in the second period. Response to Arguments Applicant’s arguments with respect to claims 1, 12 and 19 have been considered but are moot because of the new grounds of rejection as presented above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Nelson Lam/Examiner, Art Unit 2627 /KE XIAO/Supervisory Patent Examiner, Art Unit 2627
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Prosecution Timeline

Show 4 earlier events
Dec 17, 2025
Response Filed
Mar 12, 2026
Final Rejection mailed — §102, §103
Mar 31, 2026
Applicant Interview (Telephonic)
Apr 01, 2026
Examiner Interview Summary
Apr 14, 2026
Response after Non-Final Action
May 27, 2026
Request for Continued Examination
Jun 01, 2026
Response after Non-Final Action
Jul 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
70%
With Interview (+9.2%)
3y 4m (~1y 6m remaining)
Median Time to Grant
High
PTA Risk
Based on 688 resolved cases by this examiner. Grant probability derived from career allowance rate.

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