Prosecution Insights
Last updated: July 17, 2026
Application No. 18/937,286

MULTILAYER CERAMIC CAPACITOR AND METHOD FOR MANUFACTURING MULTILAYER CERAMIC CAPACITOR

Non-Final OA §102§103§112
Filed
Nov 05, 2024
Priority
Jul 22, 2022 — JP 2022-117487 +1 more
Examiner
TORRES, TIMOTHY JOSEPH
Art Unit
Tech Center
Assignee
Murata Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-60.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
11 currently pending
Career history
6
Total Applications
across all art units

Statute-Specific Performance

§103
70.0%
+30.0% vs TC avg
§102
25.0%
-15.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Es2 (mentioned in paras. [0066], [0067] and [0080]). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 29 (seen in Figs. 6-10). Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections Claim(s) 1-19 is/are objected to because of the following informalities: In claim 1, “a plurality of stacked dielectric layers” is introduced and later referred to as “the plurality of dielectric layers”. This technically creates a lack of sufficient antecedent basis. Claims 2-9 are objected to as they depend on claim 1. In claim 1, “a plurality of stacked internal electrode layers” is introduced and later referred to as “the plurality of internal electrode layers”. This technically creates a lack of sufficient antecedent basis. Claims 2-9 are objected to as they depend on claim 1. In claim 10, “a plurality of stacked dielectric layers” is introduced and later referred to as “the plurality of dielectric layers”. This technically creates a lack of sufficient antecedent basis. Claims 11-18 are objected to as they depend on claim 10. In claim 10, “a plurality of stacked internal electrode layers” is introduced and later referred to as “the plurality of internal electrode layers”. This technically creates a lack of sufficient antecedent basis. Claims 11-18 are objected to as they depend on claim 10. In claim 19, “a dielectric layers” is introduced and later referred to as “the dielectric layer”. This technically creates a lack of sufficient antecedent basis. Appropriate correction is required. Claim Rejections - 35 USC § 112 Claims 5-8 and 14-17 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 5, it is indefinite where the portions that do not include a rare earth oxide are located. Specifically, “…along a length direction…” could be interpreted as the LH or WH portion of Fig. 8. For purposes of examination, the portion that does not include a rare earth oxide is being interpreted as portion LH of Fig. 8. This interpretation is based on para. [0078] of the present disclosure. The examiner suggests to use wording similar to para. [0078] to clearly claim where the portion that does not include a rare earth oxide is located. Regarding claim 6, it is indefinite where the portions that do not include a rare earth oxide are located for the reasons described above. Furthermore, “…a dimension…” may be interpreted as referring to a distance, area, or volume. For purposes of examination, “…a dimension” is being interpreted as the length of portion LH. This interpretation is based on para. [0078] of the present disclosure. Regarding claim 7, it is indefinite where the portions that do not include a rare earth oxide are located. Specifically, “…along a direction orthogonal or substantially orthogonal to the width direction…” (i.e., length or height direction) could be interpreted as the LH or WH portion of Fig. 8. For purposes of examination, the portion that does not include rare earth oxide is being interpreted as portion LW of Fig. 8. This interpretation is based on para. [0078] of the present disclosure. The examiner suggests to use wording similar to para. [0078] to clearly claim where the portion that does not include rare earth oxide is located. Regarding claim 8, it is indefinite where the portions that do not include a rare earth oxide are located for the reasons described above. Furthermore, “…a dimension…” may be interpreted as referring to a distance, area, or volume. For purposes of examination, “…a dimension” is being interpreted as the length of portion LW. This interpretation is based on para. [0078] of the present disclosure. Regarding claim 14, it is indefinite where the portions that do not include a rare earth oxide are located. Specifically, “…along a length direction…” could be interpreted as the LH or WH portion of Fig. 8. For purposes of examination, the portion that does not include rare earth oxide is being interpreted as portion LH of Fig. 8. This interpretation is based on para. [0078] of the present disclosure. The examiner suggests to use wording similar to para. [0078] to clearly claim where the portion that does not include rare earth oxide is located. Regarding claim 15, it is indefinite where the portions that do not include a rare earth oxide are located for the reasons described above. Furthermore, “…a dimension…” may be interpreted as referring to a distance, area, or volume. For purposes of examination, “…a dimension” is being interpreted as the length of portion LH. This interpretation is based on para. [0078] of the present disclosure. Regarding claim 16, it is indefinite where the portions that do not include a rare earth oxide are located. Specifically, “…along a direction orthogonal or substantially orthogonal to the width direction…” (i.e., length or height direction) could be interpreted as the LH or WH portion of Fig. 8. For purposes of examination, the portion that does not include rare earth oxide is being interpreted as portion LW of Fig. 8. This interpretation is based on para. [0078] of the present disclosure. The examiner suggests to use wording similar to para. [0078] to clearly claim where the portion that does not include rare earth oxide is located. Regarding claim 17, it is indefinite where the portions that do not include a rare earth oxide are located for the reasons described above. Furthermore, “…a dimension…” may be interpreted as referring to a distance, area, or volume. For purposes of examination, “…a dimension” is being interpreted as the length of portion LW. This interpretation is based on para. [0078] of the present disclosure. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 3, and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. US 2022/0189692 A1 (hereafter referred to as Park). Regarding claim 1, Park discloses: A multilayer ceramic capacitor comprising: a multilayer body (110 – Fig. 1 para. [0031]) including a plurality of stacked dielectric layers (111 – Fig. 2 para. [0035]) and a plurality of stacked internal electrode layers (121, 122 – Fig. 2 para. [0031]), and including a first main surface and a second main surface opposed to each other in a height direction, a first side surface and a second side surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction (Fig. 1 shows a parallelepiped shaped body); and a plurality of outer electrodes (131, 132 – Fig. 2 para. [0031]); wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface; and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the second end surface (Fig. 2 para. [0031]); the plurality of outer electrodes include: a first outer electrode connected to the first internal electrode layers; and a second outer electrode connected to the second internal electrode layers (Fig. 2 para. [0031]); the first internal electrode layers and the second internal electrode layers include a rare earth oxide (Paras. [0031], [0070] and [0111]); and the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along at least one of a pair of interfaces with the dielectric layer (121b – Fig. 5 paras. [0078], [0085] and [0087]). Regarding claim 3, Park discloses: The multilayer ceramic capacitor according to Claim 1, wherein the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along the height direction of the multilayer body of the first internal electrode layers and the second internal electrode layers so as to be most abundant at both of a pair of interfaces with the plurality of dielectric layers and decrease as a distance from both the pair of interfaces with the plurality of dielectric layers increases (121b – Fig. 5 paras. [0072], [0078], [0084-0085] and [0087]; The condition C0 < C1 describes that the rare earth oxide is most abundant at the interfaces). Regarding claim 9, Park discloses: The multilayer ceramic capacitor according to Claim 1, wherein a content rate of the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is about 0.1 wt% or more and about 10 wt% or less, based on {(weight of rare earth oxide)/(weight of rare earth oxide + weight of main component metal of each of the first internal electrode layers and the second internal electrode layers)} × 100 (Paras. [0031], [0070] and Table 2 discloses that the number of atoms of Dy to the total number of atoms in the internal electrode is 0.02 at. % to 5 at. %. Therefore, the range of wt% of rare earth oxide in the internal electrode is the molar mass of Dy2O3 (373 g/mol) times the percentage of Dy2O3 (0.0002/2 or 0.05/2) over the molar mass of Ni (58.69 g/mol) times the percentage of Ni (0.9998 or 0.95). In other words, the wt% range of rare earth oxide is 373 × 0.0001 58.69 × 0.9998 × 100   % to 373 × 0.025 58.69 × 0.95 × 100   % which is 0.06 wt% to 16.7 wt%, completely overlapping with the claimed range.). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-2 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. JP 2017120871 A (hereafter referred to as Kim) in view of Park. Regarding claim 1, Kim discloses: A multilayer ceramic capacitor comprising: a multilayer body (110 – Fig. 1 para. [0023]) including a plurality of stacked dielectric layers (111 – Fig. 2 para. [0026]) and a plurality of stacked internal electrode layers (121, 122 – Fig. 2 para. [0023]), and including a first main surface and a second main surface opposed to each other in a height direction, a first side surface and a second side surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction (Fig. 1 shows a parallelepiped shaped body); and a plurality of outer electrodes (131, 132 – Fig. 2 para. [0023]); wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface; and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the second end surface (Fig. 2 para. [0043]); the plurality of outer electrodes include: a first outer electrode connected to the first internal electrode layers; and a second outer electrode connected to the second internal electrode layers (Fig. 2 para. [0048]) the first internal electrode layers and the second internal electrode layers include a ceramic additive (11 – Fig. 6b para. [0054]); and the ceramic additive in each of the first internal electrode layers and the second internal electrode layers is distributed along at least one of a pair of interfaces with the dielectric layer (11 – Fig. 6b para. [0055]). Kim fails to discloses wherein the ceramic additive may be or include a rare earth oxide. Park discloses wherein the additive included in the internal electrodes is a rare earth oxide (Paras. [0014] and [0070]). Furthermore, Park discloses that including a rare earth oxide rather than a ceramic additive in the internal electrodes suppresses thermal contraction while also allowing for a thinner electrode to be formed (Paras. [0007-0008] and [0090]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to replace the ceramic additive of Kim included in the internal electrodes with the rare earth oxide of Park to maintain the benefit of suppressing thermal contraction while also being capable of making the internal electrodes thinner, improving volumetric efficiency (Paras. [0007-0008] and [0090] of Park). Regarding claim 2, Kim as modified by Park further discloses: The multilayer ceramic capacitor according to Claim 1, wherein the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along the height direction of the multilayer body of the first internal electrode layers and the second internal electrode layers so as to be most abundant at one of a pair of interfaces with the dielectric layer and decrease as a distance from the one of the pair of interfaces with the dielectric layer increases (Figs. 6b/c paras. [0055], [0105] and [0108] of Kim). Regarding claim 19, Kim discloses: A method for manufacturing a multilayer ceramic capacitor including a multilayer body (110 – Fig. 1 para. [0023]) including a plurality of internal electrode layers arranged to face each other and to be spaced apart from each other (121, 122 – Fig. 2 para. [0023]), and a dielectric layers between the plurality of internal electrode layers and including a ceramic material (111 – Fig. 2 paras. [0026], [0028] [0041]), and a plurality of outer electrodes on a surface of the multilayer body and selectively connected to the plurality of internal electrode layers (131, 132 – Fig. 2 para. [0048]), the method comprising: applying a conductive paste for forming the plurality of internal electrode layers on a dielectric sheet corresponding to the dielectric layer (Para. [0099]); and stacking, on the dielectric sheet to which the conductive paste is applied, another dielectric sheet to which the conductive paste is applied (Para. [0111]); wherein the applying includes: firstly applying a first conductive paste including a conductive material (Paras. [0100] and [0105]); and secondarily applying a second conductive paste including a conductive material and a ceramic additive, the secondarily applying being performed before, after, or both before and after the firstly applying (Paras. [0100] and [0105]); and at least one of the stacking and the applying brings a surface to which the second conductive paste is applied, obtained by the secondarily applying, into contact with a surface of the dielectric sheet (Figs. 3-5 paras. [0111]). Kim fails to discloses wherein the ceramic additive may be or include a rare earth oxide. Park discloses wherein the additive included in the internal electrodes is a rare earth oxide (Paras. [0014] and [0070]). Furthermore, Park discloses that including a rare earth oxide rather than a ceramic additive in the internal electrodes suppresses thermal contraction while also allowing for a thinner electrode to be formed (Paras. [0007-0008] and [0090]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to replace the ceramic additive of Kim included in the internal electrodes with the rare earth oxide of Park to maintain the benefit of suppressing thermal contraction while also being capable of making the internal electrodes thinner, improving volumetric efficiency (Paras. [0007-0008] and [0090] of Park). Claim(s) 10, 12, and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Fuji et al. US 2018/0108480 A1 (hereafter referred to as Fuji). Regarding claim 10, Park discloses: A multilayer ceramic capacitor comprising: a multilayer body (110 – Fig. 1 para. [0031]) including a plurality of stacked dielectric layers (111 – Fig. 2 para. [0035]) and a plurality of stacked internal electrode layers (121, 122 – Fig. 2 para. [0031]), and including a first main surface and a second main surface opposed to each other in a height direction, a first side surface and a second side surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction (Fig. 1 shows a parallelepiped shaped body); and a plurality of outer electrodes (131, 132 – Fig. 2 para. [0031]); the first internal electrode layers and the second internal electrode layers include a rare earth oxide (Paras. [0031], [0070] and [0111]); and the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along at least one of a pair of interfaces with the dielectric layer (121b – Fig. 5 paras. [0078], [0085] and [0087]). Park fails to disclose wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface and the second end surface; and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first side surface and second side surface; the plurality of outer electrodes include: a first outer electrode and a second outer electrode each connected to the first internal electrode layers; and a third outer electrode and a fourth outer electrode each connected to the second internal electrode layers. Fuji discloses wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface and the second end surface (16 – Fig. 2 para. [0044]); and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first side surface and second side surface (18 – Figs. 3 para. [0044]); the plurality of outer electrodes include: a first outer electrode and a second outer electrode each connected to the first internal electrode layers (20, 22 – Fig. 2 paras. [0052-0053]); and a third outer electrode and a fourth outer electrode each connected to the second internal electrode layers (24, 26 – Fig. 3 paras. [0054-0055]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the plurality of outer electrodes, and the arrangement of connections between the internal electrodes and the plurality of outer electrodes of Kim to the feedthrough/three-terminal arrangement disclosed by Fuji to decrease equivalent series inductance (ESL) and allow the capacitor of Kim to operate over higher frequencies (Paras. [0003-0007] of Fuji). Regarding claim 12, Park as modified by Fuji discloses: The multilayer ceramic capacitor according to Claim 10, wherein the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along the height direction of the multilayer body of the first internal electrode layers and the second internal electrode layers so as to be most abundant at both of a pair of interfaces with the plurality of dielectric layers and decrease as a distance from both the pair of interfaces with the plurality of dielectric layers increases (121b Fig. 5 paras. [0072-0073] and [0077-0086] of Park). Regarding claim 18, Park as modified by Fuji discloses: The multilayer ceramic capacitor according to Claim 10, wherein a content rate of the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is about 0.1 wt% or more and about 10 wt% or less, based on {(weight of rare earth oxide)/(weight of rare earth oxide + weight of main component metal of each of the first internal electrode layers and the second internal electrode layers)} × 100 (Paras. [0031], [0070] and Table 2 of Park discloses that the number of atoms of Dy to the total number of atoms in the internal electrode is 0.02 at. % to 5 at. %. Therefore, the range of wt% of rare earth oxide in the internal electrode is the molar mass of Dy2O3 (373 g/mol) times the percentage of Dy2O3 (0.0002/2 or 0.05/2) over the molar mass of Ni (58.69 g/mol) times the percentage of Ni (0.9998 or 0.95). In other words, the wt% range of rare earth oxide is 373 × 0.0001 58.69 × 0.9998 × 100   % to 373 × 0.025 58.69 × 0.95 × 100   % which is 0.06 wt% to 16.7 wt%, completely overlapping with the claimed range.). Claim(s) 10 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Park and further in view of Fuji. Regarding claim 10, Kim discloses: A multilayer ceramic capacitor comprising: a multilayer body (110 – Fig. 1 para. [0023]) including a plurality of stacked dielectric layers (111 – Fig. 2 para. [0026]) and a plurality of stacked internal electrode layers (121, 122 – Fig. 2 para. [0023]), and including a first main surface and a second main surface opposed to each other in a height direction, a first side surface and a second side surface opposed to each other in a width direction orthogonal or substantially orthogonal to the height direction, and a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the height direction and the width direction (Fig. 1 shows a parallelepiped shaped body); and a plurality of outer electrodes (131, 132 – Fig. 2 para. [0023]); the first internal electrode layers and the second internal electrode layers include a ceramic additive (11 – Fig. 6b para. [0054]); and the ceramic additive in each of the first internal electrode layers and the second internal electrode layers is distributed along at least one of a pair of interfaces with the dielectric layer (11 – Fig. 6b para. [0055]). Kim fails to discloses wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface and the second end surface; and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first side surface and second side surface; the plurality of outer electrodes include: a first outer electrode and a second outer electrode each connected to the first internal electrode layers; and a third outer electrode and a fourth outer electrode each connected to the second internal electrode layers and wherein the ceramic additive may be or include a rare earth oxide. Park discloses wherein the additive included in the internal electrodes is a rare earth oxide (Paras. [0014] and [0070]). Furthermore, Park discloses that including a rare earth oxide rather than a ceramic additive in the internal electrodes suppresses thermal contraction while also allowing for a thinner electrode to be formed (Paras. [0007-0008] and [0090]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to replace the ceramic additive of Kim included in the internal electrodes with the rare earth oxide of Park to maintain the benefit of suppressing thermal contraction while also being capable of making the internal electrodes thinner, improving volumetric efficiency (Paras. [0007-0008] and [0090] of Park). However, Kim as modified by Park fails to discloses wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface and the second end surface; and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first side surface and second side surface; the plurality of outer electrodes include: a first outer electrode and a second outer electrode each connected to the first internal electrode layers; and a third outer electrode and a fourth outer electrode each connected to the second internal electrode layers Fuji discloses wherein the plurality of internal electrode layers include: first internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first end surface and the second end surface (16 – Fig. 2 para. [0044]); and second internal electrode layers alternately stacked with the plurality of dielectric layers and exposed at the first side surface and second side surface (18 – Figs. 3 para. [0044]); the plurality of outer electrodes include: a first outer electrode and a second outer electrode each connected to the first internal electrode layers (20, 22 – Fig. 2 paras. [0052-0053]); and a third outer electrode and a fourth outer electrode each connected to the second internal electrode layers (24, 26 – Fig. 3 paras. [0054-0055]). Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to modify the plurality of outer electrodes, and the arrangement of connections between the internal electrodes and the plurality of outer electrodes of Kim to the feedthrough/three-terminal arrangement disclosed by Fuji to decrease equivalent series inductance (ESL) and allow the capacitor of Kim to operate over higher frequencies (Paras. [0003-0007] of Fuji). Regarding claim 11, Kim as modified by Park and further modified by Fuji discloses: The multilayer ceramic capacitor according to Claim 10, wherein the rare earth oxide in each of the first internal electrode layers and the second internal electrode layers is distributed along the height direction of the multilayer body of the first internal electrode layers and the second internal electrode layers so as to be most abundant at one of a pair of interfaces with the dielectric layer and decrease as a distance from the one of the pair of interfaces with the dielectric layer increases (Figs. 6b/c paras. [0055], [0105] and [0108] of Kim). Allowable Subject Matter Claim(s) 4 and 13 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art for the limitation of claims 4 and 13 has not been found. Although prior art documents as such JP 2017120871 A discuss different concentrations of an additive in the internal electrode, none discuss the concentrations when viewing the internal electrode in the height direction. An increasing concentration of a rare earth oxide towards a center of the internal electrode when viewed in the height direction (Fig. 10 of the present application) is not known or obvious in the art. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US-5097391-A: 4 – Fig. 2 col. 8 lines 32-35 US-6312622-B1: Abstract US-6442813-B1: col. 5 lines 33-59 and col. 7 lines 21-34 US-20060208575-A1: 11b, 11c – Fig. 2 paras. [0030] and [0032] teaches rare earth oxide included in internal electrode and in contact with the dielectric layer US-20090122462-A1: Abstract and paras. [0038] and [0050] US-20130321977-A1: 121 – Fig. 1 paras. [0053] and [0064] disclose a common material (including a rare earth oxide) included in the inner electrode and at an interface with the dielectric layers US-10269492-B2: 21 – Fig. 3 col. 6 lines 50-55 and col. 7 lines 6-12 US-20200411242-A1: 3 – Figs. 7-8 para. [0080] and [0090] disclose a rare earth oxide included in the internal electrode and at an interface with the dielectric layers US-20210366653-A1: Abstract and paras. [0008] and [0015] US-20220139619-A1: O, 123 – Figs. 4-10 paras. [0034] and [0036] US-20220157522-A1: Paras. [0063], [0067] and [0080-0082] KR-20030029499-A: Paras. [0019] and [0029] Communication Any inquiry concerning this communication or earlier communications from the examiner should be directed to Timothy Torres whose telephone number is (571)272-9896. The examiner can normally be reached Mon-Fri 7:30-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /T.J.T./Examiner, Art Unit 2847 /Timothy J. Dole/Supervisory Patent Examiner, Art Unit 2847
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Prosecution Timeline

Nov 05, 2024
Application Filed
Jul 07, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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