Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending.
Double Patent Rejection
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the "right to exclude" granted by a patent and to prevent possible harassment by multiple assignees. See In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970);and, In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent is shown to be commonly owned with this application. See 37 CFR 1.130(b).
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 1-20 are rejected under the judicially created doctrine of obviousness-type double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,170,115. Although the conflicting claims are not identical, they are not patentably distinct from each other because of the reasons set forth below.
Claims 1-20 are rejected in view of claims 1-20 of the “115 patent. Similar to the claimed invention, claim 1-20 of the patent recites a “ A method comprising: erasing a first portion of memory from a garbage pool in response to detecting an idle period; receiving a request to write data to the memory; in response to the request to write data, determining that a charge gain threshold has been satisfied for the first portion of memory; moving the first portion of memory back to the garbage pool in response to determining the charge gain threshold has been satisfied; erasing a second portion of memory from the garbage pool to satisfy the request to write data further in response to determining the charge gain threshold has been satisfied; and writing the data to the second portion of memory.”,
“A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to: erase a first portion of memory from a garbage pool in response to detecting an idle period; receive a request to write data to the memory; in response to the request to write data, determine that a charge gain threshold has been satisfied for the first portion of memory; moving the first portion of memory back to the garbage pool in response to determining the charge gain threshold has been satisfied; erase a second portion of memory from the garbage pool to satisfy the request to write data further in response to determining the charge gain threshold has been satisfied; and write the data to the second portion of memory.” and
“A system comprising: a plurality of memory devices; and a processing device, operatively coupled with the plurality of memory devices, to: erase a first portion of memory from a garbage pool in response to detecting an idle period; receive a request to write data to the memory; in response to the request to write data, determine that a charge gain threshold has been satisfied for the erased portion of memory, wherein the charge gain threshold is a threshold amount of time following the erasing of the first portion of memory; moving the first portion of memory back to the garbage pool in response to determining the charge gain threshold has been satisfied; erase a second portion of memory from the garbage pool to satisfy the request to write data further in response to determining the charge gain threshold has been satisfied; and write the data to the second portion of memory.”
As can be seen, the patent protection for the claimed invention has already been granted to the earlier filed application.
eTerminal Disclaimer
The USPT© internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to
http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-20 would be allowable if an eTerminal Disclaimer signed and filed by an attorney or agent of record to overcome the obviousness-type double patenting rejection.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicants' disclosure, Lee, US 11,449,277 Patent.
Lee discloses a memory controller that predicts idle periods, performs background erase operations, manages free blocks, and adjust write operations based on free-block availability and anticipated workload conditions. However, Lee does not teach determining whether an erased memory portion satisfies a charge gain threshold, returning the erase memory portion to a garbage pool in response to satisfaction of the charge gain threshold, erasing a different memory portion from the garbage pool based on the charge gain threshold determination, and writing data to the different memory portion.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CONNIE C YOHA whose telephone number is (571)272-1799. The examiner can normally be reached on M-F 8:00AM - 5:00PM.
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/CONNIE C YOHA/Primary Examiner, Art Unit 2825