DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 11/18/2025, 3/18/2026 and 4/22/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 12 of copending Application No. 18/938,184. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of the instant application is an obvious variation of claim 12 of copending Application No. 18/938,184.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/937,933. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of the instant application is an obvious variation of claim 1 of copending Application No. 18/937,933.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/938,080. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of the instant application is an obvious variation of claim 1 of copending Application No. 18/938,080.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 19 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 12 of copending Application No. 18/938,184. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 19 of the instant application is an obvious variation of claim 12 of copending Application No. 18/938,184.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 19 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/937,933. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 19 of the instant application is an obvious variation of claim 1 of copending Application No. 18/937,933.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 19 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/938,080. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 19 of the instant application is an obvious variation of claim 1 of copending Application No. 18/938,080.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 13-15 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Garcia Capel et al. US 2023/0230212.
Re claim 1, Garcia Capel discloses an image sensor (dual sensing imaging device), comprising: an event driven sensing array (114) including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel (event based image sensor captures event data) (figure 1; paragraphs 26-29); a pixel array (112) including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel (CCD/CIS components obtain frame based image data) (figure 1; paragraphs 25-30); a deblur circuit (122) configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels (blur of the image data is corrected using event data during an image restoration operation) (figure 1; paragraphs 36-37, 44-47, 56); and a physical interface (output 140/display 640) usable to output the deblurred image data from the image sensor (output 140 and display 640 output processed video or image data)(figures 1,6; paragraphs 35, 47, 70).
Re claim 13, Garcia Capel further discloses first row/column control circuitry and first readout circuitry, each corresponding to the pixel array (row/column control and readout circuitry reads out signals S1 from pixel array); and second row/column control circuitry and second readout circuitry different from the first row/column control circuitry and the first readout circuitry, respectively, and each corresponding to the event driven sensing array (row/column control and readout circuitry reads out signals S2 from event based sensing array)(figures 1,6; paragraphs 23-29, 59-62).
Re claim 14, Garcia Capel further discloses a common control block configured to synchronize operations of the first row/column control circuitry, the first readout circuitry, the second row/column control circuitry, and the second readout circuitry with one another (the rows/columns of the pixel array and the event-based sensing array are synchronized and read out together in order to perform an image restoration operation) (figures 1,6; paragraphs 23-29, 59-62).
Re claim 15, Garcia Capel further discloses that the physical interface (140) is a first physical interface; and the image sensor further includes a second physical interface separate from the first physical interface and usable to output the event data (S2) (event sensor outputs separate asynchronous event data) (figure 1; paragraphs 36-28, 32).
Re claim 19, Garcia Capel discloses an imaging system, comprising: an image sensor (dual sensing imaging device) including a plurality of CMOS image sensor (CIS) pixels (112) configured to capture CIS data corresponding intensity of light incident on CIS pixels of the plurality of CIS pixels (CCD/CIS components obtain frame based image data) (figure 1; paragraphs 25-30), an event vision sensor (EVS) pixel (114) configured to capture EVS data corresponding to events detected in light incident on the EVS pixel (event based image sensor captures event data) (figure 1; paragraphs 26-29), and a deblur circuit (122) configured to generate deblurred image data based on the CIS data and an accumulation of events in the EVS data (figure 1; paragraphs 36-37, 44-47, 56); and an image signal processor configured to interface with the image sensor and receive the deblurred image data from the image sensor (output 140 and display 640 output processed video or image data)(figures 1,6; paragraphs 35, 47, 70).
Allowable Subject Matter
Claims 2-12, 16-18 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Re claims 2-11, the prior art fails to teach or suggest, an image sensor having the specific configurations disclosed in claims 2-11, wherein the image sensor comprises: an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel; a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel; a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels; and a physical interface usable to output the deblurred image data from the image sensor, wherein the deblur circuit includes a counter usable to compute a running sum of events detected in event data captured by an EVS pixel of the one or more EVS pixels during an event accumulation period. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Re claim 12, the prior art fails to teach or suggest, an image sensor having the specific configurations disclosed in claim 12, wherein the image sensor comprises: an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel; a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel; a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels; and a physical interface usable to output the deblurred image data from the image sensor, wherein: the deblurred image data includes a latent frame of the CIS data; the deblur circuit includes a latent frame computation block configured to compute the latent frame based at least in part on (i) first event data captured by an EVS pixel of an EVS pixel row of the one of more EVS pixel rows and (ii) first CIS data captured by a CIS pixel of a CIS pixel row corresponding to the EVS pixel row; the first CIS data is captured by the CIS pixel over an exposure period; and the first event data is captured by the EVS pixel over an event accumulation period that is aligned with the exposure period. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Re claim 16, the prior art fails to teach or suggest, an image sensor having the specific configurations disclosed in claim 16, wherein the image sensor comprises: an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel; a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel; a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels; and a physical interface usable to output the deblurred image data from the image sensor, wherein the physical interface is further usable to output the event data. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Re claim 17, the prior art fails to teach or suggest, an image sensor having the specific configurations disclosed in claim 17, wherein the image sensor comprises: an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel; a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel; a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels; and a physical interface usable to output the deblurred image data from the image sensor, further comprising a multiplexer that is controllable to selectively output the deblurred image data or the CIS data from the image sensor. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Re claim 18, the prior art fails to teach or suggest, an image sensor having the specific configurations disclosed in claim 18, wherein the image sensor comprises: an event driven sensing array including one or more event vision sensor (EVS) pixels arranged in one or more EVS pixel rows, wherein each EVS pixel of the one or more EVS pixels is configured to capture event data corresponding to contrast information of light incident on the EVS pixel; a pixel array including a plurality of CMOS image sensor (CIS) pixels arranged in one or more CIS pixel rows, wherein each CIS pixel of the plurality of CIS pixels is configured to capture CIS data corresponding to intensity of light incident on the CIS pixel; a deblur circuit configured to generate deblurred image data by deblurring the CIS data captured by the plurality of CIS pixels using the event data captured by the one or more EVS pixels; and a physical interface usable to output the deblurred image data from the image sensor, further comprising a multiplexer that is controllable to selectively output the event data from the image sensor. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Re claim 20, the prior art fails to teach or suggest, an imaging system, comprising: an image sensor having the specific configurations disclosed in claim 20, wherein the image sensor comprises: a plurality of CMOS image sensor (CIS) pixels configured to capture CIS data corresponding intensity of light incident on CIS pixels of the plurality of CIS pixels, an event vision sensor (EVS) pixel configured to capture EVS data corresponding to events detected in light incident on the EVS pixel, and a deblur circuit configured to generate deblurred image data based on the CIS data and an accumulation of events in the EVS data; and an image signal processor configured to interface with the image sensor and receive the deblurred image data from the image sensor, wherein the deblur circuit is configured to compute the accumulation of events using an event-based double integral model. The prior art fails to specifically disclose an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Claims 21-44 are allowed.
The following is an examiner’s statement of reasons for allowance:
Re claims 21-44, the prior art fails to teach or suggest, a method of operating an image sensor having the specific configurations disclosed in claims 21-44, wherein the method comprises: capturing CMOS image sensor (CIS) data using CIS pixels of one or more CIS pixel rows of a pixel array of the image sensor, wherein the CIS data corresponds to intensity of light incident on the CIS pixels over an exposure period; capturing event vision sensor (EVS) data using one or more EVS pixels of an EVS pixel row of an event driven sensing array of the image sensor, wherein the EVS data includes events detected by the one or more EVS pixels during an event accumulation period, and wherein each event represents temporal contrast of light incident on the one or more EVS pixels that exceeds a threshold; and generating deblurred image data, wherein generating the deblurred image data includes deblurring, using a deblur circuit of the image sensor, the CIS data (i) based on the EVS data and (ii) internally within the image sensor. The prior art fails to specifically disclose a method of operating an image sensor including an event driven sensing array and a pixel array and capable of generating deblurred image data by using captured event data and configured and arranged in the exact configuration disclosed in the specification and the claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Miyatani et al. US 2025/0373939 discloses an imaging device for performing deblur correction using event data from an event sensor.
Ye et al. US 2023/0042364 discloses a hybrid imaging device using an event-based sensor to perform motion compensation.
Seo et al. US 2023/0030562 discloses an imaging device including a dynamic vision sensor to perform motion deblurring.
Naganuma et al. US 2022/0284593 discloses an image processing device including an event-based sensor for generating event data to perform motion correction.
Contacts
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kelly L. Jerabek whose telephone number is (571) 272-7312. The examiner can normally be reached on Monday - Friday (8:00 AM - 5:00 PM).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, George Eng can be reached at (571) 272-7495. The fax phone number for submitting all Official communications is (571) 273-7300. The fax phone number for submitting informal communications such as drafts, proposed amendments, etc., may be faxed directly to the Examiner at (571) 273-7312.
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/KELLY L JERABEK/Primary Examiner, Art Unit 2699
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