DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/6/2024 has been considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-6 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 5-6 are indefinite when interpreted in light of the specification because the claims do not agree with the disclosure. The claims require either a resistor or a second switch between the gate and the drain of the PMOS FET, yet the disclosure of Figure 5 shows both the resistor (Fig. 5 33) and the second switch (Fig. 5 34) between the gate and source of the PMOS FET (Fig. 5 32), not between the gate and the drain. The claims are indefinite when interpreted in light of the specification because it is unclear whether drain or source is required. Based on the drawings it appears ‘between the gate and the source’ was intended. However, for the purpose of examination, the claim shall be interpreted as presented.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 and 9-10 are rejected under 35 U.S.C. 102a1 as being anticipated by Hosokawa (US 2007/0159150).
With respect to claim 1, Hosokawa discloses a bootstrap circuit, comprising: a first switch (Fig. 1 M3) configured to have a first terminal (Fig. 1 D) to which a constant voltage (Fig. 1 VDD) is applied; a capacitor (Fig. 1 CB) configured to have a first terminal to which a second terminal (Fig. 1 S) of the first switch is connected and a second terminal to which a switching voltage (Fig. 1 voltage LX) is applied; and a controller (Fig. 1 LS1) configured to control the first switch based on the switching voltage (Fig. 1 voltage LX) and a first control signal (Fig. 1 lg), wherein the switching voltage is a voltage generated at a connection node (Fig. 1 LX) between a first switching element (Fig. 1 M1) and a second switching element (Fig. 1 M2), and the second switching element is a switching element provided on a lower potential side (Fig. 1 ground side lower than upper Vin side) with respect to the first switching element and configured to perform switching based on the first control signal (Fig. 1 lg).
With respect to claim 2, Hosokawa discloses the bootstrap circuit according to claim 1, wherein the controller includes a level shifter (Fig. 1 LS1) configured to shift (Fig. 2 LG) a level of the first control signal (Fig. 2 lg).
With respect to claim 9, Hosokawa discloses the bootstrap circuit according to claim 1, wherein the first switch is in an off state (Fig. 2 M3 PMOS is off when LG is high) when the switching voltage has a value larger than a predetermined value (Fig. 1 M3 voltage threshold for turn off).
With respect to claim 10, Hosokawa discloses a power supply device, comprising: the bootstrap circuit according to claim 1; the first switching element (Fig.1 M1); and the second switching element (Fig. 1 M2).
Examiner notes Hosokawa discloses multiple embodiments. The rejection of the embodiment shown in Figure 8 is presented below and used in the obviousness type rejection of claim 7.
With respect to claim 1, Hosokawa additionally discloses a bootstrap circuit, comprising: a first switch (Fig. 8 M3) configured to have a first terminal (Fig. 8 D) to which a constant voltage (Fig. 8 VCC) is applied; a capacitor (Fig. 8 CB) configured to have a first terminal to which a second terminal (Fig. 8 S) of the first switch is connected and a second terminal to which a switching voltage (Fig. 8 voltage LX) is applied; and a controller (Fig. 8 LS1) configured to control the first switch based on the switching voltage (Fig. 8 voltage LX) and a first control signal (Fig. 8 hg), wherein the switching voltage is a voltage generated at a connection node (Fig. 8 LX) between a first switching element (Fig. 8 M1) and a second switching element (Fig. 8 M2), and the second switching element is a switching element provided on a lower potential side (Fig. 8 ground side lower than upper Vin side) with respect to the first switching element and configured to perform switching based on the first control signal (Fig. 8 hg).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-4 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Hosokawa (US 2007/0159150) in view of McJimsey (US 2014/0103894).
With respect to claim 3, Hosokawa discloses the bootstrap circuit according to claim 2 as set forth above, and remains silent as to the details of the level shifter.
McJimsey discloses a level shifter (Fig. 12 1200) wherein the level shifter includes a P-channel MOS field-effect transistor (Fig. 12 1228), and the P-channel MOS field-effect transistor is configured to have a gate (Fig. 12 1228 G) to which the switching voltage (Fig. 12 voltage Vx) is supplied. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement a level shifter wherein the level shifter includes a P-channel MOS field-effect transistor, and the P-channel MOS field-effect transistor is configured to have a gate to which the switching voltage is supplied, in order to raise the control level voltages to the necessary level to interface to the first switching device.
With respect to claim 4, Hosokawa in view of McJimsey make obvious the bootstrap circuit according to claim 3, wherein the P-channel MOS field-effect transistor is configured to have a drain (Fig. 12 1228 D) to which the first control signal is supplied (Fig. 12 INP applied to S2 via 1212-1216).
With respect to claim 6, Hosokawa in view of McJimsey make obvious the bootstrap circuit according to claim 3, wherein the first switching element is a switching element configured to perform switching based on a second control signal (Fig. 12 INP), the level shifter includes a second switch (Fig. 12 1242) provided between the gate and the drain (Fig. 12 1228 D) of the P-channel MOS field-effect transistor, and the second switch is configured to perform switching based on (Fig. 12 1232 G based on INP via 1212-1216) the second control signal.
Claim(s) 7 is rejected under 35 U.S.C. 103 as being unpatentable over Hosokawa (US 2007/0159150) in view of Kinzer (US 10,135,275).
With respect to claim 7, Hosokawa discloses wherein the first control signal (Fig. 8 hg) is an input signal of a driver (Fig. 8 INV1) configured to drive the second switching element (Fig. 8 M2). Hosokawa remains silent as to whether the first and second switching elements are Si devices, but it was well known before the effective filing date of the claimed invention to implement wherein switching elements are fabricated from Si.
Kinzer discloses wherein the first switching element (Fig. 1 125) and the second switching element (Fig. 1 115) are Si devices (paragraph 97). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement wherein the first switching element and the second switching element are Si devices as silicon transistors have been the most commonly fabricated type of transistor for years due to the low cost and reliability.
Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over Hosokawa (US 2007/0159150) in view of DeRooij (US 2016/0105173).
With respect to claim 8, Hosokawa discloses the bootstrap circuit according to claim 1, and remains silent as to the type of transistor and the use of gate driver.
DeRooij discloses wherein the first switching element (Fig. 2 12) and the second switching element (Fig. 2 14) are GAN devices (paragraph 3) or SiC devices, and the first control signal (Fig. 2 39) is an output signal of a driver (Fig. 2 34) configured to drive the second switching element (Fig. 2 14). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement wherein the first switching element and the second switching element are GAN devices or SiC devices, and the first control signal is an output signal of a driver configured to drive the second switching element, in order to utilize the high switching speed and high temperature compatibility of GaN and to control the switching speed and gate drive capability with a dedicated gate driver.
Claim(s) 11 is rejected under 35 U.S.C. 103 as being unpatentable over Ozaki (US 2021/0297078) in view of Hosokawa (US 2007/0159150).
With respect to claim 11, Hosokawa discloses a vehicle (paragraph 80) comprising a power supply device, but does not require the power supply device according to claim 10.
Hosokawa teaches the power supply device according to claim 10 as set forth above, and it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the power supply device according to claim 10 in a vehicle in order to improve the efficiency of the power supply device by reducing losses in the bootstrap circuit.
Conclusion
The prior art made of record and not relied upon is considered pertinent to Applicant's disclosure. Forghani-Zadeh (US 8,593,211) and Bryson (US 2006/0017466) disclose bootstrap circuits.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRY RAYMOND BEHM whose telephone number is (571)272-8929. The examiner can normally be reached M-F: 8-5 EST.
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/HARRY R BEHM/Primary Examiner, Art Unit 2838
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