DETAILED ACTION
This Office Action is in response to the application as originally filed 11/07/2024. The detail office action to the pending claims 1-20 is as shown below.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to the Information Disclosure Statement
The information disclosure statement filed 02/21//2025 has been acknowledged and considered by the Examiner. Initialed copy of the PTO-1449 is included in this correspondence.
Claim Objections
The following claims are objected to because of the following informalities:
Regarding Independent claim 1, the claim recites, in several lines, the acronym “PLL” without defining them in plain text. Every acronym should be defined when they first appear. Appropriate correction is required. Appropriate correction is required.
Regarding Independent claim 20, the claim recites, in several lines, the acronym “PLL” without defining them in plain text. Every acronym should be defined when they first appear. Appropriate correction is required. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 5, 9, 11, 20 are rejected under 35 U.S.C. 103 as being unpatentable over US8660223 to Ogasawara et al. (“Ogasawara”) in view of US9413525 to Takeuchi (The remarks and/or references placed in the parentheses apply to the prior art)
RE claim 1 and 20, Ogasawara discloses a device (30) and a method (e.g. title of Ogasawara) that performs data communication with a counterpart device via a transmission channel (e.g. Ogasawara col. 9, lines 15-25: the transmitting unit 301 transmits a data signal; and the receiving unit 302 receives the data signal), the device comprising: a PLL (1) configured to modulate and output a frequency of a clock (C_OUT) used to synchronize communication data in accordance with a regulation signal applied thereto (e.g. Ogasawara, Fig. 1, col. 4, lines 5-20, col. 9, lines 60-65: frequency-modulates and outputs clock signal used to synchronize communication data in accordance with a regulation signal applied), a first controller (181) configured to generate the regulation signal (e.g. Ogasawara, Figs, 2, 5, and col. 6, lines 25-28: outputs the control signal S_UD) according to a modulation waveform (SC(K), SCF(K)) which is a successive form of a plurality of modulation wave units (e.g. Ogasawara, Col. 6, lines 10-15: the stage (SC(K), SCF(K)) here means a period in which one or more modulation degrees are applied) determined by a set modulation profile (e.g. Ogasawara, col. 5, line 43-53: wherein the maximum modulation degree includes the modulation profile), and apply the regulation signal to the PLL (e.g. Ogasawara, Figs. 1, Col. 4, lines 57-65: the PLL operates in accordance with a control signal S_UD supplied from the controller 181), a main controller (180) configured to control the first controller so that application of the regulation signal to the PLL is started (e.g. Ogasawara, Figs, 2, 5 and col. 6, lines 25-28: the control signal generator 181 receives the stage number SC(k) from the stage counter 180 and outputs the control signal S_UD in accordance with the stage number SC(k)), wherein the modulation wave unit is a signal whose […] signal values during its time length becomes zero for the first time (e.g. Ogasawara Fig. 3 and col. 7, lines 25-55: the unit wave satisfies the requirement that the time ratio integral value of the signal becomes below zero or near zero for the first time, considering the average integral value for the previous ten-plus periods), and wherein at least two successive modulation wave units among the plurality of modulation wave units differ from each other in at least one of the time length and the form of the signal (e.g. Ogasawara, Fig. 6, col. 8, line 35 through col. 9, line 5: at least two successive waves differ from each other in the time length).
While Ogasawara discloses wherein the modulation wave unit is a signal whose signal values during its time length becomes below zero or near zero (e.g. expression (1)) as noted above, and while it is well within the level of a person of ordinary skill in the art to recognize that, in inventions/systems, such as Ogasawara’s, which employ spread spectrum clock (SSC) signal to suppress EMI, frequency or phase of clocks changes becoming zero or returning to a starting phase value just before an application of modulation degree, the subject matter of claims 1 and 20 differs from Ogasawara in that Ogasawara does not explicitly disclose the feature the [sum of signal values] becoming zero as recited. However, Takeuchi teaches or fairly suggests, in the same technical field, modulation waves (waveforms) whose sum of signal values becomes zero for the first time (see for example, Figure 12A-12B and col. 21, line 45-52 of Takeuchi), which illustrate/describe that the frequency/phase of a clock, changed based on the applied modulation degree/s, returns to zero or to the time frame before the application of the modulation signal begins. Hence the prior art includes each element/feature as claimed, although not necessarily in a single prior art reference, with the only difference between the claimed invention and the prior art being the lack of actual combination of the elements in a single prior art reference. Thus, it would have been obvious at the time the invention was made to one of ordinary skill in the art to modify the feature/element disclosed by Ogasawara with the knowledge generally available to one of ordinary skill in the art given the broadest reasonable interpretation in light of the Specification or with Takeuchi’s teaching in order to indicate the frequency or phase of the clock returning to zero, just before application of the modulation signal to a PLL (see Figure 12A-12B and col. 21, line 45-52 of Takeuchi). Therefore one of ordinary skill in the art, such as an individual working in a field related to wireless communications and techniques for hybrid beamforming configuration could have combined the features/elements as claimed by known methods, and that in combination, each feature/method merely performs the same function as it does separately, with each feature/method retaining its advantageous function, yielding predictable result/s. It is for at least the aforementioned reasons that the Examiner has reached a conclusion of obviousness with respect to claims 1 and 20.
RE claim 5, Ogasawara discloses the device of claim 1, wherein: the clock is a clock used to capture and receive a signal carried on the transmission channel as a digital signal (e.g. Ogasawara, col. 4, lines 60-65).
RE claim 9, Ogasawara discloses the device of claim 5, wherein: the device is configured such that the clock can also be used to transmit a data stream to the transmission channel and the data stream being for transmitting to the counterpart device (e.g. Ogasawara, Fig. 7 and col, 9, lines 10-25: the spread spectrum output clock signal is used for data signal transmission and reception of the data stream at a receiving device).
RE claim 11, Ogasawara discloses the device of claim 1, wherein: the clock is a clock used to transmit a data stream to the transmission channel, the data stream being for transmitting to the counterpart device (e.g. Ogasawara, Fig. 7 and col, 9, lines 10-25: the spread spectrum output clock signal is used for data signal transmission and reception of the data stream at a receiving device).
.
Allowable Subject Matter
Pending claim 19 contains allowable subject matter.
The following is the examiner's statement of reasons for determining allowable subject matter:
The closest prior art of record identified during search and consideration of the invention are US8660223 issued to Ogasawara and US9413525 issued to Takeuchi. Regarding the claimed subject matter recited in independent claim 20 of the instant application, the prior art of record, specifically
Ogasawara teaches or suggests, a device (30) and a method (e.g. title of Ogasawara) that performs data communication with a counterpart device via a transmission channel (e.g. Ogasawara col. 9, lines 15-25: the transmitting unit 301 transmits a data signal; and the receiving unit 302 receives the data signal), the device comprising: a PLL (1) configured to modulate and output a frequency of a clock (C_OUT) used to synchronize communication data in accordance with a regulation signal applied thereto (e.g. Ogasawara, Fig. 1, col. 4, lines 5-20, col. 9, lines 60-65: frequency-modulates and outputs clock signal used to synchronize communication data in accordance with a regulation signal applied), a first controller (181) configured to generate the regulation signal (e.g. Ogasawara, Figs, 2, 5, and col. 6, lines 25-28: outputs the control signal S_UD) according to a modulation waveform (SC(K), SCF(K)) which is a successive form of a plurality of modulation wave units (e.g. Ogasawara, Col. 6, lines 10-15: the stage (SC(K), SCF(K)) here means a period in which one or more modulation degrees are applied) determined by a set modulation profile (e.g. Ogasawara, col. 5, line 43-53: wherein the maximum modulation degree includes the modulation profile), and apply the regulation signal to the PLL (e.g. Ogasawara, Figs. 1, Col. 4, lines 57-65: the PLL operates in accordance with a control signal S_UD supplied from the controller 181), a main controller (180) configured to control the first controller so that application of the regulation signal to the PLL is started (e.g. Ogasawara, Figs, 2, 5 and col. 6, lines 25-28: the control signal generator 181 receives the stage number SC(k) from the stage counter 180 and outputs the control signal S_UD in accordance with the stage number SC(k)), wherein the modulation wave unit is a signal whose signal values during its time length becomes zero for the first time (e.g. Ogasawara Fig. 3 and col. 7, lines 25-55: the unit wave satisfies the requirement that the time ratio integral value of the signal becomes below zero or near zero for the first time, considering the average integral value for the previous ten-plus periods), and wherein at least two successive modulation wave units among the plurality of modulation wave units differ from each other in at least one of the time length and the form of the signal (e.g. Ogasawara, Fig. 6, col. 8, line 35 through col. 9, line 5: at least two successive waves differ from each other in the time length). Takeuchi’s invention is related to a clock and data recovery (CDR) circuit that receives serial data that has been subjected to spread spectrum frequency modulation and recovers a clock signal and a data signal from a received data (e.g. Takeuchi, col. 1, lines 15-40). Regarding the claimed subject matter recited in independent claim 20 of the instant application, the prior art of record, specifically, Takeuchi teaches or suggests modulation waves (waveforms) whose sum of signal values becomes zero for the first time and that the frequency/phase of a clock is changed based on an applied modulation degree/s and the modulation signal returns to zero or to the time frame before the application of the modulation signal begins (see for example, Figure 12A-12B and col. 21, line 45-52 of Takeuchi).
However, prior art alone or in combination fail to provide the design aspect of a device that performs data communication with a counterpart device via a transmission channel, the device comprising a delay unit configured to delay the first regulation signal by a delay time according to a delay control signal applied thereto and output it as the second regulation signal, a tracker configured to regulate a delay time of the first regulation signal in the delay unit according to a signal-to-noise ratio of a data stream recovered from the digital signal, and apply the delay control signal corresponding to the regulated delay time to the delay unit, and a main controller configured to control the tracker to start regulation of the delay time for the first regulation signal, as recited in independent claim 19.
Objected but Allowable Subject Matters
Claims 2-4, 6-7, 10, 12, 14, 18 are objected to as being dependent upon rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of their respective base claims and any intervening claims.
Claim 8 is objected to as being directly or indirectly dependent upon rejected base claim 1 and the objected claim 7, but would be allowable if rewritten in independent form including all of the limitations of the base claim, plus claim 7 and any intervening claims.
Claim 13 is objected to as being directly or indirectly dependent upon rejected base claim 1 and the objected claim 12, but would be allowable if rewritten in independent form including all of the limitations of the base claim, plus claim 12 and any intervening claims.
Claim 15-17 are objected to as being directly or indirectly dependent upon rejected base claim 1 and the objected claim 14, but would be allowable if rewritten in independent form including all of the limitations of the base claim, plus claim 14 and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure are (See the attached Notice of References Cited (PTO-892)). These prior arts are considered pertinent because they relate generally to communication systems and, more particularly, to communication systems employing spreading frequency spectrum of a clock used to synchronize a data stream when the data stream is transmitted and received between communication devices.
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/BERHANU TADESE/Primary Examiner, Art Unit 2632