Prosecution Insights
Last updated: April 19, 2026
Application No. 18/942,242

METHOD AND DEVICE FOR VIDEO SIGNAL PROCESSING

Non-Final OA §DP
Filed
Nov 08, 2024
Examiner
PEREZ FUENTES, LUIS M
Art Unit
2481
Tech Center
2400 — Computer Networks
Assignee
Guangdong OPPO Mobile Telecommunications Corp., Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
66%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
573 granted / 688 resolved
+25.3% vs TC avg
Minimal -18% lift
Without
With
+-17.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
31 currently pending
Career history
719
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
58.1%
+18.1% vs TC avg
§102
5.9%
-34.1% vs TC avg
§112
2.5%
-37.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 688 resolved cases

Office Action

§DP
DETAILED ACTION 1. This communication is being filed in response to the submission dated on 10/24/2025 in which a three (3) month Shortened Statutory Period for Response has been set. Notice of Pre-AIA or AIA Status 2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Acknowledgements 3. Upon initial entry, claims (1 -20) appear pending on this Application, of which (1, 5, 9, 13 and 17) are the five (5) parallel running independent claims on record. Information Disclosure Statement 4. The Information Disclosure Statement (IDS) that was/were submitted on 11/08/2024, (13 files); 04/15/2025, (1 file); 12/17/2025, (1 file)) is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the IDS has/have been considered by the examiner. Specification 5. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification. Drawings 6. The submitted Drawings on date 11/08/2024, has been accepted and considered under the 37 CFR 1.121 (d). Double Patenting Rejection 7. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g. In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). 7.1. A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). 7.2. Individuals associated with the filing and prosecution of the instant patent application have a duty to disclose information within their knowledge as to other copending United States applications which are "material to patentability" of the application in question. See MPEP §2001.06(b) for more details. 7.3. The five (5) parallel running independent claims (1, 5, 9, 13, 17) and the associated dependencies, in the instant 18/942,242, directed to an Apparatus, CRM and method for video decoding, of the same, being rejected on the ground of nonstatutory obvious-type double patenting, as being unpatentable over the analogous Claims of parent Appl. 17/932,627 (now US 12,143,570 B2). Although the conflicting claims are not identical, they are not patentably distinct from each other, because the claims use similar scope of the invention, and/or similar variations of the same claim language. Instant Application: (18/942,242). Reference: 17/932,627 (US 12,143,570 B2). Claim 1. (Original) A method for video signal processing, performed by a decoder, comprising: determining an intra prediction mode of a current block determining a reference sample used for an intra prediction of the current block; determining a predetermined matrix based on the intra prediction mode; and predicting the current block based on the reference sample and the matrix, comprising: generating a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; performing interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block; and performing re-arrangement on all or part of prediction samples of the generated prediction block. Claim 2. (Original) The method according to claim 1, wherein determining the reference sample comprises: determining a neighboring region of the current block; and performing down-sampling on the determined neighboring region, wherein the neighboring region is divided into a plurality of sample groups, the sample group comprises one or more samples, a representative value of the sample group is determined as the reference sample, and the representative value is one of the following: an average, a minimum, a maximum, a mode value and an intermediate value. Claim 3. (Original) The method according to claim 1, wherein the predetermined positions in the current block are determined based on a ratio of the size of the current block to a size of a sampling block. Claim 4. (Original) The method according to claim 1, wherein the matrix is determined from a plurality of matrix groups by further consideration of a size and shape of the current block. Claim 5. (Original) A method for video signal processing, performed by an encoder, comprising: determining an intra prediction mode of a current block; determining a reference sample used for an intra prediction of the current block; determining a predetermined matrix based on the intra prediction mode; and predicting the current block based on the reference sample and the matrix, comprising: generating a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; performing interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block; and performing re-arrangement on all or part of prediction samples of the generated prediction block. Claim 6. (Original) The method according to claim 5, wherein determining the reference sample comprises: determining a neighboring region of the current block; and performing down-sampling on the determined neighboring region, wherein the neighboring region is divided into a plurality of sample groups, the sample group comprises one or more samples, a representative value of the sample group is determined as the reference sample, and the representative value is one of the following: an average, a minimum, a maximum, a mode value and an intermediate value. Claim 7. (Original) The method according to claim 5, wherein the predetermined positions in the current block are determined based on a ratio of the size of the current block to a size of a sampling block. Claim 8. (Original) The method according to claim 5, wherein the matrix is determined from a plurality of matrix groups by further consideration of a size and shape of the current block. Claim 9. (Original) A decoder, comprising: a processor; and a memory, wherein the memory is configured to store computer programs capable of running in the processor, and when the computer programs are run by the processor, the processor is configured to: determine an intra prediction mode of a current block; determine a reference sample used for an intra prediction of the current block; determine a predetermined matrix based on the intra prediction mode; and generate a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein the processor is further configured to: perform interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block; and perform re-arrangement on all or part of prediction samples of the generated prediction block. 10. (Original) The decoder according to claim 9, wherein the processor is further configured to: determine a neighboring region of the current block; and perform down-sampling on the determined neighboring region, wherein the neighboring region is divided into a plurality of sample groups, the sample group comprises one or more samples, a representative value of the sample group is determined as the reference sample, and the representative value is one of the following: an average, a minimum, a maximum, a mode value and an intermediate value. 11. (Original) The decoder according to claim 9, wherein the predetermined positions in the current block are determined based on a ratio of the size of the current block to a size of a sampling block. 12. (Original) The decoder according to claim 9, wherein the matrix is determined from a plurality of matrix groups by further consideration of a size and shape of the current block. 13. (Original) An encoder, comprising: a processor; and a memory, wherein the memory is configured to store computer programs capable of running in the processor, and when the computer programs are run by the processor, the processor is configured to: determine an intra prediction mode of a current block; determine a reference sample used for an intra prediction of the current block; determine a predetermined matrix based on the intra prediction mode; and generate a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein the processor is further configured to: perform interpolation on the current block based on at least one of the following :the prediction block or reconstructed samples adjacent to the current block; and perform re-arrangement on all or part of prediction samples of the generated prediction block. 14. (Original) The encoder according to claim 13, wherein the processor is configured to: determine a neighboring region of the current block; and perform down-sampling on the determined neighboring region, wherein the neighboring region is divided into a plurality of sample groups, the sample group comprises one or more samples, a representative value of the sample group is determined as the reference sample, and the representative value is one of the following: an average, a minimum, a maximum, a mode value and an intermediate value. Claim 15. (Original) The encoder according to claim 13, wherein the predetermined positions in the current block are determined based on a ratio of the size of the current block to a size of a sampling block. Claim 16. (Original) The encoder according to claim 13, wherein the matrix is determined from a plurality of matrix groups by further consideration of a size and shape of the current block. Claim 17. (New) A non-transitory computer-readable storage medium, having a computer program and a bitstream stored thereon, wherein the computer program, when executed by a processor, enables the processor to perform steps of a method for video signal processing to generate the bitstream, wherein the method for video signal processing comprises: determining an intra prediction mode of a current block; determining a reference sample used for an intra prediction of the current block; determining a predetermined matrix based on the intra prediction mode; and predicting the current block based on the reference sample and the matrix, comprising: generating a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; performing interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block; and performing re-arrangement on all or part of prediction samples of the generated prediction block. Claim 18. (New) The non-transitory computer-readable storage medium according to claim 17, wherein determining the reference sample comprises: determining a neighboring region of the current block; and performing down-sampling on the determined neighboring region, wherein the neighboring region is divided into a plurality of sample groups, the sample group comprises one or more samples, a representative value of the sample group is determined as the reference sample, and the representative value is one of the following: an average, a minimum, a maximum, a mode value and an intermediate value. Claim 19. (New) The non-transitory computer-readable storage medium according to claim 17, wherein the predetermined positions in the current block are determined based on a ratio of the size of the current block to a size of a sampling block. Claim 20. (New) The non-transitory computer-readable storage medium according to claim 17, wherein the matrix is determined from a plurality of matrix groups by further consideration of a size and shape of the current block. Claim 1. A method for video signal processing, performed by a decoder, comprising: determining an intra prediction mode of a current block; determining a reference sample used for an intra prediction of the current block; determining a predetermined matrix based on the intra prediction mode; and predicting the current block based on the reference sample and the matrix, wherein predicting the current block based on the reference sample and the matrix comprises: generating a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein predicting the current block based on the reference sample and the matrix further comprises: performing interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block. Claim 6. A method for video signal processing, performed by an encoder, comprising: determining an intra prediction mode of a current block; determining a reference sample used for an intra prediction of the current block; determining a predetermined matrix based on the intra prediction mode; and predicting the current block based on the reference sample and the matrix, wherein predicting the current block based on the reference sample and the matrix comprises: generating a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein predicting the current block based on the reference sample and the matrix further comprises: performing interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block. Claim 11. A decoder, comprising: a processor; and a memory, wherein the memory is configured to store computer programs capable of running in the processor, and when the computer programs are run by the processor, the processor is configured to: determine an intra prediction mode of a current block; determine a reference sample used for an intra prediction of the current block; determine a predetermined matrix based on the intra prediction mode; and generate a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein the processor is further configured to: perform interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block. Claim 16. An encoder, comprising: a processor; and a memory, wherein the memory is configured to store computer programs capable of running in the processor, and when the computer programs are run by the processor, the processor is configured to: determine an intra prediction mode of a current block; determine a reference sample used for an intra prediction of the current block; determine a predetermined matrix based on the intra prediction mode; and generate a prediction block by applying the matrix to the reference sample, wherein the prediction block is generated at predetermined positions in the current block; wherein the processor is further configured to: perform interpolation on the current block based on at least one of the following: the prediction block or reconstructed samples adjacent to the current block. 7.4. It would have been obvious to one of ordinary skill in the art, at the time the invention was made/filed, to combine the instant 18/942,242, with the above reference 17/932,627 (now US 12,143,570 B2), because although the conflicting claims are not identical, they are not patentably distinct from each other, the claim language uses similar scope of the invention, and/or a similar variation of the same claim language. Claim Objection section 8. The five parallel running independent claims (1, 5, 9, 13, 17) and the associated dependencies, are objected to, because of the judicially created Double patent doctrine (see section (7) above), but they may be considered for allowance if properly rewritten, and/or if a Terminal Disclaimer is timely filed, in compliance with 37 CFR 1.321(c) or 1.321(d). Prior Art Citations 9. The following List of prior art, made of record and not relied upon, is/are considered pertinent to applicant's disclosure: 9.1. Patent Literature: US 12,143,570 B2 Kim; et al. H04N19/105; H04N19/159; H04N19/119; US 12,137,206 B2 Kim; et al. H04N19/105; H04N19/159; H04N19/119; US 11,477,439 B2 Kim; et al. H04N19/105; H04N19/159; H04N19/119; US 11,425,390 B2 Lim; et al. H04N19/119; H04N19/176; H04N19/137; US 11,943,447 B2 Lim; et al. H04N19/159; H04N19/105; H04N19/176; US 2021/0344929 A1 Choi; et al. H04N19/11; H04N19/105; H04N19/70; US 2019/0306511 A1 Jang; et al. H04N19/33; H04N19/176; H04N19/46; 9.2. Non-Patent Literature: _ Intra Prediction via Edge -Based Inpainting; Liu – 2008; _ Efficient multiple line-based intra prediction; Li – 2016; _ Intra Prediction Using Multiple Reference Lines for Video Coding; Li – 2017; CONCLUSIONS 10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUIS PEREZ-FUENTES (luis.perez-fuentes@uspto.gov) whose telephone number is (571) 270 -1168. The examiner can be normally be reached on Monday-Friday 8am-5pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, WILLIAM VAUGHN can be reached on (571) 272-3922. The fax phone number for the organization where this application or proceeding is assigned is (571) 272 -3922. Information regarding the status of an application may be obtained from Patent Application Information Retrieval (PAIR) system. Status information for published Applic. may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800) 786 -9199 (USA OR CANADA) or (571) 272 -1000. /LUIS PEREZ-FUENTES/ Primary Examiner, Art Unit 2481.
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Prosecution Timeline

Nov 08, 2024
Application Filed
Jan 06, 2026
Non-Final Rejection — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
66%
With Interview (-17.8%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 688 resolved cases by this examiner. Grant probability derived from career allow rate.

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