Prosecution Insights
Last updated: October 26, 2026
Application No. 18/943,045

N-PATH FILTER

Final Rejection §103
Filed
Nov 11, 2024
Priority
Jun 10, 2022 — JP 2022-094151 +1 more
Examiner
PERENY, TYLER J
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Murata Manufacturing Co., Ltd.
OA Round
2 (Final)
95%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allowance Rate
174 granted / 183 resolved
+27.1% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
21 currently pending
Career history
221
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
54.8%
+14.8% vs TC avg
§102
20.7%
-19.3% vs TC avg
§112
21.4%
-18.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 183 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6, 9-12, 15, & 18 are rejected under 35 U.S.C. 103 as being unpatentable over Zare Hoseini (WO 2019/219204 A1), hereinafter Zare, in view of Ross et al. (US 10,454,724 B2), hereinafter Ross. Regarding claim 1, Zare discloses, in figure 9, an N-path filter comprising: a first signal terminal (902), a second signal terminal (904), and a third signal terminal (905); N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) that are connected in parallel with each other between the first signal terminal (902) and the second signal terminal (904), N being an integer greater than or equal to 3 (N=4); and N second signal paths (paths including modulators 912-1 to 912-4, N=4); wherein each of the N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) includes: a first modulator (910-1 to 910-4) connected to the first signal terminal (902) to modulate an input signal input from the first signal terminal (902) or the second signal terminal (904); a second modulator (914-1 to 914-4) connected to the second signal terminal (904) to modulate the input signal (pg. 16, lines 16-21, “the third switching circuits 914-1 to 914-4 are situated between the first output port 904 and the corresponding low pass filter circuit, periodic activation of a third switching circuit 914-i of a path i up-converts the filtered baseband signal generated by the corresponding low-pass filter circuit 908-i to the original band of the input signal and provides the up-converted signal to the first output port 904”); and a base filter (pg. 16, lines 1902-, “low-pass filter circuit 908-i”….908-1 to 908-4) connected between the first modulator and the second modulator (908-1 to 904-4 coupled between 910-1 to 910-4 and 914-1 to 914-4); each of the N second signal paths (paths including modulators 912-1 to 912-4) connects a node on one of the first signal paths (nodes at the intersection between 912-i and 914-i) to the third signal terminal (905) and includes a third modulator (912-1 to 914-4) connected to the third signal terminal (905) to modulate the input signal input from the first signal terminal (902) or the third signal terminal (905); the base filter (908-1 to 904-4) includes a series arm element including a reactance component (C1 to C4); each of the first modulator (910-1 to 910-4) and the second modulator (914-1 to 914-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N first signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); the third modulator (912-1 to 912-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N second signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); and a phase of the one of the drive signals to drive the second modulator (914-1 to 914-4) is opposite to a phase of the one of the drive signals to drive the third modulator (912-1 to 912-4, pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path), but does not explicitly disclose each series arm element is connected in series in a corresponding one of the N second signal paths. However, Ross discloses, in figure 8, each series arm element (filter networks 61-64) is connected in series in a corresponding one of the N second signal paths (Col. 9, Lines 62-65, “filter networks…can be implemented in a wide variety of ways, including but not limited to, using single order filters, higher order filters, passive filters, active filters, and/or switched capacitor filters.”…i.e., each series arm element of a high-pass filter that may be utilized as the filter network is connected in series in a corresponding one of the N second signal paths 41-44 of 100b). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the series configuration of Ross in the N second signal paths of Zare, to achieve the benefit of implementing the multipath filter with a finely tuned frequency response (Ross, Col. 9, Lines 56-61). Regarding claim 2, Zare in view of Ross disclose the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, wherein a difference between the phase of the one of the drive signals to drive the second modulator and the phase of the one of the drive signals to drive the third modulator is greater than or equal to about 174.261° and less than or equal to about 185.739° (pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). Regarding claim 3, Zare in view of Ross disclose the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, wherein the first modulator (910-i) includes a first switch connecting (S1-1, S2-1, S3-1, & S4-1) and disconnecting the first signal terminal to and from the base filter according to the one of the drive signals (first switches connect/disconnect the first signal terminal 902 to/from the base filters 908-1 to 908-4); the second modulator (914-i) includes a second switch (S1-3, S2-3, S3-3, & S4-3) connecting and disconnecting the second signal terminal to and from the base filter according the one of the drive signals (second switches connect/disconnect the second signal terminal 904 to/from the base filters 908-1 to 908-4); and the third modulator (912-i) includes a third switch (S1-2, S2-2, S3-2, & S4-2) connecting and disconnecting the third signal terminal to and from the base filter according to the one of the drive signals (third switches connect/disconnect the third signal terminal 905 to/from the base filters 908-1 to 908-4). Regarding claim 6, Zare in view of Ross disclose the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, wherein the base filter is one of an acoustic wave filter, a filter including an inductor and a capacitor, or a filter including a dielectric resonator (pg. 15, lines 15-17, “each low pass filter circuit 908-i is formed by a capacitor C i in parallel with a resistor R i. However, it will be evident to a person of skill in the art that this is only an example of a low pass filter circuit and that other low-pass filter circuits may be used”). Regarding claim 9, Zare in view of Ross disclose the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, wherein a difference between the phase of the one of the drive signals to drive the second modulator and the phase of the one of the drive signals to drive the third modulator is greater than or equal to about 176.173° and less than or equal to about 183.826° (pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). Regarding claim 10, Zare in view of Ross disclose the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, a radio frequency module (pg. 20, lines 15-16, “the converters are used in a radio receiver”) comprising: at least one N-path filter according to claim 1 (converter 900); and at least one amplifier connected to the at least one N-path filter (amplifier 920 coupled to converter 900). Regarding claim 11, Zare in view of Ross disclose the radio frequency module according to claim 10, and Zare continues to disclose, in figure 9, wherein a difference between the phase of the one of the drive signals to drive the second modulator and the phase of the one of the drive signals to drive the third modulator is greater than or equal to about 174.261° and less than or equal to about 185.739° (pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). Regarding claim 12, Zare in view of Ross disclose the radio frequency module according to claim 10, and Zare continues to disclose, in figure 9, wherein the first modulator (910-i) includes a first switch connecting (S1-1, S2-1, S3-1, & S4-1) and disconnecting the first signal terminal to and from the base filter according to the one of the drive signals (first switches connect/disconnect the first signal terminal 902 to/from the base filters 908-1 to 908-4); the second modulator (914-i) includes a second switch (S1-3, S2-3, S3-3, & S4-3) connecting and disconnecting the second signal terminal to and from the base filter according the one of the drive signals (second switches connect/disconnect the second signal terminal 904 to/from the base filters 908-1 to 908-4); and the third modulator (912-i) includes a third switch (S1-2, S2-2, S3-2, & S4-2) connecting and disconnecting the third signal terminal to and from the base filter according to the one of the drive signals (third switches connect/disconnect the third signal terminal 905 to/from the base filters 908-1 to 908-4). Regarding claim 15, Zare in view of Ross disclose the radio frequency module according to claim 10, and Zare continues to disclose, in figure 9, wherein the base filter is one of an acoustic wave filter, a filter including an inductor and a capacitor, or a filter including a dielectric resonator (pg. 15, lines 15-17, “each low pass filter circuit 908-i is formed by a capacitor C i in parallel with a resistor R i. However, it will be evident to a person of skill in the art that this is only an example of a low pass filter circuit and that other low-pass filter circuits may be used”). Regarding claim 18, Zare in view of Ross disclose the radio frequency module according to claim 10, and Zare continues to disclose, in figure 9, wherein a difference between the phase of the one of the drive signals to drive the second modulator and the phase of the one of the drive signals to drive the third modulator is greater than or equal to about 176.173° and less than or equal to about 183.826° (pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). Claims 4 & 13 are rejected under 35 U.S.C. 103 as being unpatentable over Zare in view of Ross, as applied to claims 1-3, 6, 9-12, 15, & 18 above, and further in view of Zare Hoseini (WO 2019/219212 A1), hereinafter Zare 212. Regarding claim 4, Zare in view of Ross discloses the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, a signal input terminal and a signal output terminal (terminals 902, 904 & 905); wherein the signal input terminal is the first signal terminal (902), but fails to disclose wherein the signal output terminal is connected to the second signal terminal and the third signal terminal. However, Zare 212 discloses, in figure 6, wherein the signal output terminal is connected to the second signal terminal and the third signal terminal (V_OUT is connected to the second signal terminal 504 and the third signal terminal constituted as the output from paths 506-1 to 506-N). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the single output of Zare 212 in the N-path filter of Zare and Ross, to achieve the benefit of improving out-of-band rejection in the filter circuit with no direct shorting connection between the input port and the output (Zare 212, Para [0067] & [0068]). Regarding claim 13, Zare in view of Ross discloses the radio frequency module of claim 10, and Zare continues to disclose, in figure 9, wherein each of the at least one N-path filter includes a signal input terminal and a signal output terminal (terminals 902, 904 & 905); wherein the signal input terminal is the first signal terminal (902), but fails to disclose wherein the signal output terminal is connected to the second signal terminal and the third signal terminal. However, Zare 212 discloses, in figure 6, wherein the signal output terminal is connected to the second signal terminal and the third signal terminal (V_OUT is connected to the second signal terminal 504 and the third signal terminal constituted as the output from paths 506-1 to 506-N). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the single output of Zare 212 in the N-path filter of Zare and Ross, to achieve the benefit of improving out-of-band rejection in the filter circuit with no direct shorting connection between the input port and the output (Zare 212, Para [0067] & [0068]). Claims 5, 8, 14, & 17 are rejected under 35 U.S.C. 103 as being unpatentable over Zare in view of Ross, as applied to claims 1-3, 6, 9-12, 15, & 18 above, and further in view of Floyd et al. (US 2015/0288392 A1), hereinafter Floyd. Regarding claim 5, Zare in view of Ross discloses the N-path filter according to claim 1, and Zare continues to disclose, in figure 9, a signal input terminal and a signal output terminal (terminals 902, 904 & 905); and the signal input terminal is the first signal terminal (902), but fails to disclose a balanced-unbalanced conversion element including two balanced terminals and one unbalanced terminal; one of the two balanced terminals is connected to the second signal terminal; another one of the two balanced terminals is connected to the third signal terminal; and the signal output terminal is connected to the unbalanced terminal. However, Floyd discloses, in figure 3 & 8, a balanced-unbalanced conversion element including two balanced terminals and one unbalanced terminal (output trifilar balun); one of the two balanced terminals is connected to the second signal terminal (one of the two balanced terminals of the output balun is connected to the second signal terminal of the N-path notch filter 308 via the node from LO1, LO2, and LO8); another one of the two balanced terminals is connected to the third signal terminal (the second balanced terminal of the output balun is connected to the third signal terminal of the N-path notch filter 308 via the node from LO4, LO5, and LO3; and the signal output terminal is connected to the unbalanced terminal (OUT of the output trifilar balun is connected to the unbalanced terminal). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the balun of Floyd in the N-path filter of Zare and Ross, to achieve the benefit of producing a filtered signal with reduced insertion loss when dealing with unequal signals (Floyd, Para [0028]). Regarding claim 8, the combination of Zare, Ross, and Floyd disclose the N-path filter according to claim 5, and Floyd continues to disclose in figure 3, wherein the balanced-unbalanced conversion element includes a Balun including a primary coil and a secondary coil (the balanced-unbalanced conversion element is the trifilar balun including a primary coil connected to the N-path notch filter 308 and the secondary coil connected to the output OUT). Regarding claim 14, Zare in view of Ross discloses the radio frequency module according to claim 10, and Zare continues to disclose, in figure 9, wherein each of the at least one N-path filter includes a signal input terminal and a signal output terminal (terminals 902, 904 & 905); and the signal input terminal is the first signal terminal (902), but fails to disclose a balanced-unbalanced conversion element including two balanced terminals and one unbalanced terminal; one of the two balanced terminals is connected to the second signal terminal; another one of the two balanced terminals is connected to the third signal terminal; and the signal output terminal is connected to the unbalanced terminal. However, Floyd discloses, in figure 3 & 8, a balanced-unbalanced conversion element including two balanced terminals and one unbalanced terminal (output trifilar balun); one of the two balanced terminals is connected to the second signal terminal (one of the two balanced terminals of the output balun is connected to the second signal terminal of the N-path notch filter 308 via the node from LO1, LO2, and LO8); another one of the two balanced terminals is connected to the third signal terminal (the second balanced terminal of the output balun is connected to the third signal terminal of the N-path notch filter 308 via the node from LO4, LO5, and LO3; and the signal output terminal is connected to the unbalanced terminal (OUT of the output trifilar balun is connected to the unbalanced terminal). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include the balun of Floyd in the N-path filter of Zare and Ross, to achieve the benefit of producing a filtered signal with reduced insertion loss when dealing with unequal signals (Floyd, Para [0028]). Regarding claim 17, the combination of Zare, Ross, and Floyd disclose the radio frequency module according to claim 14, and Floyd continues to disclose in figure 3, wherein the balanced-unbalanced conversion element includes a Balun including a primary coil and a secondary coil (the balanced-unbalanced conversion element is the trifilar balun including a primary coil connected to the N-path notch filter 308 and the secondary coil connected to the output OUT). Allowable Subject Matter Claims 7 & 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 19-20 are allowed. Regarding claim 19, Zare discloses, in figure 9, an N-path filter comprising: a first signal terminal (902), a second signal terminal (904), and a third signal terminal (905); N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) that are connected in parallel with each other between the first signal terminal (902) and the second signal terminal (904), N being an integer greater than or equal to 3 (N=4); and N second signal paths (paths including modulators 912-1 to 912-4, N=4); wherein each of the N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) includes: a first modulator (910-1 to 910-4) connected to the first signal terminal (902) to modulate an input signal input from the first signal terminal (902) or the second signal terminal (904); a second modulator (914-1 to 914-4) connected to the second signal terminal (904) to modulate the input signal (pg. 16, lines 16-21, “the third switching circuits 914-1 to 914-4 are situated between the first output port 904 and the corresponding low pass filter circuit, periodic activation of a third switching circuit 914-i of a path i up-converts the filtered baseband signal generated by the corresponding low-pass filter circuit 908-i to the original band of the input signal and provides the up-converted signal to the first output port 904”); and a base filter (pg. 16, lines 1902-, “low-pass filter circuit 908-i”….908-1 to 908-4) connected between the first modulator and the second modulator (908-1 to 904-4 coupled between 910-1 to 910-4 and 914-1 to 914-4); each of the N second signal paths (paths including modulators 912-1 to 912-4) connects a node on one of the first signal paths (nodes at the intersection between 912-i and 914-i) to the third signal terminal (905) and includes a third modulator (912-1 to 914-4) connected to the third signal terminal (905) to modulate the input signal input from the first signal terminal (902) or the third signal terminal (905); the base filter (908-1 to 904-4) includes a series arm element including a reactance component (C1 to C4); each of the first modulator (910-1 to 910-4) and the second modulator (914-1 to 914-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N first signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); the third modulator (912-1 to 912-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N second signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); and a phase of the one of the drive signals to drive the second modulator (914-1 to 914-4) is opposite to a phase of the one of the drive signals to drive the third modulator (912-1 to 912-4, pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). However, none of the prior art or combination thereof teaches or fairly suggests the following features in combination with the other limitations of the claim: when Zo is a terminal impedance at the first signal terminal of the N-path filter and Zb is an input/output impedance on a side of the base filter closer to the first signal terminal, a relationship represented by (Zb - N x Zo) / (Zb + N x Zo) < about 0.316 is satisfied. Regarding claim 20, Zare discloses, in figure 9, a radio frequency module comprising: at least one N-path filter (converter 900); and at least one amplifier connected to the at least one N-path filter (amplifier 920 coupled to converter 900); wherein each of the at least one N-path filter (900) includes: a first signal terminal (902), a second signal terminal (904), and a third signal terminal (905); N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) that are connected in parallel with each other between the first signal terminal (902) and the second signal terminal (904), N being an integer greater than or equal to 3 (N=4); and N second signal paths (paths including modulators 912-1 to 912-4, N=4); wherein each of the N first signal paths (906-1, 906-2, 906-3 with 908-3 & 908-4) includes: a first modulator (910-1 to 910-4) connected to the first signal terminal (902) to modulate an input signal input from the first signal terminal (902) or the second signal terminal (904); a second modulator (914-1 to 914-4) connected to the second signal terminal (904) to modulate the input signal (pg. 16, lines 16-21, “the third switching circuits 914-1 to 914-4 are situated between the first output port 904 and the corresponding low pass filter circuit, periodic activation of a third switching circuit 914-i of a path i up-converts the filtered baseband signal generated by the corresponding low-pass filter circuit 908-i to the original band of the input signal and provides the up-converted signal to the first output port 904”); and a base filter (pg. 16, lines 1902-, “low-pass filter circuit 908-i”….908-1 to 908-4) connected between the first modulator and the second modulator (908-1 to 904-4 coupled between 910-1 to 910-4 and 914-1 to 914-4); each of the N second signal paths (paths including modulators 912-1 to 912-4) connects a node on one of the first signal paths (nodes at the intersection between 912-i and 914-i) to the third signal terminal (905) and includes a third modulator (912-1 to 914-4) connected to the third signal terminal (905) to modulate the input signal input from the first signal terminal (902) or the third signal terminal (905); the base filter (908-1 to 904-4) includes a series arm element including a reactance component (C1 to C4); each of the first modulator (910-1 to 910-4) and the second modulator (914-1 to 914-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N first signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); the third modulator (912-1 to 912-4) is drivable by one of drive signals that modulate the input signal with a phase that completes one cycle T across the N second signal paths (pg. 17, lines 11-29, “each of the first switching circuits 910-1 to 910-4 is activated by a corresponding control signal that is a phase-shifted version of a local oscillator signal (LO) wherein each control signal has a duty cycle equal to 1/N of the LO period…second and third switching circuits 912-1 to 912-4 and 914-1 to 914-4 are activated in the same sequence as the corresponding first switching circuits 910-1 to 910-4”); and a phase of the one of the drive signals to drive the second modulator (914-1 to 914-4) is opposite to a phase of the one of the drive signals to drive the third modulator (912-1 to 912-4, pg. 18, Table 3, discloses phase differences of 180 degrees between 912-i and 914-I of each path). However, none of the prior art or combination thereof teaches or fairly suggests the following features in combination with the other limitations of the claim: when Zo is a terminal impedance at the first signal terminal of the N-path filter and Zb is an input/output impedance on a side of the base filter closer to the first signal terminal, a relationship represented by (Zb - N x Zo) / (Zb + N x Zo) < about 0.316 is satisfied. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER J PERENY whose telephone number is (571)272-4189. The examiner can normally be reached M-F 7:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Taelor Kim can be reached at (571) 270-7166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TYLER J PERENY/ Examiner, Art Unit 2836
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Prosecution Timeline

Nov 11, 2024
Application Filed
Mar 10, 2026
Non-Final Rejection mailed — §103
Aug 04, 2026
Response Filed
Oct 13, 2026
Final Rejection mailed — §103 (current)

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3-4
Expected OA Rounds
95%
Grant Probability
99%
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2y 0m (~1m remaining)
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