Prosecution Insights
Last updated: July 17, 2026
Application No. 18/943,100

IMAGE SENSOR AND IMAGE CAPTURING APPARATUS

Final Rejection §103
Filed
Nov 11, 2024
Priority
Nov 30, 2023 — JP 2023-203118
Examiner
PHAM, QUAN L
Art Unit
2637
Tech Center
2600 — Communications
Assignee
Canon Inc.
OA Round
2 (Final)
70%
Grant Probability
Favorable
3-4
OA Rounds
8m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 70% — above average
70%
Career Allowance Rate
343 granted / 490 resolved
+8.0% vs TC avg
Strong +28% interview lift
Without
With
+28.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
32 currently pending
Career history
529
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
78.2%
+38.2% vs TC avg
§102
7.2%
-32.8% vs TC avg
§112
8.6%
-31.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 490 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This communication is responsive to the Amendment filed on 4/20/2026. In the Instant Amendment, Claim(s) 1 and 3-8 has/have been amended; Claim(s) 1 is/are independent claims. Claims 1-11 have been examined and are pending in this application. Response to Arguments The claim interpretations under 35 U.S.C 112(f) are withdrawn because of the amendment and the persuasive argument in the remark (page 6). Applicant's arguments filed 4/20/2026 have been fully considered but they are not persuasive. Applicant’s arguments in the remarks (pages 7-10) with respect to claim(s) 1 and 8 regarding newly added features about compression units have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3, 5 and 8-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (US 20160198110 A1) in view of Okita (JP-6723709-B2). Regarding claim 1, Ikedo teaches An image sensor, comprising: a pixel unit (700/1100) in which unit pixels are arrayed in a matrix, the unit pixels each including one microlens and a plurality of photoelectric conversion elements (Figs. 7, 12); at least one processor or circuit configured to function as following units: a readout unit (1200) configured to read out signals from the pixel unit, the readout unit being capable of performing a first readout operation (Fig. 8B) of reading out mixed signals obtained by mixing signals of the plurality of photoelectric conversion elements of the unit pixels, and a second readout operation (Fig. 9) of reading out unmixed signals which are not a mixture of signals of the plurality of photoelectric conversion elements of the unit pixels (Figs. 7, 8B, 9; para. 0066); a sorting unit (1300) configured to store signals obtained through the first readout operation and the second readout operation into captured image signals and focus detection signals (Fig. 12; para. 0084); a first output unit (1301, 1303) configured to output the captured image signals (Fig. 12); and a second output unit (1302, 1304) configured to output the focus detection signals (Fig. 12), but fails to teach a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit. However, in the same field of endeavor Okita teaches a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit (Figs. 1, 8; page 8: “lossless compression processing unit 806 performs lossless compression processing by encoding on each of the images input from the A+B image generation unit 801 and the A image defective row correction unit 800, and the lossless data is stored in the memory 132 via the memory interface 804” before outputting the compressed data to bus 150 then memory 132). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Okita in Ikedo to have a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit for reducing image signal and phase difference data amount for transfer and storage so that data transfer or storage between the image sensor and external devices can be optimized yielding a predicted result Regarding claim 2, the combination of Ikedo and Okita teaches everything as claimed in claim 1. In addition, Ikedo teaches wherein with respect to the unit pixels in a first region (image capture region 701) of the pixel unit, the first readout operation is performed and the mixed signals are read out, and with respect to a second region (an image capture and focus detection region 702) different from the first region of the pixel unit, the first readout operation and the second readout operation are performed and the mixed signals and the unmixed signals are read out (Figs. 7’s; para. 0064). Regarding claim 3, the combination of Ikedo and Okita teaches everything as claimed in claim 2. In addition, Ikedo teaches wherein the sorting unit distributes the mixed signals that have been read out from the first region to the first output unit, and distributes the mixed signals and the unmixed signals that have been read out from the second region to the second output unit (Figs. 7-9, 12; paras. 0064, 0084). Regarding claim 5, the combination of Ikedo and Okita teaches everything as claimed in claim 1. In addition, Ikedo teaches wherein the at least one processor or circuit is configured to further function as a resize unit configured to reduce the focus detection signals before the focus detection signals are output from the second output unit (Fig. 7’s; para. 0069). Regarding claim 8, Ikedo teaches An image capturing apparatus (Fig. 2), comprising: an image sensor (1000) including a pixel unit (700/1100) in which unit pixels are arrayed in a matrix, the unit pixels each including one microlens and a plurality of photoelectric conversion elements, and at least one processor or circuit configured to function as following units: a readout unit (1200) configured to read out signals from the pixel unit, the readout unit being capable of performing a first readout operation (Fig. 8B) of reading out mixed signals obtained by mixing signals of the plurality of photoelectric conversion elements of the unit pixels, and a second readout operation (Fig. 9) of reading out unmixed signals which are not a mixture of signals of the plurality of photoelectric conversion elements of the unit pixels (Figs. 7, 8B, 9; para. 0066), a sorting unit (1300) configured to store signals obtained through the first readout operation and the second readout operation into captured image signals and focus detection signals, a first output unit (1301, 1303) configured to output the captured image signals, and a second output unit (1302, 1304) configured to output the focus detection signals (Fig. 12; para. 0084); and at least second one processor or circuit (Fig. 2; 1001, 1004) configured to function as: a first processing unit (1001) configured to process the captured image signals output from the first output unit (Fig. 2; para. 0031); and a second processing unit (1004) configured to process the focus detection signals output from the second output unit (Fig. 2; para. 0031), but fails to teach a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit. However, in the same field of endeavor Okita teaches a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit (Figs. 1, 8; page 8: “lossless compression processing unit 806 performs lossless compression processing by encoding on each of the images input from the A+B image generation unit 801 and the A image defective row correction unit 800, and the lossless data is stored in the memory 132 via the memory interface 804” before outputting the compressed data to bus 150 then memory 132). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Okita in Ikedo to have a first compression unit configured to encode the captured image signals sorted by the sorting unit; a second compression unit configured to encode the focus detection signals sorted by the sorting unit; a first output unit configured to output the captured image signals encoded by the first compression unit; and a second output unit configured to output the focus detection signals encoded by the second compression unit for reducing image signal and phase difference data amount for transfer and storage so that data transfer or storage between the image sensor and external devices can be optimized yielding a predicted result. Regarding claim 9, the combination of Ikedo and Okita teaches everything as claimed in claim 8. In addition, Ikedo teaches wherein the first processing unit transmits the captured image signals to the second processing unit (Fig. 2; para. 0031). Regarding claim 10, the combination of Ikedo and Okita teaches everything as claimed in claim 9. In addition, Ikedo teaches wherein the second processing unit records the captured image signals into a recording medium (Fig. 2; para. 0031). Regarding claim 11, the combination of Ikedo and Okita teaches everything as claimed in claim 8. In addition, Ikedo teaches wherein the second processing unit performs focus detection based on the focus detection signals (Fig. 2; para. 0031). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (US 20160198110 A1) in view of Okita (JP-6723709-B2) as applied to claim 1 above, and further in view of Nishida (US 7050202 B1). Regarding claim 4, the combination of Ikedo and Okita teaches everything as claimed in claim 1 (Figs. 7-9; A+B image signal has higher resolution than AF image signal), but fails to teach wherein a communication speed at which signals are output from the first output unit is higher than a communication speed at which signals are output from the second output unit. However, in the same field of endeavor Nishida teaches wherein a communication speed at which signals are output from the first output unit is higher than a communication speed at which signals are output from the second output unit (col. 12, lines 23-27: “low resolution image data is transmitted at a slower transmission speed and high resolution image data is transmitted at a faster transmission speed”). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Nishida in the combination to have wherein a communication speed at which signals are output from the first output unit is higher than a communication speed at which signals are output from the second output unit for shortening time taken for image transferring optimizing image data transfer speed yielding a predicted result. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (US 20160198110 A1) in view of Okita (JP-6723709-B2) as applied to claim 1 above, and further in view of Wakabayashi (US 20150163403 A1). Regarding claim 6, the combination of Ikedo and Okita teaches everything as claimed in claim 1, but fails to teach further comprising a memory configured to adjust a processing speed in accordance with a communication speed of the second output unit. However, in the same field of endeavor Wakabayashi teaches further comprising a memory configured to adjust a processing speed in accordance with a communication speed of the second output unit (Fig. 2; para. 0149: “allowing the readout speed by the data processing unit 33, that is, data output rate, to be lower than the transfer speed of the pixel data to the memory unit 32, reduction of the channels of the interface unit 38 and lower processing speed of the signal processing block (for example, DSP) in the latter stage can be realized. This can contribute to low power consumption of the entire system including the signal processing block in the latter stage”). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Wakabayashi in the combination to have further comprising a memory configured to adjust a processing speed in accordance with a communication speed of the second output unit for realizing high-speed readout of pixel data with lower power consumption yielding a predicted result. Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ikedo (US 20160198110 A1) in view of Okita (JP-6723709-B2) as applied to claim 1 above, and further in view of Ito (US 20170307371 A1). Regarding claim 7, the combination of Ikedo and Okita teaches everything as claimed in claim 1, but fails to teach wherein the sorting unit transmits the focus detection signals to the second compression unit once every multiple frames. However, in the same field of endeavor Ito teaches wherein the sorting unit transmits the focus detection signals to the second compression unit once every multiple frames (Fig. 8; paras. 0064-0066). Therefore, it would have been obvious to one of ordinary skill in this art before the effective filing date of the claimed invention (AIA ) to use the teachings as taught by Ito in the combination to have wherein the sorting unit transmits the focus detection signals to the second compression unit once every multiple frames for making less prominent a difference in level of the noise signal between the regions in the imaging element yielding a predicted result. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Quan Pham whose telephone number is (571)272-4438. The examiner can normally be reached Mon-Fri 9am-7pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at (571) 272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Quan Pham/Primary Examiner, Art Unit 2637
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Prosecution Timeline

Nov 11, 2024
Application Filed
Feb 04, 2026
Non-Final Rejection mailed — §103
Apr 20, 2026
Response Filed
Jul 01, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
70%
Grant Probability
98%
With Interview (+28.1%)
2y 4m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 490 resolved cases by this examiner. Grant probability derived from career allowance rate.

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