Prosecution Insights
Last updated: April 19, 2026
Application No. 18/943,113

METHOD OF MANUFACTURING THERMOELECTRIC GENERATORS

Non-Final OA §103§112
Filed
Nov 11, 2024
Examiner
GOLDEN, ANDREW J
Art Unit
1726
Tech Center
1700 — Chemical & Materials Engineering
Assignee
STMicroelectronics
OA Round
1 (Non-Final)
42%
Grant Probability
Moderate
1-2
OA Rounds
3y 4m
To Grant
81%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allow Rate
261 granted / 623 resolved
-23.1% vs TC avg
Strong +40% interview lift
Without
With
+39.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
44 currently pending
Career history
667
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
51.5%
+11.5% vs TC avg
§102
19.4%
-20.6% vs TC avg
§112
25.3%
-14.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 623 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Election/Restrictions Applicant’s election without traverse of the invention of Group I and Species B directed to claims 1-7 and 9-18 in the reply filed on 11 December 2025 is acknowledged. Claim 8 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Claims 19-23 directed to non-elected invention of Group II are cancelled by applicant’s amendments to the claims filed with the response dated 11 December 2025. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-7 and 9-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “providing at the second surface of the thermoelectric membrane an encapsulation of the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane” which renders claim 1 indefinite as it’s unclear by this phrasing if the encapsulation is materially made of the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane or an additional layer of an encapsulant on the second thermally conductive material and thermoelectric membrane. For this reason, the scope of claim 1 cannot be reasonably determined and is rendered indefinite. Claims 2-7 and 9-18 are also rendered indefinite by depending from indefinite claim 1. Claim 13 recites “providing an array of thermoelectric units sharing a common thermoelectric membrane” where it’s unclear if this is addition to the thermoelectric unit including a thermoelectric membrane recited in claim 1 or if the thermoelectric unit including a thermoelectric membrane recited in claim 1 means to be one of the array of thermoelectric units sharing a common thermoelectric membrane. For this reason, the scope of claim 13 cannot be reasonably determined and is rendered indefinite. Claims 14-18 are also rendered indefinite by depending from indefinite claim 13. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1, and 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in further view of Watanabe (US 2019/0019934), and further in view of Zoller et al (US 2018/0090659) and in further view of Yoo et al (US 2019/0115270). Regarding claim 1 Leonov discloses a method, comprising: providing a thermoelectric unit including a thermoelectric membrane ([0096], [0102] Figs. 3 or 22-23 see: first thermoelectric material film 82 and second thermoelectric material film 84 on membrane 34) having a first surface at a cavity in a layer of first thermally conductive material ([0096], Figs. 3 or 22-23 see: opening between sides 33 of a thermally conductive carrier frame), wherein the thermoelectric membrane has a second surface opposite to the first surface with a second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane ([0123] Figs. 3 or 22-23 see: interconnects 32 or thermal shunts 90 performing function of thermal connection contact opposite sides of thermoelectric material films 82, 84), wherein the thermoelectric membrane includes a thermally sensitive material configured to generate, via a Seebeck effect, a thermoelectric signal indicative of a temperature difference between the second thermally conductive material and the first thermally conductive material ([0096]-[0097], [0102] Figs. 3 or 22-23 see: first thermoelectric material film 82 and second thermoelectric material film 84 generate a voltage based on temperature difference between a hot side 35 and cold side 36 as in Figs. 48-49 paras [0144]-[0145] contacting a hot or cold plates 37, 38) and Leonov discloses forming an insulating molding compound onto the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane ([0032], [0097], [0145], Fig. 49 see: the thermopile unit 50 can further include thermal insulation 51 including thermally insulating such as encapsulating structures where thermally insulating material can completely or partially surround the inner volume in between the hot plate 37 and the cold plate 38). Leonov does not explicitly disclose molding said insulating molding compound wherein said molding develops a mechanical stress in the thermoelectric membrane and providing at the second surface of the thermoelectric membrane an encapsulation of the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane, wherein the encapsulation counters mechanical stress developed in the thermoelectric membrane. Watanabe discloses forming a thermoelectric unit including a thermoelectric membrane including providing at the second surface of the thermoelectric membrane an encapsulation of the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane (Watanabe, [0046], [0071]-[0073], Figs. 1-3 see: protection layer 16 formed on first electrodes 14a of a rigid resin) to protect the thermoelectric material and electrodes from abrasion and oxidation (Watanabe, [0071]-[0073]). Watanabe and Leonov are combinable as they are both concerned with the field of thermoelectric units. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Watanabe to further include providing at the second surface of the thermoelectric membrane of Leonov an encapsulation of the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane as in Watanabe (Watanabe, [0046], [0071]-[0073], Figs. 1-3 see: protection layer 16 formed on first electrodes 14a of a rigid resin) to protect the thermoelectric material and electrodes of Leonov from abrasion and oxidation as taught by Watanabe ([0071]-[0073]). Furthermore, Zoller discloses manufacturing a thermoelectric device module including molding insulating molding compound onto a second thermally conductive material arranged in contact with a second surface of the thermoelectric device (Zoller, [0019], [0047], [0054], [0061]-[0062], Figs. 4-5 and 8 see: molding mold compound 500 onto TEG upper side 106 including layer tolerance compensating layer or thermal pad 802) wherein said molding develops a mechanical stress in the thermoelectric device and providing at the second surface of the thermoelectric device a layer which counters mechanical stress developed in the thermoelectric membrane (Zoller, [0042] [0061]-[0062] Fig. 8 see: the packaging and production process (molding) exerts stresses on the TEG which can be compensated with a tolerance compensating layer or a thermal pad 802 at TEG upper side 106). Additionally, Yoo also teaches in semiconductor device manufacturing and packaging, the molding process develops a stress and warpage from the different CTEs of the materials (Yoo, [0003]) where Yoo solves this problem through providing a stiffening layer between the semiconductor device and the molding compound to counteract the stress placed on the other components of the semiconductor device assembly due to warpage at an elevated temperature (Yoo, [0023], [0027] Fig. 1 see: stiffener member 130 between semiconductor device 120 and mold compound 140). Zoller and modified Leonov are combinable as they are both concerned with the field of thermoelectric units. Yoo and modified Leonov are combinable as they are both concerned with semiconductor device manufacture and Yoo is reasonably pertinent to the particular problem of counteracting stress during molding processing with which the inventor was concerned. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Zoller such that the insulating compound of Leonov is an insulating molding compound applied by molding as in Zoller (Zoller, [0019], [0047], [0054], [0061]-[0062], Figs. 4-5 and 8 see: molding mold compound 500 onto TEG upper side 106) as such a modification would have amounted to the use of a known insulating material forming step for its intended use in a known thermoelectric generator manufacturing process to accomplish an entirely expected result of providing thermal insulation to the device of Leonov. Furthermore, as Zoller discloses that said molding develops a mechanical stress in the thermoelectric device, and providing at the second surface of the thermoelectric device a layer which counters mechanical stress developed in the thermoelectric membrane (Zoller, [0042] [0061]-[0062] Fig. 8 see: the packaging and production process (molding) exerts stresses on the TEG which can be compensated with a tolerance compensating layer or a thermal pad 802 at TEG upper side 106) and Yoo teaches in semiconductor device molding methods, such layers for counteracting molding stress include stiffener layers (Yoo, [0023], [0027] Fig. 1 see: stiffener member 130 between semiconductor device 120 and mold compound 140), it would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov such that the encapsulation of the second thermally conductive material of modified Leonov (protection layer 16 of a rigid polymer) provides such a function of counteracting molding stress for the purpose of preventing warping or breakage of the thermoelectric device of Leonov as taught by Zoller (Zoller, [0042] [0061]-[0062]) and Yoo (Yoo, [0023], [0027]). Regarding claim 5 modified Leonov discloses the method of claim 1, and Watanabe further discloses comprising providing the encapsulation of the second thermally conductive material with the second thermally conductive material arranged between the encapsulation and the second surface of the thermoelectric membrane (Watanabe, [0046], [0071]-[0073], Figs. 1-3 see: electrodes 14a (equivalent second thermally conductive material) between protection layer 16 and thermoelectric conversion layers 13a to 13d). Regarding claim 6 modified Leonov discloses the method of claim 1, comprising providing the second thermally conductive material as a thermally conductive pad arranged in contact with the second surface of the thermoelectric membrane at said cavity ([0123] Figs. 22-23 see: pad shaped thermal shunts 90 performing function of thermal connection contact on second surface of thermoelectric material films 82, 84 on membrane 34). Regarding claim 7 modified Leonov discloses the method of claim 6, and Watanabe further discloses comprising providing said encapsulation onto said thermally conductive pad as well as onto the second surface of the thermoelectric membrane around said cavity (Watanabe, [0046], [0071]-[0073], Figs. 1-3 and 10-11 see: protection layer 16 arranged on electrodes 14a or 14b (equivalent second thermally conductive material) and on portions of thermoelectric conversion layers 13a to 13d and base sheet 12 outside equivalent cavity area). Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) as applied to claims 1 and 5-7 above, and further in view of KIM (US 2021/0066244). Regarding claims 2-4 modified Leonov discloses the method of claim 1, wherein said molding is performed at a molding temperature (Zoller, [0019]), and wherein the encapsulation provided at the second surface of the thermoelectric membrane comprises a resin encapsulation material (Watanabe, [0071]-[0073]). Modified Leonov does not explicitly disclose said encapsulation material having a Young modulus greater than 0.7 GPa at said molding temperature or having a Young modulus greater than 0.7 GPa at a temperature higher than a glass transition temperature of the resin encapsulation material or having a Young modulus greater than 10 GPa at a temperature lower than a glass transition temperature of the resin encapsulation material. However, KIM discloses for such resin stiffener or reinforcing members offsetting or compensating warpage stress caused by CTE mismatch from a molding layer, with the modulus of elasticity (Young’s modulus) of about 56 GPa or greater or otherwise determined from a slope of a stress-strain curve produced by a flexural test to produce lower stress (KIM, [0045]-[0047], [0072] and Fig. 9). As such, the stress in the thermoelectric membrane of modified Leonov is a variable that can be modified by varying the modulus of elasticity (Young’s modulus) of the encapsulation material of modified Leonov. Thus, the Young’s modulus of the encapsulation material as claimed in claims 2-4 in the method of modified Leonov would have been considered result effective variables. The court has held that absent criticality or unexpected results, it would be obvious for a person having ordinary skill in the art to optimize the Young’s modulus of the encapsulation material of modified Leonov to achieve the desired stress reduction. Differences in said result effective variable will not support the patentability of subject matter encompassed by the prior art. "Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). See also MPEP § 2144.05. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) as applied to claims 1 and 5-7 above, and further in view of Seki et al (US 2022/0045258). Regarding claim 9 modified Leonov disclose the method of claim 1, but does not explicitly disclose comprising providing said encapsulation by laminating a mold film of encapsulation material at the second surface of the thermoelectric membrane. However, Seki discloses manufacturing thermoelectric modules where encapsulation materials be provided through laminating a mold film of encapsulation material at the second surface of a thermoelectric membrane (Seki, [0009], [0017]-[0018], [0105], Figs. 1a-c’ see: providing sealant layer 5A on thermoelectric element layers 3a, 3b and electrodes 4 through a lamination process). Seki and modified Leonov are combinable as they are both concerned with the field of thermoelectric units. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Seki to such that said encapsulation of modified Leonov is provided by laminating a mold film of encapsulation material at the second surface of the thermoelectric membrane as in Seki (Seki, [0009], [0017]-[0018], [0105], Figs. 1a-c’ see: providing sealant layer 5A on thermoelectric element layers 3a, 3b and electrodes 4 through a lamination process) as such a modification would have amounted to the use of a known deposition method of encapsulant material for its intended use in the known process for manufacturing a thermoelectric device to accomplish an entirely expected result. Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) as applied to claims 1 and 5-7 above, and further in view of Bellizzi et al (US 2022/0352047). Regarding claim 10 modified Leonov discloses the method of claim 1, wherein the insulating molding compound has an outer surface opposite to the second surface of the thermoelectric membrane, but does not explicitly disclose wherein the method comprises providing at least one thermally conductive formation through the insulating molding compound molded onto the second thermally conductive material, wherein said at least one thermally conductive formation provides a thermally conductive path between the outer surface of the insulating molding compound and the second thermally conductive material. However, Bellizzi discloses in manufacturing encapsulated semiconductor devices, providing at least one thermally conductive formation through an insulating molding compound molded onto a semiconductor device, wherein said at least one thermally conductive formation provides a thermally conductive path between the outer surface of the insulating molding compound and the semiconductor device (Bellizzi, [0056]-[0061], Figs. 3-4 see: forming vias 16A through first encapsulation material 14 to semiconductor chip 12 for forming electrically-conductive formations 16 such as copper). Bellizzi and modified Leonov are combinable as they are both concerned with semiconductor device manufacture. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Bellizzi to further form at least one thermally conductive formation through the insulating molding compound molded onto the second thermally conductive material of Leonov, wherein said at least one thermally conductive formation provides a thermally conductive path between the outer surface of the insulating molding compound and the second thermally conductive material of Leonov as in Bellizzi (Bellizzi, [0056]-[0061], Figs. 3-4 see: forming vias 16A through first encapsulation material 14 to semiconductor chip 12 for forming electrically-conductive formations 16 such as copper) for the purpose of providing an output lead (Leonov, [0099]) to extract power generated in the thermoelectric unit of Leonov. Regarding claim 11 modified Leonov discloses the method of claim 10, further comprising providing the at least one thermally conductive formation via deposition of metallic material (Bellizzi, [0056]-[0061], Figs. 3-4 see: forming electrically-conductive formations 16 such as copper through plating). Regarding claim 12 modified Leonov discloses the method of claim 11, wherein the insulating molding compound molded onto the second thermally conductive material comprises a laser direct structuring (LDS) molding compound, and the method further comprises providing the at least one thermally conductive formation via applying a laser for direct structuring of the LDS molding compound (Bellizzi, [0032]-[0033], [0056]-[0061], Figs. 3-4 see: molding compound is a laser direct structuring (LDS) material and Electrically-conductive formations 16 are then formed by laser processing (for example, structured using LDS processing techniques). Claims 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) as applied to claims 1 and 5-7 above, and in further view of Hunziker et al (US 2010/0117185). Regarding claim 13 modified Leonov discloses the method of claim 1, comprising: providing an array of thermoelectric units sharing a common thermoelectric membrane, wherein the common thermoelectric membrane has, at each thermoelectric unit in the array, a first surface at a cavity in the layer of first thermally conductive material and a second surface opposite to the first surface with said second thermally conductive material arranged in contact with the second surface of the common thermoelectric membrane (Leonov, [0100], [0131], Figs. 11a-11b, 22-23, 47, see: thermopile chips 30 formed sharing a common membrane 34 on a common carrier frame of a thermopile wafer 28 prior to dicing with a cavity at a first surface and thermal shunts 90 deposited at a second surface of the thermoelectric membrane); and wherein the method comprises: performing singulation of the thermoelectric units in said array of thermoelectric units wherein a plurality of individual thermoelectric units results from singulation (Leonov, [0100], [0131], Figs. 11a-11b, 22-23, 47, see: thermopile chips 30 formed sharing a common membrane 34 are diced to form individual thermopile carrier chips); and molding said insulating molding compound onto said individual thermoelectric units resulting from singulation (Leonov, [0032], [0097], [0145], Figs. 40-41, 49 see: the thermopile unit can further include thermal insulation 51 including thermally insulating material that can completely or partially surround the inner volume in between the hot plate 37 and the cold plate 38 applied after thermopile chips are diced) and wherein said encapsulation of the second thermally conductive material counters mechanical stress developed in response to said molding of insulating molding compound onto said individual thermoelectric units resulting from singulation (see explanation in claim 1 above). Although modified Leonov discloses providing at the second surface of a thermoelectric unit an encapsulation of the second thermally conductive material arranged in contact with the second surface of the common thermoelectric membrane as recited above in claim 1, modified Leonov does not explicitly disclose where said encapsulation is provided to the common thermoelectric membrane prior to singulation. However, Hunziker discloses for such semiconductor device manufacturing processes, Hunziker discloses in Figs 1.6 and 8 where such polymer buffer layer 6 (encapsulation layers) are on semiconductor device wafer 1 prior to cutting wafer 1 into chips 5 where buffer layer 6 which counters mechanical stress from a further molded housing material 16 (Hunziker, paras [0014]-[0015], [0030]-[0038], [0046]). Hunziker and modified Leonov are combinable as they are both concerned with semiconductor device manufacture. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Hunziker such that the step of forming the encapsulation in modified Leonov occur prior to wafer dicing as in Hunziker (Hunziker, paras [0014]-[0015], [0030]-[0038], [0046]) as such a modification would simplify the formation process of such an encapsulation layer by forming for multiple thermopile chips simultaneously. Regarding claim 14 modified Leonov discloses the method of claim 13, comprising: arranging said individual thermoelectric units resulting from singulation onto a common support substrate (Leonov, Figs. 40-41,48-49 paras [0144]-[0145] thermopile chips can be contacted to the same plate 37); and molding said insulating molding compound onto said individual thermoelectric units resulting from singulation arranged on said common support substrate (Leonov, Fig. 49 see: insulation 51 provided after dicing) or (Hunziker, Fig. 4-6 see: cut chips 5 are mounted to same lead frame 7 and then encapsulated in molding material 16). Regarding claim 15 modified Leonov discloses the method of claim 14, wherein the common support substrate comprises thermally conductive portions in a heat exchange relationship with the layer of first thermally conductive material (Leonov, Figs. 42-46 or 49 see: plate 37 thermally contacts underside of carrier sides 33). Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) in view of Hunziker et al (US 2010/0117185) as applied to claims 1, 5-7, and 13-15 above, and further in view of Liu et al (US 2010/0163090). Regarding claim 16 modified Leonov discloses the method of claim 14, but does not explicitly disclose wherein the common support substrate comprises electrically conductive portions and the method comprises providing electrical coupling formations coupling said electrically conductive portions in the common support substrate with the thermally sensitive material in the thermoelectric membrane configured to generate said thermoelectric signal via the Seebeck effect. However, Liu discloses wherein a common support substrate comprises electrically conductive portions and the method comprises providing electrical coupling formations coupling said electrically conductive portions in the common support substrate with the thermally sensitive material in the thermoelectric membrane (Liu, [0046]-[0048] Figs. 4 and 5 see: conductive circuit 434 or conductive lines 510 connected to metal pads 170 from thermoelectric device 100 connected to conductive portions of carrier substrate 210). Liu and modified Leonov are combinable as they are both concerned with thermoelectric device manufacture. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Liu such that the common support substrate of modified Leonov comprises electrically conductive portions and the method comprises providing electrical coupling formations coupling said electrically conductive portions in the common support substrate with the thermally sensitive material in the thermoelectric membrane of Leonov as in Liu (Liu, [0046]-[0048] Figs. 4 and 5 see: conductive circuit 434 or conductive lines 510 connected to metal pads 170 from thermoelectric device 100 connected to conductive portions of carrier substrate 210) configured to generate said thermoelectric signal via the Seebeck effect for the purpose of providing an output lead (Leonov, [0099]) to extract power generated in the thermoelectric unit of Leonov. Regarding claim 17 modified Leonov discloses the method of claim 16, and Leonov further discloses such electrical coupling formations can be via deposition of metallic material (Leonov, para [0104] see: metal film deposition known for forming electrical interconnections). Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Leonov et al (US 2008/0271772) in view of Watanabe (US 2019/0019934), in view of Zoller et al (US 2018/0090659) in view of Yoo et al (US 2019/0115270) in view of Hunziker et al (US 2010/0117185) in view of Liu et al (US 2010/0163090) as applied to claims 1, 5-7, and 13-17, and further in view of Bellizzi et al (US 2022/0352047). Regarding claim 18 modified Leonov discloses the method of claim 17, but does not explicitly disclose wherein the insulating molding compound molded onto the second thermally conductive material comprises a laser direct structuring (LDS) molding compound, and the method comprises providing said electrical coupling formations via applying a laser for direct structuring of the LDS molding compound. Bellizzi discloses a semiconductor device manufacturing process wherein the insulating molding compound molded onto the second thermally conductive material comprises a laser direct structuring (LDS) molding compound, and the method comprises providing said electrical coupling formations via applying a laser for direct structuring of the LDS molding compound (Bellizzi, [0032]-[0033], [0056]-[0061], Figs. 3-4 see: molding compound is a laser direct structuring (LDS) material and Electrically-conductive formations 16 are then formed by laser processing (for example, structured using LDS processing techniques). Bellizzi and modified Leonov are combinable as they are both concerned with semiconductor device manufacture. It would have been obvious to one having ordinary skill in the art at the time of the invention to modify the method of Leonov in view of Bellizzi wherein the insulating molding compound molded onto the second thermally conductive material of modified Leonov comprises a laser direct structuring (LDS) molding compound, and the method comprises providing said electrical coupling formations via applying a laser for direct structuring of the LDS molding compound as in Bellizzi (Bellizzi, [0032]-[0033], [0056]-[0061], Figs. 3-4 see: molding compound is a laser direct structuring (LDS) material and Electrically-conductive formations 16 are then formed by laser processing (for example, structured using LDS processing techniques) as such a modification would have amounted to the use of a known molding material patterning method for forming conductive interconnections for its intended use in a known semiconductor device manufacturing process to accomplish the entirely expected result of providing an output lead (Leonov, [0099]) to extract power generated in the thermoelectric unit of Leonov. Regarding claim 11 modified Leonov discloses the method of claim 10, further comprising providing the at least one thermally conductive formation via deposition of metallic material (Bellizzi, [0056]-[0061], Figs. 3-4 see: forming electrically-conductive formations 16 such as copper through plating). Regarding claim 12 modified Leonov discloses the method of claim 11, wherein the insulating molding compound molded onto the second thermally conductive material comprises a laser direct structuring (LDS) molding compound, and the method further comprises providing the at least one thermally conductive formation via applying a laser for direct structuring of the LDS molding compound (Bellizzi, [0032]-[0033], [0056]-[0061], Figs. 3-4 see: molding compound is a laser direct structuring (LDS) material and Electrically-conductive formations 16 are then formed by laser processing (for example, structured using LDS processing techniques). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Chikagawa et al (US 2018/0366631) discloses a method of encapsulating a plurality of thermoelectric devices on a common substrate. Hayashi et al (US 2015/0325769) discloses a manufacturing method of an encapsulated thermoelectric device. Fuchs et al (US 20110277801 A1) discloses a manufacturing method of a thin-film thermoelectric device. Shiraishi et al (US 2017/0047500 A1) discloses a manufacturing method of a thin-film thermoelectric device including cutting thin-film thermoelectric devices from a common substrate. Lupo et al (US 2022/0270955) discloses a method of laser direct structuring a molding compound to provide electrical connection to a thermocouple sensor. Yoshida et al (JP 2005259944 A, see attached English machine translation) discloses a manufacturing method of a thin-film thermoelectric device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW J GOLDEN whose telephone number is (571)270-7935. The examiner can normally be reached 11am-8pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeffrey Barton can be reached at 571-272-1307. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ANDREW J. GOLDEN Primary Examiner Art Unit 1726 /ANDREW J GOLDEN/Primary Examiner, Art Unit 1726
Read full office action

Prosecution Timeline

Nov 11, 2024
Application Filed
Mar 27, 2026
Non-Final Rejection — §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
42%
Grant Probability
81%
With Interview (+39.5%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 623 resolved cases by this examiner. Grant probability derived from career allow rate.

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