Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 3/13/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 8-15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Milano et al. (Hereinafter “Milano”) in the US Patent Application Publication Number US 20130020660 A1 in view of Eun et al. (Hereinafter “Eun”) in the US Patent Application Publication Number US 20100207258 A1.
Regarding claim 1, Milano teaches a current sensor [50'] in Figure 4C (A current sensor includes a lead frame having a first portion comprising current leads connected to form a current conductor to carry a primary current and a second portion comprising signal leads; Paragraph [0012] Line 2-5; FIGS. 4A-4C, a die up assembly version of the current sensor shown as current sensor 50'; Paragraph [0054] Line 2-3) comprising:
a lead frame [52'] comprising a conductor [52a'] and a signal lead [56'] (As can be seen in FIG. 4A, the current sensor 50' has a lead frame 52' with a first portion 52a' and a second portion 52b' in Figure 4B. The first portion 52a' provides a current conductor with primary current leads or pins 54' and the second portion 52b' provides signal leads 56'; Paragraph [0054] Line 11-15; Figure 4A-4B);
wherein the signal lead [56'] is coupled to a reference potential ([0076] Although the illustrated device in FIGS. 3A-3C, 4A-4C, FIGS. 6A-6B, 7A-7B and FIG. 8 has twenty pins, other pin counts are possible, with some leads providing the primary current path and other leads providing connections for signals (e.g., output, power supply and ground);
an insulation layer [66a'] in contact with the conductor [52a'] (Disposed between the die 58' and the current conductor 52a' is an insulation structure 64'. Like the insulation structure 64 from FIG. 3A-3C, the insulation structure 64' is formed by two layers of insulating thin sheet material, a first layer 66a' and a second layer 66b'; Paragraph [0054] Line 26-30; Figure 5; FIG. 5 shows the first tape layer 66a (or 66a') includes a first polyimide film layer 80a and a first adhesive layer 82a; Paragraph [0060] Line 1-5; From bottom to top the order of the layers is adhesive layer 82a (which is in contact with the current conductor 52a); Paragraph [0060] Line 7-9);
a semiconductor substrate [58'] (Die 58' as the substrate) (This type of arrangement, in which a die is oriented (e.g., to a lead frame, as shown, or substrate, circuit board, and so forth), is known as a "flip chip" assembly or configuration; Paragraph [0041] Line 9-12; The current sensor 50' includes a die 58'; Paragraph [0054] Line 19) having a shield layer [66b'] (second layer of insulative thin layer is considered as the shield layer) (The die 58 (or 58') is in contact with the polyimide film layer 80b of the shield layer 66b'; Paragraph [0060] Line 11-12) (Disposed between the die 58' and the current conductor 52a' is an insulation structure 64'. Like the insulation structure 64 from FIG. 3A-3C, the insulation structure 64' is formed by two layers of insulating thin sheet material, a first layer 66a' and a second layer 66b'; Paragraph [0054] Line 26-30) disposed on a first surface proximal to the insulation layer [66a'] and a second opposing surface distal from the insulation layer [66a'], and
wherein the shield layer [66b'] is disposed between the substrate [58'] and the insulation layer [66a'] (Figure 4C shows the shield layer [66b'] is disposed between the substrate [58'] and the insulation layer [66a']);
a magnetic field sensing circuit, comprising a magnetic field sensing element [60] (The current sensor 50' includes a die 58' that contains a magnetic field sensing circuit or integrated circuit with magnetic field transducer 60 (and circuitry not shown); Paragraph [0054] Line 19-21), supported by the second surface of the semiconductor substrate [58'] (Figure 4C shows a magnetic field sensing circuit, comprising a magnetic field sensing element [60] supported by the second surface of the semiconductor substrate [58']);
an interconnect [72] (wire bond 72 as the interconnect) (In the die up configuration of this implementation, contacts between the die 58' and the secondary signal leads 56a' are made with conventional semiconductor gold wire bonds 72; Paragraph [0054] Line 21-24) coupled between the bond pad [62] (active surface 62 as the bond pad here) (The die 58' is oriented face up, that is, a top or active surface 62 is face up; Paragraph [0054] Line 24-25) and the signal lead [56'] (In the die up configuration of this implementation, contacts between the die 58' and the secondary signal leads 56a' are made with conventional semiconductor gold wire bonds 72; Paragraph [0054] Line 21-24).
Milano fails to teach a via extending from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate and configured to couple the shield layer to a bond pad on the second surface of the semiconductor substrate.
Eun teaches a semiconductor device, and more particularly to a chip package (Paragraph [0002] Line 1-2; Figure 3), wherein
a via [305] extending through the semiconductor substrate [302] to couple the shield layer [340] to the second surface of the semiconductor substrate [302] (In addition, the second shielding layer 340 covers the ground vias 305 of the substrate 302, and the second shielding layer 340 is electrically connected to the ground via 305 and grounded. It should be noted that if the molding compound 330 completely encapsulates the chip 304 and the substrate 302, the first shielding layer 310 covers the ground vias 305 and is grounded; Paragraph [0030] Line 6-12) and configured to couple the shield layer [304] to a bond pad on the second surface of the semiconductor substrate [302] (Figure 3 shows that the via couple the shield layer [304] to a bond pad on the second surface of the semiconductor substrate [302]; Milano discloses active surface 62 as the bond pad therefore in view of Milano and Eun discloses the via couple the shield layer [304] to a bond pad on the second surface of the semiconductor substrate [302]). The purpose of doing so is to adapt a thinner laminate substrate without an extra ground plane connection and the thickness or volume of the chip package structure can be more compact, to provide compatible design with the packaging of high frequency devices, particularly, radio frequency devices, to reduce noise as there is no outside connector to connect the shield layer to the reference potential and to reduce the effect of environmental condition such as temperature.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano in view of Eun, because Eun teaches to include a via extending through the semiconductor substrate to couple the shield layer to the second surface of the semiconductor substrate adapts a thinner laminate substrate without an extra ground plane and the thickness or volume of the chip package structure can be more compact, provides compatible design with the packaging of high frequency devices, particularly, radio frequency devices (Paragraph [0031] Line 5-10), reduces noise as there is no outside connector to connect the shield layer to the reference potential and to reduce the effect of environmental condition such as temperature.
Regarding claim 3, Milano teaches a current sensor,
wherein the interconnect comprises a wire bond [72] (wire bond 72) (In the die up configuration of this implementation, contacts between the die 58' and the secondary signal leads 56a' are made with conventional semiconductor gold wire bonds 72; Paragraph [0054] Line 21-24).
Regarding claim 8, Milano teaches a current sensor, wherein
the shield layer [66b'] comprises a plurality of layers [80b, 82b] (FIG. 5 shows an enlarged, cross-sectional view of the insulation structure 64 (or 64') according to one exemplary embodiment. The second tape layer 66b (or 66b') as the shield layer includes a second polyimide film layer 80b and a second adhesive layer 82b; Paragraph [0060] Line 1-7).
Regarding claim 9, Milano teaches a current sensor, wherein
the shield layer [66b'] is applied to the first surface of the semiconductor substrate [58'] (FIG. 5 shows the second tape layer 66b (or 66b') as the shield layer includes a second polyimide film layer 80b and a second adhesive layer 82b; Paragraph [0060] Line 1-7; The die 58 (or 58') is in contact with the polyimide film layer 80b; Paragraph [0060] Line 11-12).
Regarding claim 10, Milano teaches a current sensor, wherein
the shield layer [66b'] is applied to the insulation layer [66a'] (The first tape layer 66a (or 66a') includes a first polyimide film layer 80a and a first adhesive layer 82a. The second tape layer 66b (or 66b') includes a second polyimide film layer 80b and a second adhesive layer 82b. From bottom to top the order of the layers is adhesive layer 82a (which is in contact with the current conductor 52a), the polyimide film layer 80a, the adhesive layer 82b and the polyimide film layer 80b. The die 58 (or the insulation layer [66a'] extends an edge of the conductor [52a'] ') is in contact with the polyimide film layer 80b; Paragraph [0060] Line 4-12).
Regarding claim 11, Milano teaches a current sensor, wherein
the shield layer [66b'] extends beyond an edge of the first surface of the semiconductor substrate [58'] (Figure 4C shows the insulation layer [66b'] extends beyond an edge of the first surface of the semiconductor substrate [58']; Like the insulation structure 64 from FIGS. 3A-3C, the insulation structure 64' is dimensioned to include an overhang portion that extends beyond the primary conductor 52a'; Paragraph [0055] Line 1-3).
Regarding claim 12, Milano teaches a current sensor, wherein
the insulation layer [66a'] comprises at least one of a polymer dielectric material [80a] or a layer of adhesive [82a] (FIG. 5 shows an enlarged, cross-sectional view of the insulation structure 64 (or 64') according to one exemplary embodiment. In this embodiment, each layer is provided as a tape layer. The first tape layer 66a (or 66a') includes a first polyimide film layer 80a and a first adhesive layer 82a; Paragraph [0060] Line 1-5).
Regarding claim 13, Milano teaches a current sensor, wherein
the insulation layer [66a'] is applied to the conductor [52a'] (Disposed between the die 58' and the current conductor 52a' is an insulation structure 64'. Like the insulation structure 64 from FIG. 3A-3C, the insulation structure 64' is formed by two layers of insulating thin sheet material, a first layer 66a' and a second layer 66b'; Paragraph [0054] Line 26-30; The insulation structure 64 may be formed on or applied to the current conductor 52a; Paragraph [0050] Line 2-3).
Regarding claim 14, Milano teaches a current sensor, wherein
a length and a width of the insulation layer [66a'] is the same as a length and a width of the shield layer [66b'] (The first tape layer 66a has a thickness "T, tape 1" 84a and the second tape layer 66b has a thickness "T, Tape 2" 84b. The first polyimide film layer 80a has a thickness T1 86a and the second polyimide film layer 80b has a thickness T1 86b. The first adhesive layer 82a and the second adhesive layer 82b have thicknesses "T2" 88a and 88b, respectively. The thicknesses 84a and 84b of the tape layers may be the same (or substantially the same) or different. Likewise, the thickness of the adhesive layer and the polyimide film layer in one layer may be the same as or different from the corresponding layers in the other tape layer; Paragraph [0060] Line 12-22).
Regarding claim 15, Milano teaches a current sensor, wherein
the insulation layer [66a'] extends beyond a length of the conductor [52a'] (Figure 4C shows the insulation layer [66a'] extends beyond a length of the conductor [52a']; Like the insulation structure 64 from FIGS. 3A-3C, the insulation structure 64' is dimensioned to include an overhang portion that extends beyond the primary conductor 52a'; Paragraph [0055] Line 1-3).
Regarding claim 17, Milano teaches a current sensor, wherein
wherein the magnetic field sensing element [60] comprises at least one of a Hall-effect element or a magnetoresistance element. (The current sensor 50 includes the magnetic field transducer 60 (from FIGS. 3A-3C, 4A-4C) shown as magnetic field sensing device 60. The magnetic field sensing device 60 may be formed by one or more sensing elements, such as Hall-effect or magnetoresistive (MR) sensing element; Paragraph [0070] Line 3-7).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Milano ‘660 A1 in view of Eun ‘258 A1, as applied to claim 1 above, and further in view of Ramiah et al. (Hereinafter “Ramiah”) in the US Patent Application Publication Number US 20090243074 A1.
Regarding claim 2, Eun teaches a via extending through the semiconductor substrate.
However, the combination of Milano and Eun fails to teach a current sensor, wherein the via comprises a through-silicon via extending from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate.
Ramiah teaches semiconductor processing, and more specifically, to the formation of openings or vias in a semiconductor for making contact to a conductive pad (Paragraph [0002] Line 1-4), wherein
the via comprises a through-silicon via (through-silicon via 26', through-silicon via 30' and through-silicon via 32'; Paragraph [0014] Line 6-7; Figure 6) extending from the first surface of the semiconductor substrate [12] to the second surface of the semiconductor substrate [12] (The semiconductor device 10 in FIG. 6 has deep silicon vias of variable diameter; Paragraph [0014] Line 9-10; Figure 6 shows that the through-silicon via 26', the through-silicon via 30' and the through-silicon via 32' extending from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate 12). The purpose of doing so is to form the electrical connections between the sensor die and the semiconductor die, to form backside ground connections to the active circuitry in high frequency and high power radio-frequency applications and to minimize conductor resistance, inductance and improve signal accuracy.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Ramiah, because Ramiah teaches to include a via which comprises a through-silicon via forms the electrical connections between the sensor die and the semiconductor die, forms backside ground connections to the active circuitry in high frequency and high power radio-frequency applications (Paragraph [0004] Line 16-19) and minimizes conductor resistance, inductance and improve signal accuracy (Paragraph [0007] Line 12-13).
Claims 4-6 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Milano ‘660 A1 in view of Eun ‘258 A1, as applied to claim 1 above, and further in view of Taylor et al. (Hereinafter “Taylor”) in the US Patent Application Publication Number US 20080297138 A1.
Regarding claim 4, the combination of Milano and Eun fails to teach a current sensor, further comprising a second bond pad on the at least one signal lead, wherein the wire bond is coupled between the bond pad on the shield layer and the second bond pad.
Taylor teaches a current sensor (Electrical current sensors, and more particularly to a miniaturized current sensor in an integrated circuit package; Paragraph [0003] Line 1-3; FIG. 23, a side view of a portion of a current sensor 1000; Paragraph [0184] Line 1-2), further comprising
a second bond pad [20a-20c] on the at least one signal lead [12e, 12f, 12h] (The substrate 16 in Figure 1 has bonding pads 20a-20c on the first surface 16a, to which bond wires 22a-22c are coupled. The bond wires are further coupled to the leads 12e, 12f, 12h of the lead frame 12; Paragraph [0042] Line 1-4; Figure 1; The wire bond is coupled to the bonding pad of the shield layer and the other side of the wire bond is coupled to the signal leads through the bonding pad of the substrate), wherein
the wire bond is coupled between the bond pad on the second surface of the semiconductor substrate and the second bond pad (A bonding wire 1016, or another bonding method, can couple the bonding pad 1014 to the first surface 1002a of the substrate 1002; Paragraph [0185] Line 8-11; The current sensor of claim 1, wherein said substrate has at least one bonding pad coupled to a corresponding one of the plurality of leads with a bond wire; Claim 11; The substrate 16 in Figure 1 has bonding pads 20a-20c on the first surface 16a, to which bond wires 22a-22c are coupled. The bond wires are further coupled to the leads 12e, 12f, 12h of the lead frame 12; Paragraph [0042] Line 1-4; Figure 1; The wire bond is coupled between the bond pad on the second surface of the semiconductor substrate and the second bond pad). The purpose of doing so is to allow the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Taylor, because Taylor teaches to include a second bond pad on the at least one signal lead allows the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage (Paragraph [0172]).
Regarding claim 5, the combination of Milano and Eun fails to teach a current sensor, wherein the shield layer comprises a conductive material.
Taylor teaches a current sensor (Electrical current sensors, and more particularly to a miniaturized current sensor in an integrated circuit package; Paragraph [0003] Line 1-3; FIG. 23, a side view of a portion of a current sensor 1000; Paragraph [0184] Line 1-2), wherein
the shield layer [1008] comprises a conductive material [1012] (The electromagnetic shield 1008 includes a shielding portion 1100, a conductor portion 1012, and a bonding pad 1014; Paragraph [0185] Line 4-6). The purpose of doing so is to allow the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Taylor, because Taylor teaches to include the shield layer with a conductive material allows the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage (Paragraph [0172]).
Regarding claim 6, the combination of Milano and Eun fails to teach a current sensor, wherein the conductive material comprises one or more of copper, aluminum, gold, nickel and aluminum copper alloy.
Taylor teaches a current sensor (Electrical current sensors, and more particularly to a miniaturized current sensor in an integrated circuit package; Paragraph [0003] Line 1-3; FIG. 23, a side view of a portion of a current sensor 1000; Paragraph [0184] Line 1-2), wherein
the conductive material [1012] comprises one or more of copper, aluminum, gold, nickel and aluminum copper alloy (The electromagnetic shield 800 can be formed from a metal layer. The metal layer can be comprised of a variety of materials, for example, aluminum, copper, gold, titanium, tungsten, chromium, or nickel; Paragraph [0173] Line 1-5; The electromagnetic shield [1008] can be the same as or similar to one of the electromagnetic shields 800, 850, 900, 950 of FIGS. 19-22, respectively; Paragraph [0185] Line 2-4). The purpose of doing so is to allow the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Taylor, because Taylor teaches to include a conductive material made of one or more of copper, aluminum, gold, nickel and aluminum copper alloy allows the electromagnetic shield to be coupled to a DC voltage, for example, a ground voltage (Paragraph [0172]).
Regarding claim 16, the combination of Milano and Eun fails to teach a current sensor, wherein the insulation layer is formed by one or both of a taping process or a deposition process.
Taylor teaches a current sensor (Electrical current sensors, and more particularly to a miniaturized current sensor in an integrated circuit package; Paragraph [0003] Line 1-3; FIG. 23, a side view of a portion of a current sensor 1000; Paragraph [0184] Line 1-2), wherein
the insulation layer is formed by one or both of a taping process or a deposition process (In some embodiments for which the insulating layer is a substrate insulating layer associated with the substrate 306, the insulating layer 330 is a substrate taped insulating layer formed with a taping process. The substrate taped insulating layer can be comprised of a tape applied to the substrate, including but not limited to, a polymer tape, for example a KaptonR tape; Paragraph [0103] Line 1-7). The purpose of doing so is to provide a miniaturized current sensor in an integrated circuit package..
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Taylor, because Taylor teaches to form the insulation layer by one or both of a taping process or a deposition process provides a miniaturized current sensor in an integrated circuit package. (Paragraph [0003]).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Milano ‘660 A1, Eun ‘258 A1 and Taylor ‘138 A1, as applied to claims 1 and 5 above, and further in view of Zhu et al. (Hereinafter “Zhu”) in the US Patent Application Number US 20060087314 A1.
Regarding claim 7, the combination of Milano, Eun and Taylor fails to teach a current sensor wherein the conductive material comprises one of more of a metalized tape or aa metalized Mylar®.
Zhu teaches a sensor for measuring displacement, among others, includes a resistive element configured to receive an alternating voltage between a first electrical terminal and a second electrical terminal (Paragraph [0013] Line 1-4), wherein
wherein the conductive material comprises one of more of a metalized tape or a metalized Mylar® (Conductive shield 118 could be in the form of a sheath or a spiral shield. The spiral shield may include a right hand spiral or a left hand spiral. A metalized copper tape may be applied over the shield to provide further EM shielding; Paragraph [0047] Line 1-5). The purpose of doing so is to provide shielding, to provide high visibility, to have the property of higher toughness, the ability to be heat sealed, and a lower density at a lower cost and to provide high tensile strength, chemical and dimensional stability, transparency, reflectivity, gas and aroma barrier properties, and electrical insulation.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano, Eun and Taylor in view of Zhu, because Zhu teaches to include the shield layer comprising at least one of a metalized tape or a metalized Mylar® provides shielding, provides high visibility, has the property of higher toughness, the ability to be heat sealed, and a lower density at a lower cost and also provides high tensile strength, chemical and dimensional stability, transparency, reflectivity, gas and aroma barrier properties, and electrical insulation.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Milano ‘660 A1 in view of Eun ‘258 A1, as applied to claim 1 above, and further in view of Doogue et al. (Hereinafter “Doogue”) in the US Patent Application Publication Number US 20070170533 A1.
Regarding claim 18, Milano teaches a current sensor, wherein magnetic field sensing element is a Hall Effect element or magnetoresistance element (The current sensor 50 includes the magnetic field transducer 60 (from FIGS. 3A-3C, 4A-4C) shown as magnetic field sensing device 60. The magnetic field sensing device 60 may be formed by one or more sensing elements, such as Hall-effect or magnetoresistive (MR) sensing element; Paragraph [0070] Line 3-7).
However the combination of Milano and Eun fails to teach a current sensor, wherein the magnetoresistance element includes at least one of Indium Antimonide (InSb), a giant magnetoresistance (GMR) element, an anisotropic magnetoresistance (AMR) element, a tunneling magnetoresistance (TMR) element or a magnetic tunnel junction (MTJ) element.
Doogue teaches an integrated circuits and, more particularly, to integrated circuits having magnetic sensing elements (Paragraph [0003] Line 1-3), wherein
the magnetoresistance element includes at least one of Indium Antimonide (InSb), a giant magnetoresistance (GMR) element, an anisotropic magnetoresistance (AMR) element, a tunneling magnetoresistance (TMR) element or a magnetic tunnel junction (MTJ) element (The magnetic field sensing element can be of a type including, but not limited to, a Hall effect element and a magnetoresistance element. The magnetoresistance element can be of a type including, but not limited to, a giant magnetoresistance (GMR) element, an anisotropic magnetoresistance (AMR) element, and a tunneling magnetoresistance (TMR) element; Paragraph [0036] Line 5-12). The purpose of doing so is to increase the sensitivity, to adjust sensitivity through the selection of film thickness and line width, to reduce power consumption and to provide cost effective solutions.
It would have obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify Milano and Eun in view of Doogue, because Doogue teaches to include the magnetoresistance element at least one of Indium Antimonide (InSb), a giant magnetoresistance (GMR) element, an anisotropic magnetoresistance (AMR) element, a tunneling magnetoresistance (TMR) element or a magnetic tunnel junction (MTJ) element increases the sensitivity, adjusts sensitivity through the selection of film thickness and line width, reduces power consumption and provides cost effective solutions.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Ausserlechner (US 20110234215 A1) discloses, “Sensor Package And Method For Producing A Sensor Package- [0001] Some embodiments of the present disclosure relate to sensor packages and methods for producing sensor packages, for example sensor packages comprising magnetic field sensors, which sense the magnetic field of a current. [0043] FIG. 1A shows a schematic cross-sectional view of an embodiment of a sensor package 100 comprising a printed circuit board 110 with a laminar current conductor 120 arranged on a first main surface 110a of the printed circuit board, wherein a sensor chip 130 is adapted to measure a current flowing through the laminar current conductor 120. The sensor chip 130 comprises a magnetic field sensor 132 and optionally an evaluation unit (not shown). The sensor chip 130 is arranged on a second main surface 110b of the printed circuit board opposite to the first main surface 110a. The surfaces of the sensor chip 130 not covered by the printed circuit board 110 (in FIG. 1A the side surfaces and the main surface facing away from the printed circuit board) are covered by a mold body 140 comprising a mold material. Thus, the sensor chip 130 is arranged between the mold body 140 and the printed circuit board 110, wherein the mold body 140 and the printed circuit board 110 are arranged such around the sensor chip that the sensor chip 130 is hermetically sealed from the environment. In other words, the mold body 140 is arranged on the second main surface 110b of the printed circuit board and/or around the sensor chip 130 such that the sensor chip 130 is arranged between the mold body 140 and the printed circuit board and is completely surrounded by the mold body 140 and the printed circuit board 110. The current conductor 120 comprises, for example, a first contact region 122, a second contact region 124 and a magnetic field producing region 126 arranged between the first contact region 122 and the second contact region 124 and electrically connecting both. The sensor chip 130 and the magnetic field sensor 132 are associated to the current conductor 120 or the magnetic field producing region 126 and are adapted to measure a current flowing through the current conductor 120, for example from the first contact region 122 via the magnetic field producing region 126 to the second contact region 124, by measuring the magnetic field produced by the current. The current conductor 120 is also referred to as primary conductor and the current flowing through the current conductor is also referred to as primary current. Note also that PCB 110 overlaps the sensor chip or die 130 along its entire perimeter by several tenths of a milli-meter in order to guarantee a long enough creepage distance between conductor 120 and die 130 for the purpose of voltage isolation-However Ausserlechner does not disclose a via extending from the first surface of the semiconductor substrate to the second surface of the semiconductor substrate and configured to couple the shield layer to a bond pad on the second surface of the semiconductor substrate.”
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NASIMA MONSUR whose telephone number is (571)272-8497. The examiner can normally be reached 10:00 am-6:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman Alkafawi can be reached at (571) 272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/NASIMA MONSUR/Primary Examiner, Art Unit 2858
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