Prosecution Insights
Last updated: April 19, 2026
Application No. 18/944,891

DISPLAY DEVICE AND DRIVING METHOD OF THE SAME INCLUDING STATUS DIAGNOSIS USING REFERENCE VOLTAGE

Non-Final OA §102§103
Filed
Nov 12, 2024
Examiner
CRAWLEY, KEITH L
Art Unit
2626
Tech Center
2600 — Communications
Assignee
LG Display Co., Ltd.
OA Round
3 (Non-Final)
59%
Grant Probability
Moderate
3-4
OA Rounds
3y 7m
To Grant
85%
With Interview

Examiner Intelligence

Grants 59% of resolved cases
59%
Career Allow Rate
340 granted / 577 resolved
-3.1% vs TC avg
Strong +26% interview lift
Without
With
+26.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
27 currently pending
Career history
604
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
20.5%
-19.5% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 577 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 1/21/26 has been entered. Claim Objections Claim 4 is objected to because of the following informalities: Claim 4 depends upon claim 2. However, claim 2 has been cancelled. Examiner assumes Applicant intends for claim 4 to depend upon claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 9 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park (US 2017/0271866). Regarding claim 9, Park discloses a method of driving a display device, comprising: applying a reference voltage lower than a high power to a subpixel of a display panel through a reference line connected to the subpixel of the display panel before the high power is applied to the subpixel of the display panel for driving the display panel (fig. 1, ¶ 58-61; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, ELVSS is provided during short detection period Tsd before ELVDD is applied); sensing the reference voltage applied to the subpixel of the display panel through the reference line before the high power is applied to the subpixel of the display panel to provide a reference voltage sensing value (fig. 1, ¶ 58-61; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; when ELVDD is below Vref [“magnitude of the voltage ELVDD … increases over the magnitude of the reference voltage Vref”] then third control signal CON3 is enabled); and diagnosing a state of the display panel on the basis of the reference voltage sensing value (figs. 1 and 3, ¶ 58-61; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; third control signal CON3 enabled to shut down power converter 10), wherein the reference voltage is sensed through a power line connected to the subpixel of the display panel (figs. 1 and 3, ¶ 58-61; see also figs. 12-14, ¶ 120-40; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Kim (US 2020/0074938). Regarding claim 1, Park discloses a display device comprising: a display panel for displaying images (figs. 12-13, display panel 300, ¶ 120-140); a voltage circuit configured to apply a reference voltage to a subpixel of the display panel before a high power is applied to the subpixel for driving the display panel, the reference voltage lower than the high power (fig. 1, ¶ 58-61, power converter 10; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, ELVSS is provided during short detection period Tsd before ELVDD is applied); a sensor configured to sense the reference voltage applied to the subpixel of the display panel before the high power is applied to the subpixel of the display panel to provide a reference voltage sensing value (fig. 1, ¶ 58-61, short detection unit 200; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; when ELVDD is below Vref [“magnitude of the voltage ELVDD … increases over the magnitude of the reference voltage Vref”] then third control signal CON3 is enabled); and a controller configured to diagnose a state of the display panel on the basis of the reference voltage sensing value (figs. 1 and 3, ¶ 58-61, voltage conversion unit 100 with control unit 130; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; third control signal CON3 enabled to shut down power converter 10), wherein the voltage circuit is configured to apply the reference voltage through a reference line connected to the subpixel of the display panel (figs. 1 and 3, ¶ 58-61; see also figs. 12-14, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVSS provided at first output electrode 110), and wherein the sensor is configured to sense the reference voltage through a power line connected to the subpixel of the display panel (figs. 1 and 3, ¶ 58-61; see also figs. 12-14, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd). Park fails to explicitly disclose wherein the sensor is configured to sense the reference voltage when transistors included in the subpixel of the display panel are in a non-driving state. Kim teaches wherein the sensor is configured to sense the reference voltage when transistors included in the subpixel of the display panel are in a non-driving state (fig. 3, figs. 6-9, see ¶ 71-85, see also ¶ 52, e.g., 6T2C pixel configuration disclosed; see also figs. 18-19). Park and Kim are both directed to short detection for OLED displays. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the device of Park with the device of Kim since such a modification provides various combinations of transistors and capacitors when implementing a compensation circuit (Kim, ¶ 52) and may control a device having a high probability of a fire (Kim, ¶ 90). Regarding claim 5, Park discloses wherein the sensor is included in a power supply for generating the high power (fig. 1, ¶ 58-61, short detection unit 200; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181). Regarding claim 7, Kim further teaches wherein the sensor is included in a data driver connected to the subpixel of the display panel (fig. 9, ¶ 85-90, short detecting unit 190 with sensor in data driver 140b; see also ¶ 97-106). Regarding claim 8, Park discloses wherein the controller is configured to determine the display panel to be in an abnormal state when the reference voltage sensing value is detected as a level below a reference value (figs. 1 and 3, ¶ 58-61, voltage conversion unit 100 with control unit 130; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; when ELVDD is below Vref [“magnitude of the voltage ELVDD … increases over the magnitude of the reference voltage Vref”] then third control signal CON3 is enabled; third control signal CON3 enabled to shut down power converter 10). Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Park in view of Kim as applied to claim 1 above, and further in view of Hwang et al. (US 2023/0215307). Regarding claim 4, Park in view of Kim fails to explicitly disclose wherein the sensor is configured to sense the reference voltage through a power line when the reference voltage applied through the reference line is transmitted through the power line of the display panel according to operation of a driving transistor included in the subpixel of the display panel. Hwang teaches wherein the sensor is configured to sense the reference voltage through a power line when the reference voltage applied through the reference line is transmitted through the power line of the display panel according to operation of a driving transistor included in the subpixel of the display panel (figs. 9-11, ¶ 65-84, whether or not short occurs in OLED or driving transistor is measured through a first driving voltage line EVDD or a second driving voltage line EVSS). Park in view of Kim and Hwang are both directed to short detection for OLED displays. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the device of Park in view of Kim with the device of Hwang since such a modification can sense whether or not elements included in the subpixel have failed (Hwang, ¶ 65). Response to Arguments Applicant's arguments filed 1/21/26 have been fully considered but they are not persuasive. Regarding claims 1 and 9, Applicant argues “the power converter of Park is not a sensor and does not sense, through a power line connected to a subpixel, a reference voltage applied to the subpixel through a reference line” (Remarks, p. 4). Examiner disagrees. As previously discussed (see Final Rejection mailed 10/21/25, ‘Response to Arguments’ p. 7), Examiner considers the ELVSS voltage as the reference voltage as claimed (see Park, fig. 1, ¶ 58-61, short detection unit 200; see also figs. 12-13, ¶ 120-140; see also figs. 20-21, ¶ 173-181, voltage ELVDD decreases according to the decrease of ELVSS due to short during short detection period Tsd; when ELVDD is below Vref [“magnitude of the voltage ELVDD … increases over the magnitude of the reference voltage Vref”] then third control signal CON3 is enabled). The rejection of the claims is maintained. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEITH L CRAWLEY whose telephone number is (571)270-7616. The examiner can normally be reached Monday - Friday 10-6 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached at 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEITH L CRAWLEY/Primary Examiner, Art Unit 2626
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Prosecution Timeline

Nov 12, 2024
Application Filed
Jun 26, 2025
Non-Final Rejection — §102, §103
Sep 30, 2025
Response Filed
Oct 17, 2025
Final Rejection — §102, §103
Jan 21, 2026
Request for Continued Examination
Jan 28, 2026
Response after Non-Final Action
Feb 07, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
59%
Grant Probability
85%
With Interview (+26.4%)
3y 7m
Median Time to Grant
High
PTA Risk
Based on 577 resolved cases by this examiner. Grant probability derived from career allow rate.

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