DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office Action has been issued in response to amendments filed 08 April 2026.
Claims 1 – 20 are pending.
Interview Summary
A telephonic interview was made, on April 30 2026, in order to resolve the issues below. However, no response was received in a timely manner. Therefore, this Office Action is hereby issued.
Claim Objections
Claims 9 – 20 are objected to because of the following informalities. Appropriate correction is required.
Claim 9 should be amended to “determine, in response to a process being executed, whether a mapping of a target physical address, to [[to]] a virtual address that the process is accessing, is [[is]] stored in a translation lookaside buffer (TLB)”. This is to clarify what (mapping, target physical address, virtual address or process) is stored in TLB (see spec ¶[54]).
Claim 9 should be amended to “obtain the target physical address, mapped , based [[based]] on accessing the single-level page table”. This is to clarify what (obtaining or mapped) corresponds to accessing single-level page table (see spec Fig. 5 and corresponding paragraphs).
Claim 17 should be amended to “for each of the first subset of the processes determined to use a single-level page table, in response to the requested virtual address is not found in the TLB the requested virtual address” is not unclear whether it is referring to the one here or the one in determining step (i.e. there are two instances of a requested virtual address). Similar issue applies to “the TLB” (i.e. there are two instances of a TLB). There is no antecedence for “the first process” per se. In addition, “when” should be replaced with “in response to” because “when” appears to render unclear as to whether “determining that a requested virtual address is not found in a translation lookaside buffer (TLB)” occurs or not.
Claim 17 should be amended to “determining that a second subset of the processes uses the multi-level page table; for each of the second subset of the processes in response to determining that [[a]] the requested virtual address is not found in the TLB, using a corresponding multi-level page table to determine the requested virtual address”. This limitation is still in contingent form (there is no recitation of condition of processes using multi-level page table being met). Unless Applicant intends to leave this limitation as not performed (i.e. not limiting), this limitation should be amended as suggested. Note that processes here should be part of same processes used to check for use of multi-level page tables but only a subset as another subset has been determined to use single-level page table. This amendment is also so that subsequent “the requested virtual address” is not unclear whether it is referring to the one here or the one in determining step (i.e. there are three instances of a requested virtual address). In addition, “when” should be replaced with “in response to” because “when” appears to render unclear as to whether “determining that a requested virtual address is not found in a translation lookaside buffer (TLB)” occurs or not.
Claims, dependent upon above identified claims, are also objected on the same grounds as said above identified claims.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, “in response to determining that the process uses the single-level page table, obtaining the target physical address, mapped to the virtual address, based on accessing the single-level page table” is unclear and indefinite. As recited, it is unclear as to whether “the single level page table” is referring to the one in i) “determining, in response to determining that the virtual address is not stored in the TLB, whether the process uses a single-level page table” or ii) “determining that the process uses a single-level page table”. This renders claim 1 unclear and indefinite.
Regarding claim 3, “wherein the bit is set by a system call invoked based on a user command that causes the process to be executed using the single- level page table” is unclear and indefinite. As recited, it is unclear as to whether “the single level page table” is referring to the one in i) “determining, in response to determining that the virtual address is not stored in the TLB, whether the process uses a single-level page table” (claim 1) or ii) “determining that the process uses a single-level page table” (claim 1) or iii) “wherein the determining of whether the process uses a single-level page table is based on a register bit indicating a type of the process” (claim 2). This renders claims 3 unclear and indefinite.
Regarding claim 5, “wherein a page size of the multi-level page table is less than a page size of the single-level page table” is unclear and indefinite. As recited, it is unclear as to whether “the single level page table” is referring to the one in i) “determining, in response to determining that the virtual address is not stored in the TLB, whether the process uses a single-level page table” (claim 1) or ii) “determining that the process uses a single-level page table” (claim 1) or iii) “determining that the second process does not use a single-level page table” (claim 4). This renders claim 5 unclear and indefinite.
Claims, dependent upon above identified claims, are also rejected on the same grounds as said above identified claims.
Allowable Subject Matter
Claim 1 recites, at least, obtaining target physical address using single-level page table that is determined, upon a miss to TLB, to be used by a process. This is the same allowable subject matter as claim 9. Note that claim 1 is the method claim corresponding to electronic device claim 9. Therefore, claim 1 is allowable over prior art for the same reasons as claim 9 in Office Action mailed 08 January 2026.
Claim 17 recites, at least, determining requested virtual address using single-level page table that is determined, upon a miss to TLB, to be used by a process. This subject matter is reflected in the following limitations of claim 17.
determining that a requested virtual address is not found in a translation lookaside buffer (TLB)
in response to determining that the requested virtual address is not found in the TLB, determining whether processes executing on the computing device use single-level page tables or whether the processes use multi-level page tables
determining that a first subset of the processes uses a single-level page table;
for each of the first process determined to use a single-level page table, when a requested virtual address is not found in a translation lookaside buffer (TLB), using a corresponding single-level page table to determine the requested virtual address
Schoinas teaches processing DMA requests (process) using default register with single/multi-level table (M) field which when asserted indicates use of single-level page table (single-level page table) (see Schoinas Fig. 6, ¶[76], [80], [82]) where Michaud teaches accessing page table in response to a TLB miss for application request (process) (see Michaud Fig. 6 and corresponding paragraphs) wherein said page table is single-level page table (see Michaud Fig. 3 and corresponding paragraphs). While Michaud teaches accessing said single-level page table in response to said TLB miss, Michaud does not appear to explicitly teach specific step of checking whether said single page table is being used by said application request in response to said TLB miss. In other words, Michaud teaches generic single-level page table access in response to a TLB miss whereas the claim requires specifically checking for whether a process uses single-level page table access in response to a TLB miss. Therefore, claim 17 is allowable over prior art of record.
Claims, dependent upon above identified claims, are also allowable over prior art for the same reasons as said above identified claims.
Claims 9 – 16 have been indicated as allowable over prior art in said Office Action mailed 08 January 2026.
Response to Remarks
Applicant’s remarks, regarding claim objection, that “a single-level page table” referring to any one of single-level page table is being used by a process are not persuasive. In view of Applicant’s own disclosure, a process either uses single-level page table or multi-level page table (see spec ¶[91]). As such, said process has only one single-level page table to choose from (and not plural/any as alleged by Applicant). Therefore, amending the claims to refer to one single-level page table for one process is consistent with Applicant’s disclosure.
It is noted that claim objections, for claim, 9 stand because no amendment were made to address said claim objections.
Applicant’s remarks, with respect to contingent limitations, are moot in view of amendments to the claims.
In addition, it is noted that Applicant’s amendments only incorporated a portion of suggested amendments in Office Action mailed 08 April 2026. As such, Applicant’s amendments introduced new grounds of rejection.
Additional Remarks
In the interest of compact prosecution, to address §112(b) rejection, i) claim 1 should be amended to “determining that the process uses [[a]] the single-level page table”, ii) claim 2 should be amended to “wherein the determining of whether the process uses [[a]] the single-level page table is based on a register bit indicating a type of the process”, and ii) claim 4 should be amended to “determining that the second process does not use [[a]] the single-level page table”. This will result in one instance of single-level page table for “the single-level page table” to refer to.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHIE YEW whose telephone number is (571)270-5282. The examiner can normally be reached Monday - Thursday and alternate Fridays.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached at (571) 272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/CHIE YEW/ Primary Examiner, Art Unit 2139
Prosecution Insights