Prosecution Insights
Last updated: July 17, 2026
Application No. 18/945,278

ISOLATION CIRCUIT AND WITHSTAND VOLTAGE TESTING METHOD THEREFOR

Non-Final OA §103
Filed
Nov 12, 2024
Priority
Jun 23, 2017 — CN 201710487958.1 +6 more
Examiner
NGUYEN, HOAI AN D
Art Unit
Tech Center
Assignee
Delta Electronics (Jiangsu) Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
628 granted / 728 resolved
+26.3% vs TC avg
Moderate +12% lift
Without
With
+11.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
16 currently pending
Career history
739
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
57.1%
+17.1% vs TC avg
§102
26.1%
-13.9% vs TC avg
§112
4.1%
-35.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 728 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements (IDSs), submitted on November 12, 2024; December 23, 2024; February 25, 2025; April 17, 2025; August 13, 2025; August 15, 2025; and March 31, 2026, are being considered by the examiner. Claim Interpretation According to MPEP 2112.02: Process Claims, it is noted that “Under the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device” (emphasis added). It is also noted in that same MPEP section that “The Federal Circuit upheld the Board’s finding that "Donley inherently performs the function disclosed in the method claims on appeal when that device is used in ‘normal and usual operation’" and found that a prima facie case of anticipation was made out” (emphasis added). Id. at 138, 801 F.2d at 1326. It was up to applicant to prove that Donley's structure would not perform the claimed method when placed in ambient light.).” With regard to claims 12, this claim presents a withstand voltage testing method for an isolation circuit according to the isolation circuit of claim 1. Therefore, the argument made against claim 1 also applies, mutatis mutandis, to claim 12. In addition, it is clearly seen that claim 12 is a process claim which presents a process of using the isolation circuit as claimed in claim 1. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2 and 4-12 are rejected under 35 U.S.C. 103 as being unpatentable over Reddy (US 9,608,513 B2) in view of Yuan et al. (US 2021/0383947 A1). Reddy teaches a system for improving load transient response in LLC converters comprising: PNG media_image1.png 510 720 media_image1.png Greyscale With regard to claims 1 and 12, an isolation circuit (FIG. 1, AC to DC converter 100) comprises a power factor correction circuit (FIG. 1, power factor correction (PFC) circuit 120) and a resonant conversion circuit (FIG. 1, DC/DC converter 130) sequentially connected in series (FIG. 1), wherein the resonant conversion circuit (FIG. 1, DC/DC converter 130) comprises: a primary circuit (FIG. 1, LLC MOSFETs Q1 and Q2) electrically connected to the power factor correction circuit (FIG. 1, power factor correction (PFC) circuit 120); a resonant circuit (FIG. 1, resonant inductor 134, resonant capacitor 135, and transformer 136) comprising a resonant inductor (FIG. 1, resonant inductor 134), a resonant capacitor (FIG. 1, resonant capacitor 135) and a transformer (FIG. 1, transformer 136), wherein the transformer (FIG. 1, transformer 136) comprises a primary winding (FIG. 1, upper winding of transformer 136) and a secondary winding (FIG. 1, lower windings of transformer 136), and the resonant inductor (FIG. 1, resonant inductor 134), the resonant capacitor (FIG. 1, resonant capacitor 135) and the primary winding (FIG. 1, upper winding of transformer 136) are connected in series (FIG. 1); and a secondary circuit (FIG. 1, LLC MOSFETs Q3, QFx and RC circuit) electrically connected to the secondary winding (FIG. 1, lower windings of transformer 136), wherein the primary circuit (FIG. 1, LLC MOSFETs Q1 and Q2), the resonant circuit (FIG. 1, resonant inductor 134, resonant capacitor 135, and transformer 136) and the secondary circuit (FIG. 1, LLC MOSFETs Q3, QFx and RC circuit) sequentially are connected in series (FIG. 1) (For more details, please read: Abstract; and column 2, lines 13-67). Reddy teaches all that is claimed as discussed above, but it does not specifically teach the following feature: A winding wire having a wire and an insulating layer wrapping around the wire, along a direction parallel to an X-axis, the insulating layer is disposed through an edge of the insulating layer on the wire, wherein the edge of the insulating layer is arranged in a direction parallel to the X-axis, and then wraps around the wire in a Y-axis direction perpendicular to the X-axis direction until a number of insulating layers wrapping the wire is at least three, and a withstand voltage value between an input terminal and an output terminal of the isolation circuit (FIG. 1, AC to DC converter 100) is ranged between 4000 VAC and 5000 VAC. Yuan et al. teaches a winding wire having an insulation layer wrapping around multiple wires comprising: PNG media_image2.png 408 804 media_image2.png Greyscale PNG media_image3.png 206 610 media_image3.png Greyscale With regard to claims 1 and 12, a winding wire (FIG. 1) having a wire (FIG. 1, wire 11) and an insulating layer (FIG. 1, insulation structure 12) wrapping around the wire (FIG. 1, wire 11), along a direction parallel to an X-axis, the insulating layer (FIG. 1, insulation structure 12) is disposed through an edge of the insulating layer (FIG. 1, insulation structure 12) on the wire (FIG. 1, wire 11), wherein the edge of the insulating layer (FIG. 1, insulation structure 12) is arranged in a direction parallel to the X-axis, and then wraps around the wire (FIG. 1, wire 11) in a Y-axis direction perpendicular to the X-axis direction until a number of insulating layer (FIG. 1, insulation structure 12)s wrapping the wire (FIG. 1, wire 11) is at least three (Paragraph: [0061]), and a withstand voltage value between an input terminal and an output terminal of the isolation circuit (FIG. 1, AC to DC converter 100) is ranged between 4000 VAC and 5000 VAC (Paragraph: [0063]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the system for improving load transient response in LLC converters of Reddy to utilize a winding wire having a wire and an insulating layer wrapping around the wire with a defined structure discussed above as taught by Yuan et al. since Yuan et al. teaches that such an arrangement is beneficial to provide a winding wire with a low material cost and a high breakdown voltage that may withstand a high arcing current for a long period such that the winding wire can be applied to the power supply transformer operating under high voltage is manufactured with a low cost as disclosed in paragraphs [0007]. With regard to claim 2, Reddy teaches the power factor correction circuit (FIG. 1, power factor correction (PFC) circuit 120) comprises a rectifier circuit (FIG. 1, rectifier 110) and a boost circuit (FIG. 1, boost controller 150) sequentially connected in series; wherein the boost circuit comprises: an energy storage inductor, a first terminal of the energy storage inductor electrically connected to the rectifier circuit; a first switch, a first power terminal of the first switch electrically connected to a second terminal of the energy storage inductor, and a second power terminal of the first switch electrically connected to ground; a diode, an anode terminal of the diode electrically connected to the first power terminal of the first switch; and a first output capacitor, a first terminal of the first output capacitor electrically connected to a cathode terminal of the diode, and a second terminal of the first output capacitor electrically connected to ground (For more details, please read: Abstract; and column 2, lines 13-67). With regard to claim 4, Yuan et al. teaches the winding wire comprises a plurality of wires, and the plurality of wires are spirally twisted at least thirty-three times in a length of one meter (Abstract). With regard to claim 5, Yuan et al. teaches each wire of the plurality of wires comprises a wire core and a coating, the wire core has a first diameter, the plurality of wires which are spirally twisted have a second diameter, and the winding wire has a third diameter, and wherein the third diameter is less than a final diameter of each wire of the plurality of wires which is wrapped by at least three insulating layers, and the third diameter is less than a final diameter of the plurality of wires which are covered by at least three insulating layers in a spiral manner (Paragraphs: [0057]-[0064]). With regard to claim 6, Yuan et al. teaches the number of the plurality of wires is greater than or equal to thirty-three (Abstract). It is noted that the feature upon which applicants rely (i.e., “the second diameter is at least 0.55 mm”) will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such potential is critical. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 (“The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.”); In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969) (Claimed elastomeric polyurethanes which fell within the broad scope of the references were held to be unpatentable thereover because, among other reasons, there was no evidence of the criticality of the claimed ranges of molecular weight or molar proportions.). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Laboratories Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997). Please see MPEP 2144.05 II. OPTIMIZATION OF RANGES: Optimization Within Prior Art Conditions or Through Routine Experimentation. With regard to claim 7, Yuan et al. teaches the insulating layer is an insulation tape (Paragraphs: [0029]-[0032]). With regard to claim 8, Reddy teaches the isolation circuit (FIG. 1, AC to DC converter 100) comprising the primary winding (FIG. 1, upper winding of transformer 136) and the secondary winding (FIG. 1, lower windings of transformer 136). It is obvious to one having ordinary skill in the art to Maintaining spacing distance between a primary and secondary winding in a transformer is crucial for ensuring electrical isolation, limiting fault currents, and providing structural room for adequate insulation and cooling. This physical separation prevents dangerous arcing and ensures compliance with global safety standards. With regard to claim 9, it is obvious to one having ordinary skill in the art to dispose the insulating separation layer within the spacing distance since it provides critical benefits across thermal, electrical, and packaging applications, enhancing overall system reliability and safety. With regard to claim 10, Reddy teaches the resonant inductor (FIG. 1, resonant inductor 134), therefore, it is noted that the feature upon which applicants rely (i.e., “the resonant inductor is achieved by a leakage inductance formed by the spacing distance and/or the insulating separation layer”) is an inherent feature of the features as recited in claims 8 and 9. With regard to claim 11, Reddy in view of Yuan et al. teaches that the resonant inductor comprises the winding wire. It is obvious to one having ordinary skill in the art to use a resonant inductor as a discrete, external component rather than relying solely on the transformer’s internal leakage inductance for benefits of maximizing circuit efficiency by enabling precise Zero-Voltage Switching (ZVS), improving thermal stability, and optimizing the resonant tank's performance to gain better control over the converter’s magnetic properties. Allowable Subject Matter Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Applicants’ attention is invited to the followings whose inventions disclose similar devices. Nakamura et al. (US 7,233,137 B2) teaches a power supply system. Wen al. (CN 105305455 B) teaches a power factor correction circuit (PFC). Lou et al. (CN 209471196 U) teaches a low voltage electric energy quality detecting system. CONTACT INFORMATION Any inquiry concerning this communication or earlier communications from the examiner should be directed to HOAI-AN D. NGUYEN whose telephone number is (571)272-2170. The examiner can normally be reached MON-THURS (7:00 AM - 5:00 PM). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LEE E. RODAK can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. HOAI-AN D. NGUYEN Primary Examiner Art Unit 2858 /HOAI-AN D. NGUYEN/ Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Nov 12, 2024
Application Filed
Jun 17, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+11.6%)
2y 3m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 728 resolved cases by this examiner. Grant probability derived from career allowance rate.

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