DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 5/7/2026 have been fully considered but they are not persuasive.
Applicant’s arguments with respect to the claims have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. The new grounds resulted from the art submitted by the applicant in the Information Disclosure Statement filed by the applicant on 7/13/2026, before filing of the final rejection.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation “connected to the exposed portion of some [emphasis added] of the plurality of fingers” of new claim 10 (component 200 has been identified as the separate printed circuit board) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 6, 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over newly submitted art by applicant1 Takakusaki et al (US2009/0135572) in view of Johnson et al (US6243654) and further in view of applicant admitted prior art (AAPA)2.
A smart connector comprising:
an Application Specific Electronics Packaging device comprising a plurality of fingers (25, 25A/B/C), a substrate (14) overmolded onto the plurality of fingers (fig. 2A), the substrate having a plurality of openings provided therethrough forming exposed portions of the plurality of fingers (figures 2A, 5A or 6), electroplated traces (13A/B/C) on the substrate which are electrically coupled to the exposed portions (fig. 1B), and at least one electrical component mounted on the substrate and electrically coupled to the traces (fig. 1B 15A/B/C and various unnumbered components); and
a separate printed circuit board (0024 “this embodiment includes multiple circuit boards 11A, 11B, and 11C”) electrically connected to the exposed portion of some of the plurality of fingers (fig. 2A) of the Application Specific Electronics Packaging device, the separate printed circuit board having electrical components (17, 18) configured to control functionality of the at least one electrical component (“metal wire”, “pads”) of the Application Specific Electronics Packaging device or having electrical components configured to modify properties of the at least one electrical component of the Application Specific Electronics Packaging device.
Takakusaki does not disclose that the connector is a smart connector comprising an application specific electronics packaging (ASEP).
Johnson discloses an electrical connector that is a smart connector (Title of invention and Field of Invention). At the time the invention was made it would have been well known to one of ordinary skill in the electrical connector art to change the electrical connector of Takakusaki to a smart electrical connector as taught by Johnson. An advantage for this combination would be to enable high-density, compact designs, that reduces electromagnetic interference (EMI), and improves overall signal integrity. This combination follows the KSR case law rationale C; use of known technique to improve similar devices in the same way.
Neither Takakusaki nor Johnson disclose that the smart connector is an application specific electronics packaging (ASEP) device.
The applicant’s own admitted prior art (throughout DESCRIPTION OF RELATED ART paragraphs 0002 to 0008) discloses a smart connector being an application specific electronics packaging device. At the time the invention was made it would have been well known to one of ordinary skill in this art to design the smart connector of Takakusaki in view of Johnson as an ASEP device. A motivation for making the connector of Takakusaki in view of Johnson an application specific electronic package to use a proven design that provides size reduction, weight savings, harsh environment durability and it integrates multiple components into a single tailored unit. This combination follows the KSR case law rationale C; use of known technique to improve similar devices in the same way.
Claim 2 modified Takakusaki discloses the smart connector as defined in claim 1, wherein the separate printed circuit board is replaceable by another circuit board (circuit board could be removed in for example figures).
Claim 6 Takakusaki discloses the smart connector as defined in claim 1, wherein the at least one electrical component on the Application Specific Electronics Packaging device comprises a field effect transistor (0031 last sentence).
Claim 8 Takakusaki discloses the smart connector as defined in claim 1, further comprising a housing (22A/B or 108) in which the Application Specific Electronics Packaging device and the printed circuit board are mounted (figures 5A & 6).
Claim 9 Takakusaki discloses the smart connector as defined in claim 1, further comprising a plurality of Application Specific Electronics Packaging devices electrically connected to the printed circuit board (figures 1B, 3A/B, 4A & 5B).
Claim 10 Takakusaki discloses the smart connector as defined in claim 1, wherein the separate printed circuit board is electrically connected to the exposed portion of some of the plurality of fingers of the Application Specific Electronics Packaging device through respective ones of the plurality of openings in the substrate overmolded onto the plurality of fingers (figures 2A, 3A, 4A, 5A & 6).
Allowable Subject Matter
Claims 3-5 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michael C Zarroli whose telephone number is (571)272-2101. The examiner can normally be reached Monday-Friday 9-5 ET IFP.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ramon Mercado can be reached at 5712705744. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MICHAEL C. ZARROLI
Primary Examiner
Art Unit 3658B
/MICHAEL C ZARROLI/Primary Examiner, Art Unit 3658 /M.C.Z/Primary Examiner, Art Unit 3658
1 IDS submitted 7/13/2026 after last office action.
2 See MPEP 2129.
Prosecution Insights