DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18947350 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because both applications recite substantially similar claim limitations.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
18/945956
18947350 (reference application)
1. A radio frequency module comprising:
a wiring board;
a first electronic component disposed on the wiring board; and
a second electronic component built in the wiring board,
the wiring board including:
a core board having a first principal surface and a second principal surface facing each other;
a first buildup layer stacked on the first principal surface of the core board; and
a second buildup layer stacked on the second principal surface of the core board,
the core board having a through hole,
the first electronic component being arranged on the first buildup layer to overlap with the through hole of the core board when viewed in plan in a thickness direction defined for the core board,
the second electronic component being disposed inside the through hole of the core board,
a thickness of the second electronic component being greater than a thickness of the core board when measured in the thickness direction defined for the core board, and
the second electronic component being electrically connected to the first electronic component via the first buildup layer.
1. A radio frequency module comprising:
a wiring board;
a first electronic component disposed on the wiring board;
an inductor built in the wiring board; and
a first shield portion and a second shield portion,
the wiring board including:
a core board having not only a first principal surface and a second principal surface facing each other but also a first through hole;
a first buildup layer stacked on the first principal surface of the core board; and
a second buildup layer stacked on the second principal surface of the core board,
the inductor including:
a magnetic core disposed inside the first through hole of the core board; and
a coil wound around the magnetic core,
an axis of winding of the coil being perpendicular to a thickness direction defined for the core board,
the first shield portion including a first feedthrough ground via conductor provided for the core board,
the second shield portion including a second feedthrough ground via conductor provided for the core board,
the first feedthrough ground via conductor and the second feedthrough ground via conductor being arranged to interpose the magnetic core between the first feedthrough ground via conductor and the second feedthrough ground via conductor in a direction aligned with the axis of winding.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1 – 20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
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Claim 1 recites “the first electronic component being arranged on the first buildup layer to overlap with the through hole of the core board when viewed in plan in a thickness direction defined for the core board,”
Figs 1, 2 illustrated the first electronic component (6A) is not overlap with the through hole (14) in a plan view.
Please refer to above diagram for evidentiary support.
Examiner suggests applicant further clarify in a later filing.
Claim 1 recites “the second electronic component being disposed inside the through hole of the core board”.
Figs. 1 and 2 illustrated the second electronic component (4) being disposed outside the through hole (14) of the core board.
Examiner suggests applicant further clarify in a later filing.
Claims 2 – 20 have same issue because of claim dependency.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1 – 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “the first electronic component being arranged on the first buildup layer to overlap with the through hole of the core board when viewed in plan in a thickness direction defined for the core board,”
Claim language “when viewed in plan in a thickness direction defined for the core board” is unclear because claim does not define which direction is considered as “a thickness direction”.
Examiner suggests applicant further clarify in a later filing.
Claims 2 – 20 have same issue because of claim dependency.
Allowable Subject Matter
Claim 1 would be allowable if rewritten or amended to overcome double patenting and the rejection(s) under 35 U.S.C. 112(a) and 35 U.S.C. 112(b), set forth in this Office action.
Claims 2 - 20 would be allowable if rewritten to overcome the double patenting and rejection(s) under 35 U.S.C. 112(a) and 35 U.S.C. 112(b), set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1:
The closest prior art is Tomita et al. (U.S. Patent Publication 20230395536 A1).
[0118] discloses The dielectric layers and the electrically conductive layers are stacked in the thickness direction of the substrate 6, that is, in the thickness direction D1 of the mounting substrate 2. The electrically conductive layers are formed into the respective predetermined patterns. Each of the electrically conductive layers includes one or more conductor portions in a plane orthogonal to the thickness direction of the substrate 6. The electrically conductive layers is made of, for example, copper. One of the electrically conductive layers is a ground layer. The substrate 6 of the radio frequency module 1 includes, for example, via conductors that form an electrical connection between the ground layer and external ground terminals. The substrate 6 is, for example, a low-temperature co-fired ceramic (LTCC) substrate. It is not required that the substrate 6 be an LTCC substrate. The substrate 6 may be a printed wiring board, a high-temperature co-fired ceramic (HTCC) substrate, or a resin multilayer substrate.
However, the prior art does not teach or suggest either singularly or in combination the specifically claimed, “the first electronic component being arranged on the first buildup layer to overlap with the through hole of the core board when viewed in plan in a thickness direction defined for the core board,
the second electronic component being disposed inside the through hole of the core board,
a thickness of the second electronic component being greater than a thickness of the core board when measured in the thickness direction defined for the core board,", in the context of the rest of the claimed limitations.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
20240105628 A1 [0124] discloses The radio frequency module 1 is provided with the wiring layer 12. Accordingly, a higher degree of freedom in designing the external connection electrodes 7 can be achieved without necessarily being restricted by the layout of the connection terminals 5 on the second main surface 22 of the mounting substrate 2. Specifically, a higher degree of freedom in the layout of the external connection electrodes 7 and a higher degree of freedom in the size of the external connection electrodes 7 (for example, the size of a cross section) can be achieved. In the degree of freedom in the layout of the external connection electrodes 7, providing the wiring layer 12 enables the external connection electrodes 7 to be disposed not only not to overlap with the second electronic components 4 in the plan view in the thickness direction D1 of the mounting substrate 2 but also to overlap with the second electronic components 4.
US 20210006283 A1 [0067] Further, in the radio frequency module 1 according to Embodiment 1, the substrate 10 further includes the wiring 150 electrically connecting the first circuit element 41 and the first input terminal 21. The low permittivity portion 130 is provided between a portion of the wiring 150 facing the ground layer 121 in the thickness direction D1 and the ground layer 121. With this, in the radio frequency module 1 according to Embodiment 1, it is possible to connect the first input terminal 21 of the low-noise amplifier 2 and the first circuit element 41 by the wiring 150 of the substrate 10. In addition, in the radio frequency module 1 according to Embodiment 1, since the parasitic capacitance generated between the wiring 150 having substantially the same electric potential as that of the first input terminal 21 and the ground layer 121 may be reduced, it is possible to reduce the NF of the low-noise amplifier 2.
US 20240097721 A1 [0210] discloses thickness of package
US 20240022267 A1 discloses thickness direction of RF module on [0063]
US 20240022232 A1 discloses thickness direction on [0132]
US 20220173759 A1 discloses thickness direction of the multilayer structure is the first main surface 2a of the mounting substrate 2 on [0037]
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHUN-NAN LIN whose telephone number is (571)272-5646. The examiner can normally be reached Monday - Thursday 7:30am - 6pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C Lee can be reached at 571-2722963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHUN-NAN LIN/Primary Examiner, Art Unit 2629
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