DETAILED ACTION
Claims 1-14 are presented for examination.
This office action is in response to RCE of application on 28-APRIL-2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 28-APRIL-2026 has been entered.
Response to Arguments
Applicant’s arguments, see pages 8-12, filed 6-JAN-2026, with respect to rejections under 35 U.S.C. 103 have been fully considered and are persuasive due to amendments. The rejections under 35 U.S.C. 103 of claims 1-14 have been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of previously applied prior art references.
1. Regarding Applicant’s arguments that the Pedram reference does not teach the splitting the block to generate additional data blocks, Examiner agrees, but argues that this point is moot, as the rejection for this element has relied on a combination of Pedram in view of other references in all previous office actions. In other words, since the standard of an obviousness rejection is proving that the invention is a combination of teachings of multiple references that one of ordinary skill in the art would find obvious, it is not relevant whether the Pedram reference on its own teaches every element.
2. Regarding Applicant’s arguments that the Li reference lacks a purposeful splitting when non-zero elements exceed an N threshold because it splits every dense matrix into submatrices regardless of the sparsity ratio, Examiner respectfully disagrees. Examiner notes that the very definition of a dense matrix is one where the proportion of non-zero elements within the matrix exceeds some N threshold. Therefore, by Applicant’s own admission that Li teaches splitting all dense matrices, Li is understood to split matrices when the number of non-zero elements exceeds an N threshold. Therefore, Li teaches the conditional trigger.
3. Regarding Applicant’s arguments that the Li reference teaches division of dense matrices into submatrices strictly for the purpose of load balancing, Examiner notes that the intended use of the reference does not preclude the structure of the prior art from being capable of performing the cited intended use of the instant invention. Although the particular new limitation of the additional data blocks satisfying the N:M sparsity rule is not taught in Li, the rejection still relies on a combination of the teachings of multiple references, and a rationale may still exist to combine specific teachings of Li into the teachings of Pedram.
4. Regarding Applicant’s arguments that the combination of prior art references differs from the invention based on a pruning step within the prior art, Examiner again notes that there are still no limitations in the claims which preclude a pruning step from reading on the claimed invention. That is, there is no element in the claim as drafted that specifically disallow a pruning step, nor is there any element in the claim as drafted that requires that data integrity is preserved as argued, and therefore, although the rejection has not even relied upon a pruning step (as discussed below), techniques that involve pruning or otherwise not preserving data integrity still fall within the metes and bounds of the claim. The claim merely requires that when a number of non-zero elements in a block are greater than a particular threshold number, the target block will be split with a newly amended condition that the blocks satisfy a sparsity condition.
5. Regarding Applicant’s arguments that the combination of prior art references can at most be interpreted to apply Pedram’s pruning to submatrices divided by Li, Examiner respectfully disagrees. Interpreting the prior art as at most applying pruning to submatrices is an overly narrow interpretation that unreasonably limits the manner in which the teachings of the references must be applied. This is shown in the response to arguments and the rejections in the previous final rejection, where the combination of references was not at all based upon pruning submatrices. The rejections relied upon Pedram supplying a predetermined sparsity arrangement that needed to be met and a method of raising sparsity to achieve it, and Li supplying a method of splitting a matrix to raise the data sparsity according to a matrix density trigger. Together, the references were interpreted as using the method of Li to achieve the condition of Pedram. In this manner, since Pedram’s method of pruning is interpreted to be entirely substituted out for a non-pruning technique, the combination of references does not necessarily rely on pruning, and Applicant’s argument about pruning being a necessary element of the combination of prior art references is entirely moot.
6. Regarding Applicant’s arguments that the splitting for sparsity approach is not taught within a single reference because one reference teaches the different technique with the claimed goal and the other reference teaches the claimed technique for a different goal, Examiner respectfully disagrees. Examiner notes that when a rejection relies upon the combination of references, one cannot show obviousness by attacking the entire embodiments of individual references. That is, Applicant cannot write off the teachings of Pedram and Li because the references fail to teach the entirety of the claimed trigger + method + desired result individually. As explained above, when the trigger of both references is the same (there are too many non-zero values in a single block, ie. block sparsity is too low/block density is too high), and the methods are different (pruning or dividing) but achieve the same result (raising the sparsity of the block(s)), in view of a strict predetermined sparsity arrangement requirement, the combination of triggering a method of raising sparsity when there are too many non-zero values in a block by dividing the block in a manner which complies with the predetermined sparsity arrangement requirement is a valid combination of the teachings.
7. Despite the fact that Examiner disagrees with Applicant’s arguments that the Pedram/Li combination do not render the invention obvious for the reasons above, after further search and consideration, Examiner has found new prior art references that more explicitly teach the limitations of the independent claims and is updating the rejections with the new prior art references.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4, 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over
PEDRAM et al., U.S. Pub. No. 20240095518 (hereinafter “Pedram”) in view of
Zheng et al., U.S. Pub. No. 20230110401 (hereinafter “Zheng”) further in view of
Meyer et al., U.S. Patent No. 12182695 (hereinafter “Meyer”).
Regarding claim 1: Pedram teaches A memory controller comprising: ([0049], Pedram teaches a controller that controls data movement from memory.)
a compression control circuit configured to generate a compressed data by compressing the data based on an N:M sparsity rule and generate a metadata including metadata for data elements included in the compressed data; ([0033], Pedram teaches a compressor unit that compresses tensors during operations. Moreover, in [0034], Pedram teaches that the processing core can process structured sparsity arrangements to compute the output tensors that may be compressed, including various sparsities of a lower integer to a higher integer. Furthermore, in [0036], Pedram teaches that the memory can generate metadata associated with the compressed tensors. The compressed tensors with processing based on structured sparsity arrangements of one integer to another is interpreted to be the claimed generate a compressed data by compressing data based on an N:M sparsity rule. The metadata being generated for a compressed tensor is interpreted to be the claimed generating metadata including metadata for data elements included in the compressed data).
a first write for writing the compressed data and a second write for writing the metadata; and ([0032], Pedram teaches that the memory may store the compressed tensors, and separately, that metadata associated with the compressed tensors may also be stored in the memory.)
N and M are natural numbers and an M is greater than N. ([0034], Pedram teaches various structured sparsity arrangements including 2:4, in which both numbers are natural numbers and the second number is greater than the first.)
Pedram does not appear to explicitly disclose data blocks, a host interface circuit configured to receive a host read request, a host write request, and a data block corresponding to the host write request from a host; a scheduler configured to schedule commands, a memory interface circuit configured to transmit a memory command output from the scheduler to a memory device, or when a number of non-zero elements among M elements included in a target data block is greater than N, the compression control circuit splits the target data block to generate one or more additional data blocks that include non-zero elements exceeding N, and compresses the one or more additional data blocks to generate one or more additional compressed data blocks.
However, Zheng teaches data blocks being written and a host interface circuit configured to receive a host read request, a host write request, and a data block corresponding to the host write request from a host; ([0049], Zheng teaches a host interface within a storage controller that enables communication with the host system, to implement a storage interface or protocol. Furthermore, in [0037-0039], Zheng teaches that a storage controller may receive host I/Os from the host system for data access, including host write requests and read requests, and that a media access manager (in the storage controller) may receive from the host, a request to write one or more blocks of data. Though not explicit, since the host interface enables communication with the host, it is obvious that when the storage controller receives the host I/Os, it would be received via the host interface, and the claim limitations are taught. The blocks of Zheng also correspond to the tensor data of Pedram.).
Zheng further teaches a scheduler configured to schedule write commands ([0037], Zheng teaches that host I/Os are received, and later in the same paragraph teaches queued scheduled host I/Os for data access, including host write requests. While not explicitly stated, components queueing and thereby creating scheduled host I/Os, is interpreted as the function of the claimed scheduler.)
Zheng further teaches a memory interface circuit configured to transmit a memory command output from the scheduler to a memory device, wherein ([0037], Zheng teaches that the storage controller may perform media I/Os for storage media accesses corresponding to scheduled host I/Os. While not explicit, the memory media I/Os corresponding to the scheduled host I/Os is interpreted to be the claimed memory command output from the scheduler to the memory device, and as such, since the storage controller of Zheng generates those internal I/Os, the storage controller of Zheng meets the limitations of the claimed memory interface circuit.)
Pedram and Zheng are analogous art because they are from the same field of endeavor, memory management.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram and Zheng to achieve the combined result of the memory controller with a host interface circuit that can process host reads and host write requests with data blocks, with a memory interface that transmits a memory command from a scheduler to the memory device, to also include a mechanism for generating compressed data blocks by compressing the data block based on an N:M sparsity rule and generate a metadata block including metadata for the data elements included in the compressed data block, with N and M being natural numbers and M being greater than N.
One of ordinary skill in the art would have been motivated to make this modification in order to apply known compression systems used for matrices which saves storage size and reduces memory traffic, as discussed in Pedram [0026], to host data blocks in more general memory systems.
Pedram/Zheng do not appear to explicitly disclose when a number of non-zero elements among M elements included in a target data block is greater than N, the compression control circuit splits the target data block to generate one or more additional data blocks that include non-zero elements exceeding N such that the one or more additional data blocks satisfy the N:M sparsity rule, and compresses the one or more additional data blocks to generate one or more additional compressed data blocks.
However, Meyer teaches when a number of non-zero elements among M elements included in a target data block is greater than N, the compression control circuit splits the target data block to generate one or more additional data blocks that include non-zero elements exceeding N such that the one or more additional data blocks satisfy the N:M sparsity rule, (Col. 14 lines 13-24 and Col. 18 lines 39-67, Meyer teaches that when a weight matrix (corresponding to the target data block) is denser than a sparsity condition such as a predetermined sparsity threshold, then the weight matrix may be decomposed/partitioned into a set of constrained fine-grained sparce matrices such that the constrained matrices each have a desired sparsity, with an example being partitioning a matrix with 50% sparsity to two with 75% sparsity with one non-zero value in each column.).
Meyer further teaches compresses the one or more additional data blocks to generate one or more additional compressed data blocks. (Col. 19 lines 36-46 and Col. 13 lines 11-23, Meyer teaches that after a conversion of one weight matrix into a set of sparse weight matrices, a sparsity row information can be generated, which allows the set of sparse weight matrices to be stored with a compressed format.)
Pedram/Zheng and Meyer are analogous art because they are from the same field of endeavor, data management.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram/Zheng and Meyer, which generates compressed data blocks by compressing an obtained data block from a host write based on an N:M sparsity rule, which generates an additional block when the weight matrix has a number of non-zero values over a threshold, such that each block has a desired sparsity.
One of ordinary skill in the art would have been motivated to make this modification as a known method of enforcing sparsity in weight matrices, which allows for a compression that reduces the memory space needed to store the weight matrices, improves memory bandwidth utilization, and to improve power consumption during matrix processing, as discussed in Meyer Col. 3 lines 28-36.
Regarding claim 2: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 1, from which claim 2 depends.
Pedram/Zheng/Meyer further teaches the compression control circuit includes a metadata buffer storing the metadata block. ([0036], Pedram teaches that the metadata associated with compressed tensors are output to a metadata buffer.).
Regarding claim 3: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 2, from which claim 3 depends.
Pedram/Zheng/Meyer further teaches during a read operation, the compression control circuit generates a first read command for reading the compressed data block in response to the host read request, and ([0033], Pedram teaches that the compressor/decompressor unit can decompress or compress tensors depending on the direction they flow (with respect to the processor and memory) compressed tensors flowing from the memory towards the NPU are uncompressed. The compressed tensors flowing from memory is interpreted to be the claimed read operation, during which a compressed data block is read. As shown with respect to claim 1, the combination of Pedram and Zheng results in the combination of the compression concepts of Pedram, applied to general host I/O requests, and therefore, in [0037], Zheng teaches the storage controller generating internal I/Os corresponding to host I/Os, including read requests, and teaches generating the first read command for reading the data in response to the host read request. Finally, in [0060], Zheng teaches that host read requests result in accesses for blocks in the block pool, which contains the data (previously) written to the storage media.)
Pedram/Zheng/Meyer further teaches generates a second read command for reading the metadata block from the memory device when the metadata block does not exist in the metadata buffer, and ([0037], Pedram teaches that during a decompression, metadata associated with the compressed tensors is received by the metadata buffer. While not explicit, this occurs during the decompression, which occurs when compressed tensors are read from memory. Furthermore, in [0032], Pedram generally teaches that metadata associated with compressed tensors may be stored in memory. Therefore, when metadata is stored in memory, and needs to be received by the metadata buffer during a decompression operation, it is obvious that the metadata is being read from the memory and that the metadata buffer does not contain the metadata until then.)
Pedram/Zheng/Meyer further teaches the scheduler schedules the first read command and the second read command. (As shown with respect to claim 1, Zheng teaches a scheduling of all host commands, including read commands, which would obviously apply to the readings of the previous limitations of claim 3.)
One of ordinary skill in the art would have been motivated to make these modifications for the same reasons as in claim 1.
Regarding claim 4: the combination of Pedram, Zheng, and Meyer teaches all limitations of claim 3, from which claim 4 depends.
Pedram/Zheng/Meyer further teaches the compression control circuit generates a data block corresponding to the host read request by referring to the compressed data block received by the first read command and the metadata block corresponding to the compressed data block ([0037], Pedram teaches that a decompressor unit would input the compressed tensor to a zero injector logic that injects zero elements based on the metadata in the metadata buffer. The metadata is associated with the compressed tensors received, and overall the result of the decompression is the output dense tensor. Combining the teachings of Pedram and Zheng, generating an output tensor during a decompression to read stored compressed tensors by referring to the compressed tensor and metadata corresponding to it, can be applied to data blocks and host data operations, and the claimed generating a data block corresponding to the host read request by referring to the compressed data block received by the first read command and the metadata block corresponding to the compressed data block is an obvious result.)
One of ordinary skill in the art would have been motivated to make these modifications for the same reasons as in claim 1.
Regarding claim 10: Pedram teaches an operation method of a memory controller, the operation method comprising: ([0049], Pedram teaches a controller that controls data movement from memory.)
generating a compressed data by compressing the data based on an N:M sparsity rule; generating a metadata including metadata for data elements included in the compressed data block; ([0033], Pedram teaches a compressor unit that compresses tensors during operations. Moreover, in [0034], Pedram teaches that the processing core can process structured sparsity arrangements to compute the output tensors that may be compressed, including various sparsities of a lower integer to a higher integer. Furthermore, in [0036], Pedram teaches that the memory can generate metadata associated with the compressed tensors. The compressed tensors with processing based on structured sparsity arrangements of one integer to another is interpreted to be the claimed generate a compressed data by compressing data based on an N:M sparsity rule. The metadata being generated for a compressed tensor is interpreted to be the claimed generating metadata including metadata for data elements included in the compressed data).
generating a first write for writing the compressed data in a memory device; and generating a second write for writing the metadata in the memory device ([0032], Pedram teaches that the memory may store the compressed tensors, and separately, that metadata associated with the compressed tensors may also be stored in the memory.)
N and M are natural numbers and an M is greater than N. ([0034], Pedram teaches various structured sparsity arrangements including 2:4, in which both numbers are natural numbers and the second number is greater than the first.)
Pedram does not appear to explicitly disclose data blocks, a host interface circuit configured to receive a host read request, a host write request, and a data block corresponding to the host write request from a host; a scheduler configured to schedule commands, a memory interface circuit configured to transmit a memory command output from the scheduler to a memory device, wherein
However, Zheng teaches data blocks being written and receiving a data block corresponding to a host write request from a host; ([0037-0039], Zheng teaches that a storage controller may receive host I/Os from the host system for data access, including host write requests and read requests, and that a media access manager (in the storage controller) may receive from the host, a request to write one or more blocks of data. The blocks of Zheng also correspond to the tensor data of Pedram.)
Zheng further teaches generating write commands ([0037], Zheng teaches that the storage controller may perform media I/Os for storage media accesses corresponding to scheduled host writes)
Pedram and Zheng are analogous art because they are from the same field of endeavor, memory management.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram and Zheng to achieve the combined result of the memory controller that can process host reads and host write requests with data blocks, with a memory interface that generating compressed data blocks by compressing the data block based on an N:M sparsity rule and generate a metadata block including metadata for the data elements included in the compressed data block, and which generates write commands for writing those blocks in the memory device, with N and M being natural numbers and M being greater than N.
One of ordinary skill in the art would have been motivated to make this modification in order to apply known compression systems used for matrices which saves storage size and reduces memory traffic, as discussed in Pedram [0026], to host data blocks in more general memory systems.
Pedram/Zheng do not appear to explicitly disclose when a number of non-zero elements among M elements included in a target data block is greater than N, the compression control circuit splits the target data block to generate one or more additional data blocks that include non-zero elements exceeding N such that the one or more additional data blocks satisfy the N:M sparsity rule, and compresses the one or more additional data blocks to generate one or more additional compressed data blocks.
However, Meyer teaches when a number of non-zero elements among M elements included in a target data block is greater than N, the compression control circuit splits the target data block to generate one or more additional data blocks that include non-zero elements exceeding N such that the one or more additional data blocks satisfy the N:M sparsity rule, (Col. 14 lines 13-24 and Col. 18 lines 39-67, Meyer teaches that when a weight matrix (corresponding to the target data block) is denser than a sparsity condition such as a predetermined sparsity threshold, then the weight matrix may be decomposed/partitioned into a set of constrained fine-grained sparce matrices such that the constrained matrices each have a desired sparsity, with an example being partitioning a matrix with 50% sparsity to two with 75% sparsity with one non-zero value in each column.).
Meyer further teaches compresses the one or more additional data blocks to generate one or more additional compressed data blocks. (Col. 19 lines 36-46 and Col. 13 lines 11-23, Meyer teaches that after a conversion of one weight matrix into a set of sparse weight matrices, a sparsity row information can be generated, which allows the set of sparse weight matrices to be stored with a compressed format.)
Pedram/Zheng and Meyer are analogous art because they are from the same field of endeavor, data management.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram/Zheng and Meyer, which generates compressed data blocks by compressing an obtained data block from a host write based on an N:M sparsity rule, which generates an additional block when the weight matrix has a number of non-zero values over a threshold, such that each block has a desired sparsity.
One of ordinary skill in the art would have been motivated to make this modification as a known method of enforcing sparsity in weight matrices, which allows for a compression that reduces the memory space needed to store the weight matrices, improves memory bandwidth utilization, and to improve power consumption during matrix processing, as discussed in Meyer Col. 3 lines 28-36.
Regarding claim 11: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 10, from which claim 11 depends.
Pedram/Zheng/Meyer further teaches the second write command is generated when all metadata included in the metadata block are valid. (As discussed with respect to claim 10, the combination of Pedram and Zheng teaches generating the second write command to write the metadata block into the memory, in situations whenever the metadata block is generated in the first place, which would include when all metadata included in the metadata block are valid. Therefore, the claimed second write command being generated when all metadata included in the metadata block is valid is taught.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 10.
Regarding claim 12: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 10, from which claim 12 depends.
Pedram/Zheng/Meyer further teaches generating a first read command for reading a first compressed data block corresponding to a host read request; ([0033], Pedram teaches that the compressor/decompressor unit can decompress or compress tensors depending on the direction they flow (with respect to the processor and memory) compressed tensors flowing from the memory towards the NPU are uncompressed. The compressed tensors flowing from memory is interpreted to be the claimed reading, during which a compressed data block is read. As shown with respect to claim 10, the combination of Pedram and Zheng results in the combination of the compression concepts of Pedram, applied to general host I/O requests, and therefore, in [0037], Zheng teaches the storage controller generating internal I/Os corresponding to host I/Os, including read requests, and teaches generating the first read command for reading the data in response to the host read request. Finally, in [0060], Zheng teaches that host read requests result in accesses for blocks in the block pool, which contains the data (previously) written to the storage media.)
Pedram/Zheng/Meyer further teaches generating a second read command for reading a first metadata block corresponding to the first compressed data block; and ([0037], Pedram teaches that during a decompression, metadata associated with the compressed tensors is received by the metadata buffer. While not explicit, this occurs during the decompression, which occurs when compressed tensors are read from memory. Furthermore, in [0032], Pedram generally teaches that metadata associated with compressed tensors may be stored in memory, so reading the metadata, which is stored as a block, is taught.)
Pedram/Zheng/Meyer further teaches generating a data block corresponding to the host read request based on the first compressed data block and the first metadata block. ([0037], Pedram teaches that a decompressor unit would input the compressed tensor to a zero injector logic that injects zero elements based on the metadata in the metadata buffer. The metadata is associated with the compressed tensors received, and overall the result of the decompression is the output dense tensor. Combining the teachings of Pedram and Zheng, generating an output tensor during a decompression to read stored compressed tensors by referring to the compressed tensor and metadata corresponding to it, can be applied to data blocks and host data operations, and the claimed generating a data block corresponding to the host read request by referring to the compressed data block received by the first read command and the metadata block corresponding to the compressed data block is an obvious result.)
One of ordinary skill in the art would have been motivated to make these modifications for the same reasons as in claim 10.
Claims 5-9, 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over
PEDRAM et al., U.S. Pub. No. 20240095518 (hereinafter “Pedram”) in view of
Zheng et al., U.S. Pub. No. 20230110401 (hereinafter “Zheng”) in view of
Meyer et al., U.S. Patent No. 12182695 (hereinafter “Meyer”) in view of
Cheng et al., U.S. Pub. No. 20110320532 (hereinafter “Cheng”)
Regarding claim 5: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 2, from which claim 5 depends.
Pedram/Zheng/Meyer further teaches when the compression control circuit generates the compressed data block and the one or more additional compressed data blocks (As discussed with respect to claim 1, the combination of Pedram/Zheng/Meyer teaches the generation of a compressed data block and additional compressed data blocks.)
Pedram/Zheng/Meyer do not appear to explicitly disclose the compression control circuit further includes a mapping table, and wherein the mapping table stores relationships between the compressed data block and the additional compressed data block.
However, Cheng teaches a mapping, and wherein the mapping stores relationships between the data block and the additional data block. ([0059-0060], Cheng teaches that when a complete file is created as part writing data to an object storage server, the file is split into sub-data, and a mapping between the file and the sub-data blocks is established according to the identifier of the file. While not explicitly represented as a table, a table is an obvious form such a mapping can take, which in [0055], is a way that Cheng describes mappings.)
Pedram/Zheng/Meyer and Cheng are analogous art because they are from the same field of endeavor, data management in memory systems.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram/Zheng/Meyer and Cheng, to achieve the result of a system which generates a compressed data block and additional compressed data block from an input data block as part of a host write request, to also include a mapping table which stores relationships between compressed data blocks and their additional compressed data blocks when generated.
One of ordinary skill in the art would have been motivated to make this modification in order to enable the retrieval of all associated sub-blocks that are part of the same original data when the original data is read as discussed in Cheng [0068-0074].
Regarding claim 6: The combination of Pedram, Zheng, Meyer, and Cheng teaches all limitations of claim 5, from which claim 6 depends.
Pedram/Zheng/Meyer/Cheng further teaches the compression control circuit generates one or more additional metadata blocks respectively corresponding to the one or more additional compressed data blocks, and wherein the compression control circuit further generates a third write command for the one or more additional compressed data blocks, and a fourth write command for the one or more additional metadata blocks. (As shown with respect to claim 1, the memory controller of the combination of Pedram and Zheng teaches of generating a metadata block corresponding to a compressed data block, and performing a write command for writing both the compressed data block and the metadata block. In combination with the teachings of Meyer to split the data of one operation into multiple compressed data units, it is obvious to extend the teachings of generating an additional metadata block for the additional compressed data units and the claimed generating a third write command for the additional compressed data block and a fourth write command for the additional metadata block.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 1.
Regarding claim 7: The combination of Pedram, Zheng, Meyer, and Cheng teaches all limitations of claim 6, from which claim 7 depends.
Pedram/Zheng/Meyer/Cheng further teaches the compression control circuit generates a first read command for reading a first compressed data block corresponding to the host read request, and
further generates a third read command for reading a first additional compressed data block corresponding to the first compressed data block when information for the first additional compressed data block exists in the mapping table. ([0068-0074], Cheng teaches that after receiving a read request for a file, the system searches for the mappings between the file and the sub-data blocks established when the file was written. As discussed with respect to claim 5, the combination of Pedram/Zheng/Meyer/Cheng teaches the system that generates a first compressed data block and any additional compressed data blocks, whose relationship is recorded in a mapping table. Therefore, the additional teachings of Cheng in combination with the previously discussed combination results in the combination of the claimed first read command for reading a first compressed data block corresponding to the host read request, and further generating a third read command for reading a first additional compressed data block corresponding to the first compressed data block when information for the first additional compressed data block exists in the mapping table.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 5.
Regarding claim 8: The combination of Pedram, Zheng, Meyer, and Cheng teaches all limitations of claim 7, from which claim 8 depends.
Pedram/Zheng/Meyer/Cheng further teaches the compression control circuit further generates a fourth read command for reading a first additional metadata block, corresponding to the first additional compressed data block, from the memory device when the first additional metadata block does not exist in the metadata buffer. ([0037], Pedram teaches that during a decompression, metadata associated with the compressed tensors is received by the metadata buffer. While not explicit, this occurs during the decompression, which occurs when compressed tensors are read from memory. Furthermore, in [0032], Pedram generally teaches that metadata associated with compressed tensors may be stored in memory. Therefore, when metadata is stored in memory, and needs to be received by the metadata buffer during a decompression operation, it is obvious that the metadata is being read from the memory and that the metadata buffer does not contain the metadata until then. Further, as discussed with respect to claim 6, the combination of Pedram/Zheng/Meyer/Cheng teaches the situation where an additional compressed data block and additional metadata corresponding to it would be created, and so to process a reading for the first additional compressed data block, the reading of the additional metadata when the metadata buffer does not contain the additional metadata is an obvious application.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 5.
Regarding claim 9: The combination of Pedram, Zheng, Meyer, and Cheng teaches all limitations of claim 7, from which claim 9 depends.
Pedram/Zheng/Meyer/Cheng further teaches the compression control circuit generates a data block corresponding to the host read request based on the first compressed data block, the first additional compressed data block, the first metadata block, and the first additional metadata block. ([0037], Pedram teaches that a decompressor unit would input the compressed tensor to a zero injector logic that injects zero elements based on the metadata in the metadata buffer. The metadata is associated with the compressed tensors received, and the overall result of the decompression is the output dense tensor. Combining these teachings of Pedram to those of the combination of Pedram/Zheng/Meyer/Cheng, the generation of n decompressed output data block corresponding to the host read request based on all the various compressed sub-blocks associated with the original data established during writing, and all of their corresponding metadata is taught.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 5.
Regarding claim 13: The combination of Pedram, Zheng, and Meyer teaches all limitations of claim 10, from which claim 13 depends.
Pedram/Zheng/Meyer further teaches generating an additional metadata block including metadata for data elements included in the additional compressed data block; generating a third write command for writing the additional compressed data block; and generating a fourth write command for writing the additional metadata. (As shown with respect to claim 10, the memory controller of the combination of Pedram and Zheng teaches of generating a metadata block corresponding to a compressed data block, and performing a write command for writing both the compressed data block and the metadata block. In combination with the teachings of Meyer to split the data of one operation into multiple compressed data units, it is obvious to extend the teachings of generating an additional metadata block for the additional compressed data units and the claimed generating a third write command for the additional compressed data block and a fourth write command for the additional metadata block.)
Pedram/Zheng/Meyer do not appear to explicitly disclose storing relationships between the compressed data block and the one or more additional compressed data blocks;
However, Cheng teaches storing relationships between the data block and the one or more additional data block; ([0059-0060], Cheng teaches that when a complete file is created as part writing data to an object storage server, the file is split into sub-data, and a mapping between the file and the sub-data blocks is established according to the identifier of the file.)
Pedram/Zheng/Meyer and Cheng are analogous art because they are from the same field of endeavor, data management in memory systems.
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have combined the teachings of Pedram/Zheng/Meyer and Cheng, to achieve the result of a system which generates a compressed data block and additional compressed data block from an input data block as part of a host write request, to also include a mapping table which stores relationships between compressed data blocks and their additional compressed data blocks when generated.
One of ordinary skill in the art would have been motivated to make this modification in order to enable the retrieval of all associated sub-blocks that are part of the same original data when the original data is read as discussed in Cheng [0068-0074].
Regarding claim 14: The combination of Pedram, Zheng, Meyer, and Cheng teaches all limitations of claim 13, from which claim 14 depends.
Pedram/Zheng/Meyer/Cheng further teaches generating a first read command for reading a first compressed data block corresponding to a host read request; generating a third read command for reading a first additional compressed data block corresponding to the first compressed data block when information for the first additional compressed data block exists in the relationships; ([0068-0074], Cheng teaches that after receiving a read request for a file, the system searches for the mappings between the file and the sub-data blocks established when the file was written. As discussed with respect to claim 13, the combination of Pedram/Zheng/Meyer/Cheng teaches the system that generates a first compressed data block and any additional compressed data blocks, whose relationship is recorded in a mapping table. Therefore, the additional teachings of Cheng in combination with the previously discussed combination results in the combination of the claimed first read command for reading a first compressed data block corresponding to the host read request, and further generating a third read command for reading a first additional compressed data block corresponding to the first compressed data block when information for the first additional compressed data block exists in the mapping table.)
Pedram/Zheng/Meyer/Cheng further teaches generating a fourth read command for reading a first additional metadata block corresponding to the first additional compressed data; ([0037], Pedram teaches that during a decompression, metadata associated with the compressed tensors is received by the metadata buffer. While not explicit, this occurs during the decompression, which occurs when compressed tensors are read from memory. Furthermore, in [0032], Pedram generally teaches that metadata associated with compressed tensors may be stored in memory, and the reading the metadata is taught. Further, as discussed with respect to claim 13, the combination of Pedram/Zheng/Meyer/Cheng teaches the situation where an additional compressed data block and additional metadata corresponding to it would be created, and so to process a reading for the first additional compressed data block, the reading of the additional metadata is an obvious application.)
Pedram/Zheng/Meyer/Cheng further teaches generating a data block corresponding to the host read request based on the first compressed data block, the first additional compressed data block, a first meta data block corresponding to the first compressed data block, and the first additional meta data block. ([0037], Pedram teaches that a decompressor unit would input the compressed tensor to a zero injector logic that injects zero elements based on the metadata in the metadata buffer. The metadata is associated with the compressed tensors received, and the overall result of the decompression is the output dense tensor. Combining these teachings of Pedram to those of the combination of Pedram/Zheng/Meyer/Cheng, the generation of a decompressed output data block corresponding to the host read request based on all the various compressed sub-blocks associated with the original data established during writing, and all of their corresponding metadata is taught.)
One of ordinary skill in the art would have been motivated to make this modification for the same reasons as claim 13.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure:
Choi et al., U.S. Pub. No. 20040049502, teaches a system which partitions a feature vector space into a plurality of hypercubes, and if those hypercubes are too heavily populated, they are continually partitioned until they are sparsely populated.
Gunnam et al., U.S. Pub. No. 20210303976, teaches a system which partitions a feature map and reorganizes the non-zero values until the sparsity of all partitions satisfies a sparsity condition.
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/K.H.P./Examiner, Art Unit 2133
/ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133
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