Prosecution Insights
Last updated: July 17, 2026
Application No. 18/947,008

DISPLAY PANEL AND TILED DISPLAY USING THE SAME

Non-Final OA §103
Filed
Nov 14, 2024
Priority
Dec 11, 2023 — TW 112148176
Examiner
LIU, SHAN
Art Unit
Tech Center
Assignee
AUO Corporation
OA Round
1 (Non-Final)
72%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
449 granted / 621 resolved
+12.3% vs TC avg
Strong +39% interview lift
Without
With
+38.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
33 currently pending
Career history
648
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
84.3%
+44.3% vs TC avg
§102
5.5%
-34.5% vs TC avg
§112
6.5%
-33.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 621 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-4, 6, 14-16 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Fan (US 2021/0109389) in view of Zheng (US 2024/0019727) and Li (WO 2021/104494A1). Regarding claim 1, Fan teaches a display panel (Fig. 1-7, [0021-0050]) comprising: a first substrate (the substrate corresponding to 1002 in Fig. 3 and 7); a second substrate (the substrate corresponding to 1004 in Fig. 3 and 7); a frame area (the area corresponding to 11/11A in Fig. 1-7, [0033-0035]); a display array (Fig. 1-7, [0025-0026, 0033]) disposed at a display area (the area corresponding to R1 in Fig. 3 and 7, [0033]) of the first substrate (the substrate corresponding to 1002 in Fig. 3 and 7) and the second substrate (the substrate corresponding to 1004 in Fig. 3 and 7), wherein the display area is surrounded by the frame area (Fig. 1, 4 and 6, [0033-0035]); a micro-LED array (the array corresponding to 11/11A in Fig. 1, 4 and 6) disposed at the frame area (the area corresponding to 11/11A in Fig. 1-7, [0033-0035]) and comprising a plurality of micro-LEDs (112R/112G/112B in Fig. 3 and 7), wherein the micro-LEDs (the array corresponding to 11/11A in Fig. 1, 4 and 6) are disposed in cavities (Fig. 7 and Fig. 3). Fan does not explicitly teach that a sealant is configured to mount the first substrate and the second substrate at the frame area; a planarization layer disposed on an outer surface of the first substrate and comprising a plurality of reflective cavities; and the micro-LEDs are disposed in the reflective cavities. Zheng teaches that (Fig. 1-2, 4 and 7-8, [0031-0036, 0039]) a sealant (13 in Fig. 2, [0036]) is configured to mount the first substrate (12 in Fig. 2) and the second substrate (11 in Fig. 2) at the frame area (the area corresponding to BA1, BA2, BA3 and BA4 in Fig. 1, 4 and 7-8, [0031); a planarization layer (80 in Fig. 2, [0039]) disposed on an outer surface (Fig. 2) of the first substrate (12 in Fig. 2) and comprising a plurality of cavities (the cavities of 80 for LED chips 30 in Fig. 2, 4 and 8, [0039]); and the micro-LEDs (the micro-LEDs corresponding to 30 in Fig. 2, 4 and 8, [0034) are disposed in the cavities (the cavities of 80 for LED chips 30 in Fig. 2, 4 and 8, [0039]). Li teaches that (Fig. 2, 6 and 10, Abs, Pages 5-11 of English translation of WO 2021/104494A1) a plurality of cavities (the cavities of 13 for the micro LEDs 12 in Fig. 10) in which micro-LEDs (the micro LEDs 12 in Fig. 10) are disposed in are a plurality of reflective cavities (Fig. 6, Abs). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Zheng and Li for the system of Fan such that in the system of Fan, a sealant is configured to mount the first substrate and the second substrate at the frame area; a planarization layer disposed on an outer surface of the first substrate and comprising a plurality of reflective cavities; and the micro-LEDs are disposed in the reflective cavities. The motivation is to flatten the surface of the substrate on which the LED chips are disposed and reduce or eliminate the splicing seam of the spliced display device (Zheng, [0039, 0047]), and it helps to improve light emission efficiency (Li, Abs). Regarding claim 16, Fan teaches a tiled display (Fig. 6-7, Fig. 1-5, [0021-0051]) comprising a plurality of display panel (Fig. 6-7), each of the display panel (Fig. 1-7) comprising: a first substrate (the substrate corresponding to 1002 in Fig. 3 and 7); a second substrate (the substrate corresponding to 1004 in Fig. 3 and 7); a frame area (the area corresponding to 11/11A in Fig. 1-7, [0033-0035]); a display array (Fig. 1-7, [0025-0026, 0033]) disposed at a display area (the area corresponding to R1 in Fig. 3 and 7, [0033]) of the first substrate (the substrate corresponding to 1002 in Fig. 3 and 7) and the second substrate (the substrate corresponding to 1004 in Fig. 3 and 7), wherein the display area is surrounded by the frame area (Fig. 1, 4 and 6, [0033-0035]); a micro-LED array (the array corresponding to 11/11A in Fig. 1, 4 and 6) disposed at the frame area (the area corresponding to 11/11A in Fig. 1-7, [0033-0035]) and comprising a plurality of micro-LEDs (112R/112G/112B in Fig. 3 and 7), wherein the micro-LEDs (the array corresponding to 11/11A in Fig. 1, 4 and 6) are disposed in cavities (Fig. 7 and Fig. 3), wherein the display panels are tiled (Fig. 6) such that the micro-LED arrays (the array corresponding to 11/11A in Fig. 6) of the display panels are between the display arrays of the display panels (Fig. 6-7). Fan does not explicitly teach that a sealant is configured to mount the first substrate and the second substrate at the frame area; a planarization layer disposed on an outer surface of the first substrate and comprising a plurality of reflective cavities; and the micro-LEDs are disposed in the reflective cavities. Zheng teaches that (Fig. 1-2, 4 and 7-8, [0031-0036, 0039]) a sealant (13 in Fig. 2, [0036]) is configured to mount the first substrate (12 in Fig. 2) and the second substrate (11 in Fig. 2) at the frame area (the area corresponding to BA1, BA2, BA3 and BA4 in Fig. 1, 4 and 7-8, [0031); a planarization layer (80 in Fig. 2, [0039]) disposed on an outer surface (Fig. 2) of the first substrate (12 in Fig. 2) and comprising a plurality of cavities (the cavities of 80 for LED chips 30 in Fig. 2, 4 and 8, [0039]); and the micro-LEDs (the micro-LEDs corresponding to 30 in Fig. 2, 4 and 8, [0034) are disposed in the cavities (the cavities of 80 for LED chips 30 in Fig. 2, 4 and 8, [0039]). Li teaches that (Fig. 2-7 and 10, Abs, Pages 5-11 of English translation of WO 2021/104494A1) a plurality of cavities (the cavities of 13 for the micro LEDs 12 in Fig. 2, 6-7 and 10) in which micro-LEDs (the micro LEDs 12 in Fig. 2, 6-7 and 10) are disposed in are a plurality of reflective cavities (Fig. 2, 6-7 and 10, Abs). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Zheng and Li for the system of Fan such that in the system of Fan, a sealant is configured to mount the first substrate and the second substrate at the frame area; a planarization layer disposed on an outer surface of the first substrate and comprising a plurality of reflective cavities; and the micro-LEDs are disposed in the reflective cavities. The motivation is to flatten the surface of the substrate on which the LED chips are disposed and reduce or eliminate the splicing seam of the spliced display device (Zheng, [0039, 0047]), and it helps to improve light emission efficiency (Li, Abs). Regarding claims 3, 14 and 19, Fan also teaches that the first substrate (the substrate corresponding to 1002 in Fig. 3 and 7) is a color filter substrate (Fig. 3 and 7, [0026]), Fan does not teach the following elements. Zheng teaches the following elements (Fig. 1-2, 4 and 7-8, [0031-0036, 0039]): (Claim 3 and 19) the planarization layer (80 in Fig. 2, [0039]) is disposed on the outer surface of the color filter substrate (12 in Fig. 2, [0036]). (Claim 14) the planarization layer (80 in Fig. 2) continuously extends from the frame area to the display area (Fig. 2, [0039]). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Zheng for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claim 3 and 19) the planarization layer is disposed on the outer surface of the color filter substrate. (Claim 14) the planarization layer continuously extends from the frame area to the display area. The motivation is to flatten the surface of the substrate on which the LED chips are disposed and reduce or eliminate the splicing seam of the spliced display device (Zheng, [0039, 0047]). Regarding claims 4 and 6, Fan does not teach the following elements. Li teaches the following elements (Fig. 2-7 and 10-11, Abs): (Claim 4) each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. 2-7 and 10-11) is a trapezoid structure (Fig. 2-7 and 10-11), each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. 2-7 and 10-11) is filled with a filling material (14 in Fig. 2-7 and 10-11), and an angle between a sidewall of each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. Fig. 2-7 and 10-11) and an outer surface of a lower substrate is 67 degrees (the angle θ is 67 degrees, Page 10, paragraph 6). It would have been obvious to one of ordinary skill in the art to recognize that the claimed range of from 50 degrees to 60 degrees is similar and close to the range disclosed by the prior art (MPEP 2144. 05 I.). (Claim 6) a top surface of the filling material (14 in Fig. 7) is above a top surface of the planarization layer (13 in Fig. 7), and a distance (the distance of (h3-h1) in Fig. 7, Page 8, Paragraph 2 and 5, h1 is in the range of 100-200µm, h2 is about 100µm, h3 is in the range of 100-300µm) between the top surface of the filling material (14 in Fig. 7) and the top surface of the planarization layer (13 in Fig. 7) is less than (Fig. 7) a thickness of the planarization layer (h1 in Fig. 7), the distance is in a range of 0-200 µm (the distance of (h3-h1) in Fig. 7, Page 8, Paragraph 2 and 5, h1 is in the range of 100-200µm, h2 is about 100µm, h3 is in the range of 100-300µm), and the thickness of the planarization layer (h1 in Fig. 7) is in the range of 100-200µm. It would have been obvious to one of ordinary skill in the art to recognize that the claimed range of “equal to or less than ⅓ of the thickness of the planarization layer” overlaps the range disclosed by the prior art (MPEP 2144. 05 I.). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Li for the system of Fan in view of Zheng and Li to try and recognize that in the system of Fan in view of Zheng and Li, (Claim 4) each of the reflective cavities is a trapezoid structure, each of the reflective cavities is filled with a filling material, and an angle between a sidewall of each of the reflective cavities and the outer surface of the color filter substrate is in a range from 50 degrees to 60 degrees. (Claim 6) a top surface of the filling material is above a top surface of the planarization layer, and a distance between the top surface of the filling material and the top surface of the planarization layer is equal to or less than ⅓ of a thickness of the planarization layer. The motivation is to improve light emission efficiency, and it is can be designed/adjusted to prevent the light emitted by the micro light emitting diode from being totally reflected at the interface between the protective/filling layer and the air (Li, Abs, Page 10, paragraph 6). Regarding claims 15 and 18, as stated in the rejection of claims 1 and 16 above, Fan in view of Zheng and Li teaches that the micro-LEDs are disposed in the reflective cavities. Li also teaches that the micro-LEDs are disposed in the reflective cavities, respectively (Fig. 2, 6 and 10). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Li for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, the micro-LEDs are disposed in the reflective cavities, respectively. The motivation is to improve light emission efficiency (Li, Abs). Claims 2, 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Fan in view of Zheng and Li as applied to claims 1, 3 and 16 above, and further in view of Liu (US 2020/0144229). Regarding claims 2, 8 and 17, Fan does not teach the following elements. Liu teaches the following elements (Fig. 2 and 4A-4B, [0029-0033]): (Claims 2 and 17) a surface of each of reflective cavities (510 in Fig. 2 and 4A-4B, [0031]) is disposed with a reflective layer (200 in Fig. 2 and 4A-4B, [0031]). (Claim 8) a surface of each of reflective cavities (510 in Fig. 2 and 4A-4B, [0031]) is disposed with a reflective layer (200 in Fig. 2 and 4A-4B, [0031]) that laterally extended from each of the reflective cavities (510 in Fig. 2 and 4A-4B, [0031]) to a top surface of a planarization layer (the top surface of 500 in Fig. 4B) by a distance, and the distance is equal to or less than 5 μm (the distance is zero in Fig. 4B) Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Liu for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claims 2 and 17) a surface of each of the reflective cavities is disposed with a reflective layer. (Claim 8) a surface of each of the reflective cavities is disposed with a reflective layer that laterally extended from each of the reflective cavities to a top surface of the planarization layer by a distance, and the distance is equal to or less than 5 μm. The motivation is to improve the uniformity of overall optical properties of a displayed image/screen (Liu, [0005]). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Fan in view of Zheng and Li as applied to claim 4 above, and further in view of Yan (CN 112908188B). Regarding claim 5, Fan does not teach the following elements. Yan teaches the following elements (Fig. 2-4, Abs, Pages 4-7 of English translation of CN 112908188B): (Claim 5) a filling material (150 in Fig. 2 and 4) is recessed (Fig. 2 and 4) form a top surface of a planarization layer (the layer corresponding to 141 and 142 in Fig. 2 and 4). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Yan for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claim 5) an isolation layer disposed between the color filter substrate and the planarization layer. The motivation is that the light emitted from the optical film layer can be emitted at different angles, realizing light control, solving the problem that the light of the splicing screen is not uniform (Yan, Abs). Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Fan in view of Zheng and Li as applied to claim 3 above, and further in view of Hsiao (US 2020/0168696). Regarding claim 7, Fan does not teach the following elements. Hsiao teaches the following elements (Fig. 2, [0003-0005, 0016-0017, 0026, 0037-0038]): (Claim 7) an isolation layer (30 in Fig. 2, [0037-0038]) disposed between a color filter substrate (the inherent CF substrate of the jointed display panel, [0003-0005, 0026]) and a planarization layer (50 in Fig. 2, [0037-0038]). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Hsiao for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claim 7) an isolation layer disposed between the color filter substrate and the planarization layer. The motivation is to bond the mini/micro LED panel with the display panel (Hsiao, [0037, 0016, 0010]). Claims 9, 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fan in view of Zheng and Li as applied to claims 3 and 16 above, and further in view of Shin (US 2006/0227273). Regarding claims 9 and 20, as stated in the rejections of claims 1 and 16, Fan in view of Zheng and Li already teaches that the planarization layer disposed on an outer surface of the first substrate. Fan does not teach the following elements. Shin teaches the following elements (Fig. 8-11, [0084-0090]): (Claims 9 and 20) a first substrate (600 in Fig. 8-9) is an array substrate (Fig. 8-9 and 10B-11). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Shin for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claims 9 and 20) the first substrate is an array substrate, therefore, the planarization layer is disposed on the outer surface of the array substrate. The motivation is to prevent afterimages from being displayed on a screen thereof and a flickering phenomenon, and improve display quality (Shin, [0084]). Regarding claim 10, Fan does not teach the following elements. Li teaches the following elements (Fig. 2-7 and 10-11, Abs): (Claim 10) each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. 2-7 and 10-11) is a trapezoid structure (Fig. 2-7 and 10-11), each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. 2-7 and 10-11) is filled with a filling material (14 in Fig. 2-7 and 10-11), and an angle between a sidewall of each of the reflective cavities (the cavities of 13 for the micro LEDs 12 in Fig. Fig. 2-7 and 10-11) and an outer surface of a lower substrate is in a range from 25 degrees to 45 degrees or 60 degrees to 80 degrees (the angle θ is 67 degrees, Page 10, paragraph 6). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Li for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claim 10) each of the reflective cavities is a trapezoid structure, each of the reflective cavities is filled with a filling material, and an angle between a sidewall of each of the reflective cavities and the outer surface of the color filter substrate is in a range from 25 degrees to 45 degrees or 60 degrees to 80 degrees. The motivation is to improve light emission efficiency, and it is can be designed/adjusted to prevent the light emitted by the micro light emitting diode from being totally reflected at the interface between the protective/filling layer and the air (Li, Abs, Page 10, paragraph 6). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Fan in view of Zheng and Li as applied to claim 1 above, and further in view of Wang (CN 103525316A). Regarding claim 13, Fan does not teach the following elements. Wang teaches the following elements (Fig. 3-4, Abs, [0026-0044] of English translation of CN 103525316A): (Claim 13) a sealant (the sealant 2 in Fig. 3-4) comprises a plurality of scatter particles (the diffuser 2a in Fig. 3-4). Before the effective filling date of the claimed invention, it would have been obvious to the artisan of ordinary skill to employ the above elements as taught by Hsiao for the system of Fan in view of Zheng and Li such that in the system of Fan in view of Zheng and Li, (Claim 13) the sealant comprises a plurality of scatter particles. The motivation is to improve the curing of the sealant (Wang, [0020]). Allowable Subject Matter Claims 11-12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: None of the prior art of record discloses or suggests all the combination of a display panel as set forth in claims 11-12. Regarding claim 11, none of the prior art discloses or suggests a display panel recited in claim 9, wherein “each of the reflective cavities is a trapezoid structure, each of the reflective cavities is filled with an air media, and an angle between a sidewall of each of the reflective cavities and the outer surface of the array substrate is in a range from 25 degrees to 45 degrees” in combination with the other required elements of the claim. Regarding claim 12, none of the prior art discloses or suggests a display panel recited in claim 9, wherein “each of the reflective cavities is a dome structure, each of the reflective cavities is filled with an insulating protrusion, and a ratio of a depth to a width of each of the reflective cavities is in a range from 0.2 to 0.3” in combination with the other required elements of the claim. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAN LIU whose telephone number is (571)270-0383. The examiner can normally be reached on 9am-5pm EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Carruth can be reached on 571-272-9791. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Shan Liu/ Primary Examiner, Art Unit 2871
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Prosecution Timeline

Nov 14, 2024
Application Filed
Jul 08, 2026
Non-Final Rejection mailed — §103 (current)

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Expected OA Rounds
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