Prosecution Insights
Last updated: April 18, 2026
Application No. 18/947,363

ORGANIC ELECTROLUMINESCENT DEVICES

Final Rejection §103§112
Filed
Nov 14, 2024
Examiner
HARRIS, DOROTHY H
Art Unit
2625
Tech Center
2600 — Communications
Assignee
UNIVERSAL DISPLAY CORPORATION
OA Round
2 (Final)
62%
Grant Probability
Moderate
3-4
OA Rounds
2y 8m
To Grant
85%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
560 granted / 898 resolved
At TC average
Strong +22% interview lift
Without
With
+22.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
29 currently pending
Career history
927
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
54.6%
+14.6% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
19.4%
-20.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 898 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the response to this Office action, the Office respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Office in prosecuting this application. The Office has cited particular figures, elements, paragraphs and/or columns and line numbers in the references as applied to the claims for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider each of the cited references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage disclosed by the Office. Status of Claims - Applicant’s Amendment filed December 11, 2025 is acknowledged. - Claim(s) 1-20, 27 is/are canceled - Claim(s) 21-26, 29-33 is/are amended - Claim(s) 39 is/are new - Claim(s) 21-26, 28-39 is/are pending This action is FINAL Examiner respectfully reminds Applicant that amendments to claims must comply with 37 CFR 1.121(c). Claim 23 was not properly labeled (Amended) as it should have been in the response dated December 11, 2025. Application Notes Drive circuit (claim 21, 32, 33, 37, 38 paragraph 0126-0127 of published application U.S. Patent Publication No. 20250069551 “drive circuit, such as shown in FIG. 3” and “the drive circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”) Driver TFT (claim 23, 33 Figure 3, element driver TFT) Drive control circuit (claim 23 paragraph 0020, 0122 of published application U.S. Patent Publication No. 20250069551 “drive control circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”) Controller (paragraph 0029, 0031, 0036, 0039-0042, 0111, 0116, 0128, 0130, 0133, 0136-0139 of published application U.S. Patent Publication No. 20250069551 “controller” is mentioned a plurality of times as being “configured to”. However, Applicant’s disclosure does not specifically describe or illustrate circuitry, hardware/software, programming beyond indicating that “controller” is “configured to” perform actions. It is unclear how such actions are accomplished and what device/method/process/machine performs such actions) Drive circuitry (claim 29, 30, 31 paragraph 0124-0125 of published application U.S. Patent Publication No. 20250069551 “drive circuitry, such as shown in FIG. 3”) As can be seen from the above, at least two terms (drive circuit and drive control circuit) appear to have been used to describe “a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”. As best understood by Examiner, it appears that “drive circuitry” is also intended to correspond to the same elements as “drive circuit” and “drive control circuit”. Further, it appears that OLED has been used in the disclosure to describe an OLED pixel element (see figure 3 and paragraph 0020, 0122 “response time accelerator TFT may be connected in parallel to the OLED, and connected in series with the driver TFT, and connected to a second scan line”) and an OLED display device (see paragraph 0074 “In some embodiments, the OLED further comprises a layer comprising a delayed fluorescent emitter. In some embodiments, the OLED comprises a RGB pixel arrangement or white plus color filter pixel arrangement. In some embodiments, the OLED is a mobile device, a hand held device, or a wearable device. In some embodiments, the OLED is a display panel having less than 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a display panel having at least 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a lighting panel.”. For the purpose of applying art, Examiner has attempted to construe the claim language as best understood from applicant’s disclosure. The metes and bounds of claim 38 for which Applicant seeks protection are not clear. Therefore, Examiner is unable to perform a reasonable search of the relevant prior arts. Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Objections Examiner respectfully withdraws the objection to the claims. Applicant’s amendment has rendered the objection moot. Drawings Examiner respectfully withdraws the objection to the drawings under 37 CFR 1.121(d) . Applicant’s amendment has rendered the objection moot. The drawings are objected to because The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the features of claim 30 “the drive control circuit is configured to control at least two sub-pixels”, claim 31 “ the drive control circuit is configured to control at least three sub-pixels “, claim 33 “wherein the response time accelerator TFT connected in parallel with the driver TFT, and connected in series with the OLED, connected to a separate power line, and connected to the second scan line “, claim 38 “ the drive control circuit is configured to control one or more sub-pixels” (please refer to 35 USC 112 rejections below) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 21-26, 28-39 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. Claim 21 recites “A device comprising: an organic light emitting device (OLED) that includes one or more pixels, with each pixel having one or more subpixels; and a drive control circuit to control the operation of the OLED, comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the OLED for a predetermined period of time during a frame time, wherein the drive control circuit is coupled to a first scan line and a second scan line.” It is not clear from Applicant’s disclosure, how “a drive control circuit” which is disclosed as “ “drive control circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”)” in paragraphs 0020, 0122 of published application U.S. Patent Publication No. 20250069551, is intended to control operation of the organic light emitting device. As discussed in the previous office action, it appears that OLED has been used in the disclosure to describe an OLED (organic light emitting diode) pixel element (see figure 3 and paragraph 0020, 0122 “response time accelerator TFT may be connected in parallel to the OLED, and connected in series with the driver TFT, and connected to a second scan line”) and an OLED (organic light emitting display) device (see paragraph 0074 “In some embodiments, the OLED further comprises a layer comprising a delayed fluorescent emitter. In some embodiments, the OLED comprises a RGB pixel arrangement or white plus color filter pixel arrangement. In some embodiments, the OLED is a mobile device, a hand held device, or a wearable device. In some embodiments, the OLED is a display panel having less than 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a display panel having at least 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a lighting panel.”. Based on Applicant’s amendments, as claimed, “OLED” corresponds to “organic light emitting device”. Therefore, as best understood by Examiner, Applicant’s disclosure does not appear to be enabled to achieve the recited features. Examiner again urges that Applicant amend the claims to clarify claim language in order to differentiate between organic light emitting device (that includes one or more pixels) and organic light emitting diode (an element of a pixel that is controlled by a drive control circuit including a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT). Dependent claims 22-26, 28-39 inherit the deficiencies of independent claim 21. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 21, 26, 28, 30, 31, 32, 34, 37, 38 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The metes and bounds for which protection is sought are not clear. Claim 21 recites “A device comprising: an organic light emitting device (OLED) that includes one or more pixels, with each pixel having one or more subpixels; and a drive control circuit to control the operation of the OLED, comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the OLED for a predetermined period of time during a frame time, wherein the drive control circuit is coupled to a first scan line and a second scan line, wherein the response time accelerator TFT is configured to reduce an amount of light emitted from the one or more sub-pixels when the second scan line is energized.” Initially it is not clear from Applicant’s disclosure, how “a drive control circuit” which is disclosed as “ “drive control circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”)” in paragraphs 0020, 0122 of published application U.S. Patent Publication No. 20250069551, is intended to control operation of the organic light emitting device. As discussed in the previous office action, it appears that OLED has been used in the disclosure to describe an OLED pixel element (see figure 3 and paragraph 0020, 0122 “response time accelerator TFT may be connected in parallel to the OLED, and connected in series with the driver TFT, and connected to a second scan line”) and an OLED display device (see paragraph 0074 “In some embodiments, the OLED further comprises a layer comprising a delayed fluorescent emitter. In some embodiments, the OLED comprises a RGB pixel arrangement or white plus color filter pixel arrangement. In some embodiments, the OLED is a mobile device, a hand held device, or a wearable device. In some embodiments, the OLED is a display panel having less than 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a display panel having at least 10 inch diagonal or 50 square inch area. In some embodiments, the OLED is a lighting panel.”. Based on Applicant’s amendments, as claimed, “OLED” corresponds to “organic light emitting device”. In order to advance prosecution in the prior art rejection below, Examiner has construed “A device comprising: an organic light emitting device (OLED) that includes one or more pixels, with each pixel having one or more subpixels; and a drive control circuit to control the operation of the OLED, comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the OLED for a predetermined period of time during a frame time, wherein the drive control circuit is coupled to a first scan line and a second scan line, wherein the response time accelerator TFT is configured to reduce an amount of light emitted from the one or more sub-pixels when the second scan line is energized” as “A device comprising: an organic light emitting device (OLED) that includes one or more pixels, with each pixel having one or more subpixels; and a drive control circuit to control the operation of an organic light emitting diode , comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the organic light emitting diode for a predetermined period of time during a frame time, wherein the drive control circuit is coupled to a first scan line and a second scan line, wherein the response time accelerator TFT is configured to reduce an amount of light emitted from the one or more sub-pixels when the second scan line is energized” Further, it is not clear from Applicant’s disclosure how “the response time accelerator thin film transistor” which, as best understood by Examiner, is disclosed as being a component of a single sub-pixel (i.e. drawings of the invention and specification does not appear to describe a single response time accelerator TFT connected to a plurality of sub-pixels), is controlling more than one sub-pixel. Clarification is required. The metes and bounds for which protection is sought for the claims is not clear. Claim 26 recites “The device of claim 21, wherein the response time accelerator TFT is configured to decrease luminance of the one or more sub-pixels by shorting, partially shorting, reverse-biasing, or placing a predetermined or controllable low resistance across the OLED.” It is unclear how Applicant’s disclosure can be construed to meet the claimed “wherein the response time accelerator TFT is configured to decrease luminance of the one or more sub-pixels by shorting, partially shorting, reverse-biasing, or placing a predetermined or controllable low resistance across the OLED”. Particularly in view of Applicant’s clarifying amendment that “OLED” corresponds to “organic light emitting device”. Clarification is required. Claim 28 recites “The device of claim 21, wherein the response time accelerator TFT reduces subsequent light output from the OLED after shorting, partially shorting, reverse biasing, or placing a predetermined or controllable low resistance across the OLED for the period it is energized.” It is unclear how Applicant’s disclosure can be construed to meet the claimed “wherein the response time accelerator TFT reduces subsequent light output from the OLED after shorting, partially shorting, reverse biasing, or placing a predetermined or controllable low resistance across the OLED for the period it is energized”. Particularly in view of Applicant’s clarifying amendment that “OLED” corresponds to “organic light emitting device”. Clarification is required. Claim 30 recites “The device of claim 21, wherein the drive control circuit is configured to control at least two sub-pixels that include a first sub-pixel configured to emit a light having a first color and a second sub-pixel configured to emit light having a second color.” It is not clear from Applicant’s disclosure, how “a drive control circuit” which is disclosed as “ “drive control circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”)” in paragraphs 0020, 0122 of published application U.S. Patent Publication No. 20250069551, is intended to control at least two sub-pixels. Further, Applicant’s disclosure does not appear to describe or illustrate in the drawings a single “drive control circuit” configured to control at least two subpixels. Clarification is required. Claim 31 recites “The device of claim 21, wherein the drive control circuit is configured to control at least three sub-pixels that include a first sub-pixel configured to emit a light having a first color, a second sub-pixel configured to emit light having a second color, and a third sub-pixel configured to emit light having a third color.” It is not clear from Applicant’s disclosure, how “a drive control circuit” which is disclosed as “ “drive control circuit may include a selection thin film transistor (TFT) that is coupled to a data line and a first scan line, and a driver TFT that is coupled to the select TFT and the OLED”)” in paragraphs 0020, 0122 of published application U.S. Patent Publication No. 20250069551, is intended to control at least three sub-pixels that include a first sub-pixel configured to emit a light having a first color, a second sub-pixel configured to emit light having a second color, and a third sub-pixel configured to emit light having a third color. Further, Applicant’s disclosure does not appear to describe or illustrate in the drawings a single “drive control circuit” configured to control at least three subpixels. Clarification is required. Claim 32 recites “The device of claim 21, each pixel of the plurality of pixels includes a first sub-pixel, a second sub-pixel, and at least one third sub-pixel, and wherein the drive control circuit is configured to control a portion of the first sub-pixels of the plurality of pixels to output light.” As best understood by Examiner, Applicant’s disclosure does not have a single drive control circuit that controls multiple subpixels. Clarification is required. Claim 33 recites “The device of claim 21, wherein the drive control circuit further comprises: a selection thin film transistor (TFT) that is coupled to a data line and a first scan line; and a driver TFT that is coupled to the select TFT and the OLED, and wherein the response time accelerator TFT connected in parallel with the driver TFT, and connected in series with the OLED, connected to a separate power line, and connected to a second scan line.” However, as disclosed, the response time accelerator TFT of figure 4 does not appear to be connected in parallel with the driver TFT (notice that driver TFT and response time accelerator TFT are not connect in parallel because points b and c are not connected to each other). PNG media_image1.png 758 1495 media_image1.png Greyscale Further, it is not clear how the feature of being connected in parallel with the driver TFT could be accomplished since the response time accelerator is required to be connected to a separate power supply line whereas connection in parallel with the driver TFT would require that the response time accelerator TFT is connected to a same power supply line as the driver TFT. In order to further prosecution, Examiner has attempted to apply the prior art in the subsequent rejection as best understood from Applicant’s figure 4. Claims 34-37 are dependent upon claim 33 and inherit the deficiencies of parent claim 33. Claim 38 recites “The device of claim 21, wherein the drive control circuit is configured to control one or more sub-pixels to energize a portion of the sub-pixels in a region of a display where a luminance is determined to be less than a predetermined level.” It is not clear from the claim language or Applicant’s original disclosure the metes and bounds of “the drive circuit is configured to control one or more sub-pixels to energize a portion of the sub-pixels in a region of a display where a luminance is determined to be less than a predetermined level”. Examiner is unable to find any specific disclosure of a single drive control circuit controlling a plurality of organic light emitting diodes. Clarification is required. The metes and bounds of claim 38 for which Applicant seeks protection are not clear. Appropriate clarification is required for a thorough search and comparison with the prior arts. As such claim 38 will not be further considered with respect to the prior arts because it is not possible to guess Applicant’s intended claim language/features (see MPEP 2143.03 In re Wilson, 424 F.2d 1382, 165 USPQ 494 (CCPA 1970) (if no reasonably definite meaning can be ascribed to certain claim language, the claim is indefinite, not obvious) and In re Steele, 305 F.2d 859,134 USPQ 292 (CCPA 1962) (it is improper to rely on speculative assumptions regarding the meaning of a claim and then base a rejection under 35 U.S.C. 103 on these assumptions).). Dependent claims 22-26, 28-39 inherit the deficiencies of independent claim 21. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 21-26, 28-32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fujikura et al, U.S. Patent Publication No. 20050007361 in view of Kwak, U.S. Patent Publication No. 20060103608. Consider claim 21, Fujikura teaches a device comprising: an organic light emitting device (OLED) that includes one or more pixels (Fujikura figure 8 and paragraphs 0092-0093 where Pixels, each including an OLED element and a pixel circuit, are arranged in rows and columns at the intersections of the scan and data lines 3 and 4), a drive control circuit to control operation of the OLED (see Fujikura figure 23, elements Tr1, Tr2, Tr3, Cs, NT0, NT2, NT1_1, TN1_2, NT1_3, PT3, NT4), comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the OLED for a predetermined period of time during a frame time (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period), wherein the drive control circuit (see Fujikura figure 23, elements Tr1, Tr2, Tr3, Cs, NT0, NT2, NT1_1, TN1_2, NT1_3, PT3, NT4) is coupled to a first scan line (see Fujikura figure 23, n_0) and a second scan line (see Fujikura figure 23, element NT4, 5, n_4B, Tr1, Tr2, Tr3), wherein the response time accelerator TFT is configured to reduce an amount of light emitted from the one or more sub-pixels when the second scan line is energized (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period). Fujikura is silent regarding with each pixel having one or more sub-pixels. In a related field of endeavor, Kwak teaches a pixel includes subpixels emitting red, green and blue light so as to provide color image display (see Kwak paragraph 0041 and figure 1 where a pixel 10 includes subpixels 10r, 10 g, and 10b, and these subpixels 10r, 10g, and 10b respectively include OLEDr, OLEDg, and OLEDb respectively emitting red (R), green (G), and blue (B) light). One of ordinary skill would have been motivated to have modified Fujikura with the teachings of Kwak to have the recited features so as to provide color image display using known techniques with predictable results. Fujikura does not appear to explicitly disclose response time accelerator thin film transistor. However, in view of Fujikura paragraph 0152 teaching that the switch short circuits the OLED so as to rapidly stop emitting light, one of ordinary skill in the art would have recognized the teachings of Fujikura as corresponding to the recited features of the claim. Consider claim 22, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the OLED has a voltage that is greater than or equal to zero volts when the response time accelerator TFT shorts or reverse biases the OLED (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period). Consider claim 23, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the drive control circuit further comprises: a selection thin film transistor (TFT) (see Fujikura figure 23, element NT0, NT2) that is coupled to a data line (see Fujikura figure 23, element 4) and a first scan line (see Fujikura figure 23, n_0); and a driver TFT (see Fujikura figure 23, element Tr1, Tr2, Tr3) that is coupled to the select TFT (see Fujikura figure 23, element NT0, NT2) and the OLED (see Fujikura figure 23, element 5); wherein the response time accelerator TFT is connected in parallel to the OLED, and connected in series with the driver TFT, and connected to the second scan line (see Fujikura figure 23, element NT4, 5, n_4B, Tr1, Tr2, Tr3). Consider claim 24, Fujikura as modified by Kwak teaches all the limitations of claim 23 and further teaches wherein the response time accelerator TFT is configured to be energized by a scan line pulse to the second scan line of the device (see Fujikura figure 23, element N_4B and paragraph 0153-0156 where scan signal is activated/deactivated to control an associated switch). Consider claim 25, Fujikura as modified by Kwak teaches all the limitations of claim 24 and further teaches wherein the second scan line is at least one selected from the group consisting of: a scan line before the first scan line, a scan line after the first scan line, a scan line adjacent to the first scan line, and a scan line within a predetermined distance from the first scan line (see Fujikura figure 23, element n_4B, n_0 where n_4B is adjacent to n_0 and is within a predetermined distance from n_0). Consider claim 26, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the response time accelerator TFT is configured to decrease luminance of the one or more sub-pixels by shorting, partially shorting, reverse-biasing, or placing a predetermined or controllable low resistance across the OLED (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period). Claim 27 canceled Consider claim 28, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the response time accelerator TFT reduces subsequent light output from the OLED after shorting, partially shorting, reverse biasing, or placing a predetermined or controllable low resistance across the OLED for the period it is energized (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period).. Consider claim 29, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the drive control circuit (see Fujikura figure 23, elements Tr1, Tr2, Tr3, Cs, NT0, NT2, NT1_1, TN1_2, NT1_3, PT3, NT4) is configured to control at least one selected from the group consisting of: at least one sub-pixel of the OLED that is configured to emit white light, at least one sub-pixel of the OLED configured to emit yellow light, at least one sub-pixel to emit green light, at least one sub-pixel to emit blue light, and at least one sub- pixel configured to emit cyan light (see Kwak paragraph 0041 and figure 1). Consider claim 30, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the drive control circuit (see Fujikura figure 23, elements Tr1, Tr2, Tr3, Cs, NT0, NT2, NT1_1, TN1_2, NT1_3, PT3, NT4) is configured to control at least two sub-pixels (where each pixel includes similar drive elements) that include a first sub-pixel configured to emit a light having a first color and a second sub-pixel configured to emit light having a second color (see Kwak paragraph 0041 and figure 1). Consider claim 31, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein the drive control circuit (see Fujikura figure 23, elements Tr1, Tr2, Tr3, Cs, NT0, NT2, NT1_1, TN1_2, NT1_3, PT3, NT4) is configured to control at least three sub-pixels (where each pixel includes similar drive elements) that include a first sub-pixel configured to emit a light having a first color, a second sub-pixel configured to emit light having a second color, and a third sub-pixel configured to emit light having a third color (see Kwak paragraph 0041 and figure 1). Consider claim 32, Fujikura as modified by Kwak teaches all the limitations of claim 21 and further teaches wherein each pixel includes a first sub-pixel, a second sub-pixel, and at least one third sub-pixel (see Kwak paragraph 0041 and figure 1), and wherein the drive control circuit is configured to control a portion of the first sub-pixels of the plurality of pixels to output light (see Fujikura paragraphs 0152, 0164-0168 specifically for example paragraph 0152 where a switch SW4 is connected in parallel to the OLED element 5; the modified pixel circuit is designated by numeral 11D. The switch SW4 is used to short-circuit the electrodes of the OLED element 5 at the beginning of the blanking period. This allows the OLED element 5 to rapidly stop emitting light when the blanking period is initiated. The OLED element 5 continues to emit light for a while after stopping providing the driver current because of the charges accumulated in the OLED element 5. This potentially causes an undesirable afterimage seen on the display panel. Short-circuiting the electrodes of the OLED element 5 effectively discharges the accumulated charges, and thereby allows the OLED element 5 to stop emitting light at the beginning of the blanking period). Claim(s) 21, 33-36, 39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma et al, U.S. Patent Publication No. 20170039944 in view of Yamamoto et al, U.S. Patent Publication No. 20110074838 and Kwak, U.S. Patent Publication No. 20060103608. Consider claim 21, Ma teaches a device comprising: an organic light emitting device (OLED) (see Ma paragraph 0052, 0108 and figure 2, D1, light emitting module and paragraph 0083 where light emitting module 007 may comprise: an organic light emitting diode D1) a drive control circuit to control operation of the OLED (see Ma figure 2, element M1, M2, M3, M4, M5, M6, M7, M8), comprising a response time accelerator thin film transistor (TFT) configured to short or reverse bias the OLED for a predetermined period of time during a frame time (see Ma paragraph 0067, 0078, 0087-0088, 0091 where input voltage of the second power supply signal terminal is written into the first control point by the reset module, the input voltage of the third power supply signal terminal is written into the third control point by the compensation module, the input voltage of the data signal terminal is written into the fourth control point by the drive control module, so that the drive module is discharged under control of the voltages on the first control point, the third control point and the fourth control point, and since the input voltage of the third power supply signal terminal is larger than the difference between the input voltage of the data signal terminal and the threshold voltage of the drive module, and less than the input voltage of the second power supply signal terminal, the voltage on the drive module is pre-compensated utilizing the voltage pre-compensation principle, thereby discharging of the drive module to the potential Vth is sped up, the time for discharging the drive module to the potential Vth is shortened, therefore it is ensured that the drive module can be discharged completely within a short period), wherein the drive control circuit is coupled to a first scan line and a second scan line (see Ma figure 2, elements Gn, Gn-1, EM), wherein the response time accelerator TFT is configured to reduce an amount of light emitted from the one or more sub-pixels when the second scan line is energized (see Ma paragraphs 0067, 0078, 0087-0088, 0091). Ma does not appear to explicitly disclose short or reverse bias the OLED. In the same field of endeavor, Yamamoto teaches that when a light emitting diode has a short circuit a drive current flows through a path that reduces light emission brightness of an OLED (see Yamamoto figure 12 and paragraph 0221). One of ordinary skill in the art with benefit of the teachings of Yamamoto would readily recognize, without inventive inspiration, that Ma’s compensation module discharges the potential of the drive module thereby reducing current through the OLED by discharge through M3 (see Ma figure 2, element M3, figure 3, element P1 and paragraph 0038, 0100 where first transistor M1, the second transistor M2 and the third transistor M3 are turned on, the first voltage Vref input to the first power supply signal terminal VREF is written into the second control point B, the second voltage Vdd input to the second power supply signal terminal VDD is written into the first control point A, and the third voltage Vini input to the third power supply signal terminal VINI is written into the third control point C). Therefore, the features would have been obvious to one of ordinary skill. Ma is silent regarding each pixel having one or more sub-pixels. In a related field of endeavor, Kwak teaches a pixel includes subpixels emitting red, green and blue light so as to provide color image display (see Kwak paragraph 0041 and figure 1 where a pixel 10 includes subpixels 10r, 10 g, and 10b, and these subpixels 10r, 10g, and 10b respectively include OLEDr, OLEDg, and OLEDb respectively emitting red (R), green (G), and blue (B) light). One of ordinary skill would have been motivated to have modified Ma with the teachings of Kwak to have the recited features so as to provide color image display using known techniques with predictable results. Consider claim 33, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 21 and further teaches wherein the drive control circuit further comprises: a selection thin film transistor (TFT) that is coupled to a data line and a first scan line (see Ma figure 2, element M6, DATA, Gn); and a driver TFT that is coupled to the select TFT and the OLED (see Ma figure 2, element M8), and wherein the response time accelerator TFT connected Consider claim 34, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 33 and further teaches wherein the OLED has a voltage that is greater than zero volts when the response time accelerator TFT shorts or reverse biases the OLED (see Ma figure 3, element P1, P3 and paragraphs 0099-0103 where during operation of the pixel circuit the three phases P1-P3 would be repeated for each pixel during each frame of image data. Therefore, immediately prior to resetting in P1, P3 light emitting phase would have occurred). Consider claim 35, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 33 and further teaches wherein the response time accelerator TFT is configured to be energized by a scan line pulse to the second scan line of the device (see Ma figure 2, element Gn-1 and figure 3, element Gn-1). Consider claim 36, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 35 and further teaches wherein the second scan line is at least one selected from the group consisting of: a scan line before the first scan line, a scan line after the first scan line, a scan line adjacent to the first scan line, and a scan line within a predetermined distance from the first scan line (see Ma figure 2, element Gn-1). Consider claim 37, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 33 and further teaches wherein each pixel includes a first sub-pixel, a second sub-pixel, and at least one third sub-pixel (see Kwak paragraph 0041 and figure 1), and wherein the drive control circuit is configured to control a portion of the first sub-pixels of the plurality of pixels to output light (see Ma figure 3, element P1, P3 and paragraphs 0099-0103 where during operation of the pixel circuit the three phases P1-P3 would be repeated for each pixel during each frame of image data. Therefore, immediately prior to resetting in P1, P3 light emitting phase would have occurred). Consider claim 39, Ma as modified by Yamamoto and Kwak teaches all the limitations of claim 21 and further teaches wherein the second scan line is at least one selected from a group consisting of: a scan line before the first scan line, a scan line after the first scan line, a scan line adjacent to the first scan line, and a scan line within a predetermined distance from the first scan line (see Ma figure 2, element Gn-1, EM). Response to Arguments Applicant's arguments filed December 11, 2025 have been fully considered but they are not persuasive. Regarding Applicant’s assertion that figure 3 and paragraph 0093 are sufficient to show “the drive circuitry” to control at least two sub-pixels as recited in claim 30, Examiner respectfully disagrees. As best understood by Examiner Applicant’s figure 3 shows a single sub-pixel having “drive control circuit” elements. The same elements that are described as “drive circuitry” (see Application notes above). Applicant has not identified any specific disclosure where a single drive circuitry (drive control circuit) controls multiple sub-pixels. Regarding Applicant’s assertion that paragraph 0125 discloses that the drive circuitry shown in figure 3 is configured to control at least two sub-pixels, Examiner reiterates, Figure 3 appears to illustrate a single sub-pixel having components that are disclosed as “drive control circuit” to control that single sub-pixel. It is unclear how a single drive control circuit as illustrated in Applicant’s figure 3 can be “configured” to control more than one sub-pixel. The objection to the drawings as repeated above are maintained. Examiner has withdrawn the objection to the claims. A new rejection under 35 USC 112 has been added and the maintained rejections under 35 USC 112 are repeated above. Regarding Applicant’s assertion that “Fujikura does not disclose or suggest that a response time accelerator TFT is configured to reduce an amount of light emitted from the one or more subpixels when a second scan line is energized. Although switch SW4 is connected to scan line 3-4B, this scan line 3-4B does not appear to perform a scan function for another row or column of sub-pixels or pixels”, Examiner respectfully disagrees. Fujikura paragraph 0153 discloses “Complementary scan signals n_4 and n_4B are provided from the scan line driver 1 on the scan lines 3-4 and 3-4B to exclusively turn on the switches SW3 and SW4”. Each pixel of Fujikura would have similar structure as a pixel of figure 23. Therefore Applicant’s argument that “scan line 3-4B of Fujikura is merely a line that provides a pulsing power to initiate a blanking period and is not a scan line” is unpersuasive. Examiner notes that Applicant’s remarks dated December 11, 2025 did not responded to the rejection of independent claim 21 (Ma in view of Yamamoto) starting on page 22 at paragraph 47 of the office action dated September 17, 2025. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wilhelm et al, U.S. Patent No. 5742133 (driver circuit for an Led), Yamashita et al, U.S. Patent Publication No. 20060170628 (pixel circuit), Uguen et al, U.S. Patent Publication No. 20110109537 (backlight control for display devices), Regan, U.S. Patent Publication No. 20170215248 (optoelectronic assembly), Heo, U.S. Patent Publication No. 20190131370 (display device), Hu et al, U.S. Patent Publication No. 20200410925 (pixel circuit), Umezawa, U.S. Patent Publication No. 20210005138 (display device), Chae et al, U.S. Patent Publication No. 20220358884 (display device), Li et al, U.S. Patent Publication No. 20240221584 (display device). THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Dorothy H Harris whose telephone number is (571)270-7539. The examiner can normally be reached Monday - Friday 8am - 4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached at 571-272-0666. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Dorothy Harris/Primary Examiner, Art Unit 2625
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Prosecution Timeline

Nov 14, 2024
Application Filed
Apr 08, 2025
Response after Non-Final Action
Sep 13, 2025
Non-Final Rejection — §103, §112
Dec 11, 2025
Response Filed
Jan 14, 2026
Final Rejection — §103, §112
Apr 14, 2026
Request for Continued Examination
Apr 16, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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3-4
Expected OA Rounds
62%
Grant Probability
85%
With Interview (+22.3%)
2y 8m
Median Time to Grant
Moderate
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