DETAILED ACTION
This is the First Action on the Merits for U.S. Patent Application No. 18/948,251, filed 14 November 2024, which is a continuation of U.S. Patent Application No. 17/537,282, now U.S. Patent No. 12,177,587, filed 29 November 2021, which claims foreign priority to Japanese Application No. JP2020-201214, filed 3 December 2020.
Claims 1–6 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Interpretation
The following is a quotation of 35 U.S.C. § 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. § 112(f) is invoked.
As explained in M.P.E.P. § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. § 112(f):
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. § 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. § 112(f) is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. § 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. § 112(f) is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. § 112(f) except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. § 112(f), except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means”, but are nonetheless being interpreted under 35 U.S.C. § 112(f), because the claim limitation uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: the “signal processing unit” in claim 5 and the “control unit” in claim 6.
Because this claim limitation is being interpreted under 35 U.S.C. § 112(f), it is being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof, namely: for the claim 5 signal processing unit, a column signal processing circuit including a memory as described in the specification at ¶ 0034, and for the claim 6 control unit, the ECU 330 as described in the specification at ¶ 0148.
If applicant does not intend to have these limitation interpreted under 35 U.S.C. § 112(f), applicant may: (1) amend the claim limitation to avoid them being interpreted under 35 U.S.C. § 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. § 112(f).
Claim Objections
Claim 3 is objected to for want of conformity to 37 C.F.R. § 1.75(i), which requires every element or step in a claim to be separated by a line indentation. Appropriate correction is required.
Claim Rejections - 35 U.S.C. § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. §§ 102 and 103 (or as subject to pre-AIA 35 U.S.C. §§ 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention absent any evidence to the contrary. Applicant is advised of the obligation under 37 C.F.R. § 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. § 102(b)(2)(C) for any potential 35 U.S.C. § 102(a)(2) prior art against the later invention.
Claims 1–6 are rejected under 35 U.S.C. § 103 as being unpatentable over European Patent Application Publication No. EP 3,588,941 B1 (“Moriyama”).
Moriyama, directed to a light sensor, teaches with respect to claim 1 an apparatus comprising:
a plurality of lines (Figs. 5, 9, each pixel column can output to four column lines 24A, 24B, 24C, 24D; Fig. 11, each pixel column can output to two column lines 24A and 24B),
a plurality of pixels each connected to one of the plurality of lines (id., pixels PX1, PX2, PX3, PX4 in Figs. 5, 11; multiple pixels PXG in column in Fig. 9),
a plurality of sources each connected to one of the plurality of lines (Fig. 6, each column line connected to a current source 31 in constant current source circuit unit 15),
a plurality of comparators each connected to one of the plurality of lines (id., comparison circuits 32 in comparison circuit unit 16),
wherein the plurality of sources includes a first source and a second source (id., at least two sources 31),
wherein the plurality of comparators includes a first comparator and a second comparator (id., at least two comparison circuits 32).
The claimed invention differs from Moriyama in that the claimed invention specifies relative physical locations of the two sources and two comparators. See Specification at Fig. 11. However, the claimed arrangement of the four components as linear in the order first source, second source, first comparator, second comparator is considered but a design variant or optimization of a more conventional arrangement of the sources and comparators being in two parallel rows, or other arrangements, not sufficient to establish patentability. M.P.E.P. § 2144.04(VI)(C) (exact physical position of various components including electronic components not patentable).
Regarding claim 2, Moriyama teaches the apparatus according to claim 1,
wherein the plurality of pixels includes a first pixel and a second pixel included in a same pixel column (Figs. 5, 11, pixels PX1 and PX2 in left column and pixels PX3 and PX4 in right column; Fig. 9, upper and lower pixels PXG in same column),
wherein the plurality [of] lines includes a first line connected to the first pixel and a second line connected to the second pixel (e.g. Fig. 5, column lines 24A and 24B connected to pixel PX1 and output lines 24C and 24D connected to pixel PX2),
wherein the first source is connected to the first line (Fig. 6, one instance of source circuit 31 connected to each column line 24n),
wherein the second source is connected to the second line (id.),
wherein the first comparator is connected to the first line (id., one instance of comparison circuit 32 connected to each column line 24n), and
wherein the second comparator is connected to the second line (id.).
Regarding claim 3, Moriyama teaches the apparatus according to claim 2, wherein the apparatus includes a first readout mode in which a first pixel signal output from the first pixel and a second pixel signal output from the second pixel are read out in parallel (¶ 0021, simultaneous readout mode), and
a second readout mode in which the first pixel signal output from the first pixel and the second pixel signal output from the second pixel are read out sequentially (id. per row readout mode).
Regarding claim 4, Moriyama teaches the apparatus according to claim 1,
wherein the plurality of pixels is formed on a first substrate (Fig. 2, ¶ 0039; signal extraction units in semiconductor substrate 61),
wherein the first source and the second source are formed on a second substrate (Fig. 2, ¶¶ 0051–52, predetermined voltages applied to regions in interconnection layer 91), and
wherein a plurality of substrates including the first substrate and the second substrate is laminated (Fig. 2, ¶ 0049; film 75).
Regarding claim 5, Moriyama teaches a system comprising:
the apparatus according to claim 1 (claim 1 rejection supra); and
a signal processing unit configured to generate an image by using a signal output from the apparatus (Fig. 1, signal processing unit 21 and data storage unit 22).
Regarding claim 6, Moriyama teaches a system comprises a moving body (Fig. 16, vehicle) comprising:
the apparatus according to claim 1 (claim 1 rejection supra); and
a control unit configured to control a movement of the moving body using a signal output from the apparatus (Fig. 15, driving system control unit 12010).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 2023/0362513 A1
US 2021/0360182 A1
US 2018/0316846 A1
US 2018/0152653 A1
US 2016/0156860 A1
US 2014/0340154 A1
US 2011/0050967 A1
US 2008/0062295 A1
The following prior art was found using an Artificial Intelligence assisted search using an internal AI tool that uses the classification of the application under the Cooperative Patent Classification (CPC) system, as well as from the specification, including the claims and abstract, of the application as contextual information. Where possible, English-language equivalents are given, and redundant results within the same patent families are eliminated. See “New Artificial Intelligence Functionality in PE2E Search”, 1504 OG 359 (15 November 2022), “Automated Search Pilot Program”, 90 F.R. 48,161 (8 October 2025).
EP 3002658 A1
FR 3002049 A1
US 2015/0195472 A1
US 2012/0025795 A1
US 2010/0097047 A1
US 2008/0197926 A1
US 2006/0255841 A1
US 2004/0061485 A1
AT 398865 B
US 4835417 A
Any inquiry concerning this communication or earlier communications from the examiner should be directed to David N Werner whose telephone number is (571)272-9662. The examiner can normally be reached M--F 7:30--4:00 Central.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dave Czekaj can be reached at 571.272.7327. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/David N Werner/Primary Examiner, Art Unit 2487
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